DS6219 04

®
RT6219
4A, 23V, 500kHz, ACOTTM Synchronous Buck Converter
General Description
Features
The RT6219 is a synchronous Buck converter with
Advanced Constant On-Time (ACOTTM) mode control which

5V to 23V Input Voltage Range

provides a very fast transient response with no external
compensators. The RT6219 operates from 5V to 23V input
voltage, provides complete protection functions including
Over Current Protection(OCP), Under Voltage
Protection(UVP) and Over Voltage Protection(OVP). This
IC also provides a 1.5ms internal soft-start function and
an open-drain power good indicator.

Adjustable from 0.6V to 5V Output Range
Up to 98% Duty for 2S Battery Application
500kHz Switching Frequency
ACOTTM Mode Performs Fast Transient Response
Integrated MOSFETs
 67mΩ
Ω of High-Side MOSFET
 41mΩ
Ω of Low-Side MOSFET
Supports MLCC Output Capacitors
Internal Soft-Start (1.5ms typ)
Built-in OVP/UVP/OCP
Power Good Indicator
Thermal Shutdown





Ordering Information

RT6219


Package Type
QW : WDFN-10L 3x3 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
PWM Operation / VOUT Protection
A : with DEM/Latch
AH : with DEM/Hiccup
BL : without DEM/Latch
BH : without DEM/Hiccup
Applications





Note :

Richtek products are :


Laptop Computers
Tablet PCs
Networking Systems
Servers
Personal Video Recorders
Flat Panel Television and Monitors
Distributed Power Systems
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.

Suitable for use in SnPb or Pb-free soldering processes.
Simplified Application Circuit
BOOT
VIN
VIN
CIN
Enable
L
EN
SW
CEN
VSYS
RBYP
COUT
FB
CBYP
PGOOD
VCC
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September 2015
VOUT
R1
VBYP
PGND
DS6219-04
CB
RT6219
RPGOOD
VCC
R2
CVCC
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1
RT6219
Marking Information
RT6219AGQW
RT6219AHGQW
7S= : Product Code
6K= : Product Code
6K=YM
DNN
YMDNN : Date Code
7S=YM
DNN
RT6219BLGQW
RT6219BHGQW
7Q= : Product Code
7Q=YM
DNN
YMDNN : Date Code
7R= : Product Code
YMDNN : Date Code
7R=YM
DNN
YMDNN : Date Code
Pin Configurations
PGOOD
VBYP
VIN
EN
FB
1
2
3
4
5
PGND
(TOP VIEW)
11
10
9
8
7
6
SW
SW
SW
BOOT
VCC
WDFN-10L 3x3
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
PGOOD
Open-Drain Power Good Indicator Output.
2
VBYP
Switch Over Input Supply Voltage for VCC. A low pass filter should be connected
to AGND, if VBYP is applied. If VBYP is not used, then connect to AGND. Do not
connect to VCC pin.
3
VIN
Power Input Connect to High-Side MOSFET Drain.
4
EN
Enable Control Input. Do not leave this pin floating. The slew rate of EN is
recommended to be slower than 4.8V/s.
5
FB
Feedback Voltage Input.
6
VCC
5V Linear Regulator Output for Internal Control Circuit. Bypass VCC to AGND
with a 2.2F capacitor. VCC can only supply internal circuits. Do not connect to
external loads.
7
BOOT
Bootstrap Supply for High-Side Gate Driver. A capacitor is needed to drive the
power switch's gate above the supply voltage. It is connected between the SW
and BOOT pins to form a floating supply across the power switch driver.
SW
Switch Node.
PGND
Power Ground. The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
8, 9, 10
11
(Exposed Pad)
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is a registered trademark of Richtek Technology Corporation.
DS6219-04
September 2015
RT6219
Function Block Diagram
VBYP
VCC
VCC
POR &
Reference
Soft-Start
FB
VREF
VFB
VCC
Switch-Over
+
+
-
VIN
On-Time
One shot
Gate
Control
Logic
Min off Time
BOOT
SW
VCC
EN
PGND
SW
VOC
125% x VREF
-
+
-
OVP
PGND
Fault
Logic
+
91.5% x VREF
PGOOD
OCP
+
POK
58% x VREF
+
UVP
VCC
VIN
VCC
Regulator
-
Operation
Overall
OCP
The RT6219 is a synchronous step-down converter with
advanced constant on-time control mode. Using the
ACOTTM control mode can reduce the output capacitance
and provide fast transient response. It can minimize the
component size without additional external compensation
network.
The inductor valley current is monitored cycle-by-cycle
via the internal swiches, preventing an on-time until the
current drops below the current limit.
Power Good
After soft-start is finished, the power good output goes
high. The PGOOD pin is an open-drain output.
Internal VCC Regulator
The regulator provides 5V power to supply the internal
control circuit. Connecting a 2.2μF ceramic capacitor for
decoupling and stability is required.
VCC Switch-Over
The internal regulator output will switch over to VBYP if
VBYP level is higher than 4.6V.
Soft-Start
In order to prevent the converter output voltage from
overshooting during the startup period, the soft-start
function is necessary. The soft-start time is internal setting
and the duration is around 1.5ms.
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6219-04
September 2015
is a registered trademark of Richtek Technology Corporation.
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3
RT6219
Absolute Maximum Ratings













(Note 1)
VIN to PGND -------------------------------------------------------------------------------------------------- −0.3V to 27V
SW to PGND -------------------------------------------------------------------------------------------------- −0.3V to (VIN + 0.3V)
<30ns ----------------------------------------------------------------------------------------------------------- −5V to 28V
BOOT to PGND ----------------------------------------------------------------------------------------------- (VSW − 0.3V) to (VSW + 6V)
EN to PGND --------------------------------------------------------------------------------------------------- −0.3V to 27V
FB to PGND --------------------------------------------------------------------------------------------------- −0.3V to 27V
VBYP to PGND ----------------------------------------------------------------------------------------------- −0.3V to 5.3V
VCC, PGOOD to PGND ------------------------------------------------------------------------------------ −0.3V to 6V
Power Dissipation, PD @ TA = 25°C
WDFN-10L 3x3 ------------------------------------------------------------------------------------------------ 3.28W
Package Thermal Resistance (Note 2)
WDFN-10L 3x3, θJA ------------------------------------------------------------------------------------------ 30.5°C/W
WDFN-10L 3x3, θJC ------------------------------------------------------------------------------------------ 7.5°C/W
Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------ 260°C
Junction Temperature ---------------------------------------------------------------------------------------- 150°C
Storage Temperature Range ------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Model) --------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions



(Note 4)
Supply Input Voltage, VIN ---------------------------------------------------------------------------------- 5V to 23V
Junction Temperature Range ------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 12V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
--
2.5
5
A
(RT6219A/AH)
--
100
130
(RT6219BL/BH)
--
110
150
RDS(ON)_H VBOOT – VSW = 5V
--
67
--
RDS(ON)_L
--
41
--
4.5
6
8.3
A
450
500
550
kHz
--
200
--
ns
Supply Current
Shutdown Current
VEN = 0V
Quiescent Current
VEN = 2V, No
Switching
A
Switch On-Resistance
Switch On-Resistance
m
Current Limit
Current Limit
IOC
Valley current of low-side switch
Switching Frequency and Minimum Off Timer
Switching Frequency
f SW
Minimum Off-Time
TOFF
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is a registered trademark of Richtek Technology Corporation.
DS6219-04
September 2015
RT6219
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
120
125
130
%
--
5
--
s
53
58
63
%
--
5
--
s
0.594
0.600
0.606
V
1
1.5
2
ms
1.25
1.35
1.45
V
--
200
--
mV
VEN = 2V
--
1
--
VEN = 0V
--
0
--
Protections
OVP Trip Threshold
VOVP
OVP Propagation Delay
TOVPDLY
UVP Trip Threshold
VUVP
UVP Propagation Delay
TUVPDLY
With respect to output voltage
With respect to output voltage
Reference and Soft-Start
Feedback Reference Voltage
VREF
Soft-Start Time
TSS
From EN high to PGOOD high
Enable and UVLO
EN Input High Voltage
VENH
EN Hysteresis
VENHYS
EN Input Current
IEN
VCC UVLO Rising
VCCUVLO
--
4.2
--
V
VCC UVLO Hysteresis
VCCHYS
--
400
--
mV
4.805
5
5.295
V
4.4
4.6
4.8
V
--
200
--
mV
--
3
5

A
VCC Regulator
VCC Regulator
VVCC
VCC Switch Over Threshold to
VBYP
VCC Switch Over Hysteresis
VBYP Rising Edge
Switch Over On-Resistance
Power Good Indicator
PGOOD Threshold From Lower
VOUT Rising
86.5
91.5
96.5
%
PGOOD Low Hysteresis
VOUT Falling
--
10
--
%
--
0.5
--
ms
PGOOD Low to High Delay
TPGDLY
PGOOD Sink Current Capability VPGSINK
Sink 4mA
--
--
0.4
V
PGOOD Leakage Current
IPGLEAK
VPGOOD = 5V
--
--
100
nA
TSD
TJ Rising
135
150
--
°C
--
25
--
°C
Thermal Shutdown
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6219-04
September 2015
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5
RT6219
Typical Application Circuit
VIN
5.2V to 23V
VSYS
5V
3
CIN
10µF /
25V x 2
RB
2.2
(Optional)
BOOT 7
VIN
CB
0.1µF / 50V
L
RT6219
4
RBYP
5.1
CBYP
2.2µF /
10V
EN
SW
2 VBYP
11 (Exposed Pad)
8, 9, 10
2.2µH
(Optional)
RPGOOD
100k
PGOOD 1
VCC 6
VOUT
5V/4A
COUT
22µF /
6.3V x 3
R1
22k
22pF
FB 5
PGND
CFF
R2
3k
VCC
CVCC
2.2µF / 10V
Figure 1. Typical Application Circuit for VOUT = 5V
VIN
5.2V to 23V
3
CIN
10µF /
25V x 2
CB
0.1µF / 50V
L
RT6219
4
RBYP
5.1
VSYS
5V
BOOT 7
VIN
RB
2.2
(Optional)
2
CBYP
2.2µF /
10V
11 (Exposed Pad)
EN
SW
VBYP
8, 9, 10
2.2µH
PGND
R1
162k
4.7pF
(Optional)
FB 5
PGOOD 1
VCC 6
CFF
RPGOOD
100k
COUT
22µF /
6.3V x 3
VOUT
3.3V/4A
R2
36k
VCC
CVCC
2.2µF / 10V
Figure 2. Typical Application Circuit for VOUT = 3.3V
VIN
5.2V to 23V
3
CIN
10µF / 25V x 2
VSYS
5V
RT6219
4
Enable
RBYP 5.1
BOOT 7
VIN
RB
2.2
(Optional)
CEN
0.1µF / 6.3V
EN
2 VBYP
CBYP
2.2µF / 10V
11 (Exposed Pad)
PGND
SW
8, 9, 10
CB
0.1µF / 50V
L
1.2µH
22pF
FB 5
PGOOD 1
VCC 6
CFF
RPGOOD
100k
(Optional)
R1
20k
VOUT
1V/4A
COUT
22µF /
6.3V x 4
R2
30k
VCC
CVCC
2.2µF / 10V
Figure 3. Typical Application Circuit for VOUT = 1V
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is a registered trademark of Richtek Technology Corporation.
DS6219-04
September 2015
RT6219
Typical Operating Characteristics
Performace waveforms are tested on the evaluation board of the Typical Application Circuit, VIN = 12V, VOUT = 1V, L = 1μH,
TJ = 25°C, unless otherwise noted.
Efficiency vs. Load Current
Efficiency vs. Load Current
100
100
95
95
Efficiency (%)
Efficiency (%)
90
85
VIN = 7.4V
VIN = 12V
VIN = 19V
80
75
90
VIN = 7.4V
VIN = 12V
VIN = 19V
85
80
70
65
60
0.001
75
VOUT = 1V, fSW = 500kHz,
L = 1μH, DCR = 3.3mΩ, EN = 2V
0.010
0.100
1.000
70
0.001
10.000
VOUT = 3.3V, fSW = 500kHz,
L = 2.2μH, DCR = 7mΩ, EN = 2V
0.010
Load Current (A)
Efficiency vs. Load Current
VIN = 7.4V
VIN = 12V
VIN = 19V
90
85
80
75
70
0.001
VBYP = VOUT = 5V, fSW = 500kHz,
L = 2.2μH, DCR = 7mΩ, EN = 2V
0.010
0.100
1.000
Switching Frequency (kHz)1
Efficiency (%)
10.000
600
95
500
400
300
200
100
VIN = 7.4V,
VOUT = 1V, EN = 2V
0
0.001
10.000
0.010
Load Current (A)
0.100
1.000
10.000
Load Current (A)
Switching Frequency vs. Load Current
Switching Frequency vs. Load Current
600
500
400
300
200
100
0
0.001
VIN = 12V,
VOUT = 1V, EN = 2V
0.010
0.100
1.000
Load Current (A)
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September 2015
10.000
Switching Frequency (kHz)1
600
Switching Frequency (kHz)1
1.000
Switching Frequency vs. Load Current
100
DS6219-04
0.100
Load Current (A)
500
400
300
200
100
0
0.001
VIN = 19V,
VOUT = 1V, EN = 2V
0.010
0.100
1.000
10.000
Load Current (A)
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RT6219
Quiescent Current vs. Input Voltage
Shutdown Current vs. Input Voltage
5
105
Shutdown Current (μA)1
Quiescent Current (μA)
110
100
95
90
85
4
3
2
1
EN = 2V, No Switching
80
EN = 0V
0
5
7
9
11
13
15
17
19
21
23
5
7
9
Input Voltage (V)
11
13
15
17
19
21
23
Input Voltage (V)
Output Voltage vs. Load Current
Output Voltage vs. Load Current
1.05
3.50
1.04
3.45
Output Voltage (V)
Output Voltage (V)
1.03
1.02
1.01
1.00
0.99
0.98
3.40
3.35
3.30
3.25
0.97
3.20
0.96
VIN = 12V, VOUT = 1V, EN = 2V
0.95
0.001
0.01
0.1
1
10
3.15
0.001
VIN = 12V, VOUT = 3.3V, EN = 2V
0.01
0.1
1
Load Current (A)
Load Current (A)
Output Voltage vs. Load Current
Power On Through EN
10
5.25
5.20
VOUT
(1V/Div)
Output Voltage (V)
5.15
5.10
5.05
EN
(5V/Div)
5.00
4.95
4.90
4.85
4.80
4.75
0.001
VIN = 12V, VOUT = 5V, EN = 2V
0.01
0.1
1
10
PGOOD
(5V/Div)
V CC
(5V/Div)
No Load, VIN = 12V
Time (500μs/Div)
Load Current (A)
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is a registered trademark of Richtek Technology Corporation.
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RT6219
Load Transient Response
Power Off Through EN
VIN = 12V, EN = High, VOUT = 1V, COUT = 4 x 22μF,
L = 1.2μH, IOUT = 0.4A to 4A @ 2.5A/μs
VOUT
(1V/Div)
VOUT
(20mV/Div)
EN
(5V/Div)
SW
(20V/Div)
PGOOD
(5V/Div)
V CC
(5V/Div)
No Load, VIN = 12V
IL
(5A/Div)
Time (500μs/Div)
Time (50μs/Div)
Load Transient Response
Load Transient Response
VIN = 12V, EN = High, VOUT = 3.3V, COUT = 3 x 22μF,
L = 2.2μH, IOUT = 0.4A to 4A @ 2.5A/μs
VIN = 12V, EN = High, VOUT = 5V, COUT = 3 x 22μF,
L = 2.2μH, IOUT = 0.4A to 4A @ 2.5A/μs
VOUT
(100mV/Div)
VOUT
(200mV/Div)
SW
(20V/Div)
SW
(20V/Div)
IL
(5A/Div)
IL
(5A/Div)
Time (50μs/Div)
Time (50μs/Div)
UVP
OVP
VOUT
(1V/Div)
VOUT
(1V/Div)
PGOOD
(5V/Div)
PGOOD
(5V/Div)
VIN
(10V/Div)
SW
(10V/Div)
VIN = 12V, EN = High
Time (50μs/Div)
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September 2015
IL
(5A/Div)
VIN = 12V, VOUT = 1.25V, EN = High
Time (50μs/Div)
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RT6219
Application Information
The RT6219 is high-performance 500kHz 4A step-down
regulators with internal power switches and synchronous
rectifiers. It features an Advanced Constant On-Time
(ACOT TM) control architecture that provides stable
operation for ceramic output capacitors without
complicated external compensation, among other benefits.
The input voltage range is from 5V to 23V, and the output
voltage is adjustable from 0.6V to 5V.
The proprietary ACOT TM control scheme improves
conventional constant on-time architectures, achieving
nearly constant switching frequency over line, load, and
output voltage ranges. Since there is no internal clock,
response to transients is nearly instantaneous and inductor
current can ramp quickly to maintain output regulation
without large bulk output capacitance.
ACOTTM Control Architecture
In order to achieve good stability with low-ESR ceramic
capacitors, ACOTTM uses a virtual inductor current ramp
generated inside the IC. This internal ramp signal replaces
the ESR ramp normally provided by the output capacitor's
ESR. The ramp signal and other internal compensations
are optimized for low-ESR ceramic output capacitors.
Making the on-time proportional to VOUT and inversely
proportional to VIN is not sufficient to achieve good
constant-frequency behavior for several reasons. First,
voltage drops across the MOSFET switches and inductor
cause the effective input voltage to be less than the
measured input voltage and the effective output voltage to
be greater than the measured output voltage as sensing
input and output voltage. When the load changes, the
switch voltage drops change causing a switching
frequency variation with load current. Also, at light loads
if the inductor current goes negative, the switch deadtime between the synchronous rectifier turn-off and the
high-side switch turn-on allows the switching node to rise
to the input voltage. This increases the effective on-time
and causes the switching frequency to drop noticeably.
One way to reduce these effects is to measure the actual
switching frequency and compare it to the desired range.
This has the added benefit eliminating the need to sense
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the actual output voltage, potentially saving one pin
connection. The ACOTTM uses this method, measuring
the actual switching frequency and modifying the on-time
with a feedback loop to keep the average switching
frequency in the desired range.
ACOTTM One-shot Operation
The RT6219 control algorithm is simple to understand.
The feedback voltage, with the virtual inductor current ramp
added, is compared to the reference voltage. When the
combined signal is less than the reference, the on-time
one-shot is triggered, as long as the minimum off-time
one-shot is clear and the measured inductor current
(through the synchronous rectifier) is below the current
limit. The on-time one-shot turns on the high-side switch
and the inductor current ramps up linearly. After the ontime, the high-side switch is turned off and the synchronous
rectifier is turned on and the inductor current ramps down
linearly. At the same time, the minimum off-time one-shot
is triggered to prevent another immediate on-time during
the noisy switching time and allow the feedback voltage
and current sense signals to settle. The minimum off-time
is kept short (200ns typical) so that rapidly-repeated ontimes can raise the inductor current quickly when needed.
Diode Emulation Mode (DEM)
In diode emulation mode, the RT6219 automatically
reduces switching frequency at light load conditions to
maintain high efficiency. This reduction of frequency is
achieved smoothly. As the output current decreases from
heavy load conditions, the inductor current is also reduced,
and eventually comes to the point that its current valley
touches zero, which is the boundary between continuous
conduction and discontinuous conduction modes. To
emulate the behavior of diodes, the low-side MOSFET
allows only partial negative current to flow when the
inductor free wheeling current becomes negative. As the
load current is further decreased, it takes longer and longer
time to discharge the output capacitor to the level that
requires the next “ON” cycle. In reverse, when the output
current increases from light load to heavy load, the
switching frequency increases to the preset value as the
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DS6219-04
September 2015
RT6219
inductor current reaches the continuous conduction. The
transition load point to the light load operation is shown in
Figure 4 and can be calculated as follows :
IL
Slope = (VIN - VOUT) / L
IPEAK
Linear Regulators (VCC)
The RT6219 includes a 5V linear regulator (VCC). The
VCC regulator steps down input voltage to supply both
internal circuitry and gate drivers. Do not connect the VCC
pin to external loads. When PGOOD is pulled high and
BYP pin voltage is above 4.6V, an internal 3Ω
P-MOSFET switch connects VCC to the BYP pin while
the VCC linear regulator is simultaneously turned off.
ILOAD = IPEAK / 2
Current Limit
tON
t
Figure 4. Boundary Condition of CCM/DEM
ILOAD 
(VIN  VOUT )
 tON
2L
where tON is the on-time.
The switching waveforms may appear noisy and
asynchronous when light load causes diode emulation
operation. This is normal and results in high efficiency.
Trade offs in DEM noise vs. light load efficiency is made
by varying the inductor value. Generally, low inductor values
produce a broader efficiency vs. load curve, while higher
values result in higher full load efficiency (assuming that
the coil resistance remains fixed) and less output voltage
ripple. Penalties for using higher inductor values include
larger physical size and degraded load transient response
(especially at low input voltage levels).
During discontinuous switching, the on-time is immediately
increased to add “hysteresis” to discourage the IC from
switching back to continuous switching unless the load
increases substantially. The IC returns to continuous
switching as soon as an on-time is generated before the
inductor current reaches zero. The on-time is reduced back
to the length needed for 500kHz switching and encouraging
the circuit to remain in continuous conduction, preventing
repetitive mode transitions between continuous switching
and discontinuous switching.
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6219-04
September 2015
The RT6219 current limit is a cycle-by-cycle “valley” type,
measuring the inductor current through the synchronous
rectifier during the off-time while the inductor current ramps
down. The current is determined by measuring the voltage
between Source and Drain of the synchronous rectifier,
adding temperature compensation for greater accuracy. If
the current exceeds the current limit, the on-time oneshot is inhibited until the inductor current ramps down
below the current limit. If the output current exceeds the
available inductor current (controlled by the current limit
mechanism), the output voltage will drop. If it drops below
the output under-voltage protection level (see next section),
the IC will stop switching to avoid excessive heat.
Output Over-Voltage Protection and Under-Voltage
Protection
The RT6219 features an output Over-Voltage Protection
(OVP). For RT6219A and RT6219BL, if the output voltage
rises above the regulation level, the IC stops switching
and is latched off. On the other hand, for RT6219AH and
RT6219BH, the IC will stop switching and restart
automatically after a short period which is the so-called
Hiccup mode. The RT6219 also features an output UnderVoltage Protection (UVP). If the output voltage drops below
the UVP trip threshold for longer than 5μs (typical), the
UVP is triggered, and the IC will shutdown. Likewise, for
RT6219A and RT6219BL, the IC stops switching and is
latched off. On the other hand, for RT6219AH and
RT6219BH, the IC will stop switching and enter the Hiccup
mode. To restart operation from latch off, toggle EN or
power the IC off and then turn on again.
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RT6219
Input Under-Voltage Lockout
In addition to the enable function, the RT6219 features an
Under-Voltage Lockout (UVLO) function that monitors the
input voltage. To prevent operation without fully-enhanced
internal MOSFET switches, this function inhibits switching
when input voltage drops below the UVLO-falling threshold.
The IC resumes switching when input voltage exceeds
the UVLO-rising threshold.
Over-Temperature Protection
The RT6219 features an Over-Temperature Protection
(OTP) circuitry to prevent overheating due to excessive
power dissipation. The OTP shuts down switching
operation when the junction temperature exceeds 150°C.
Once the junction temperature cools down by
approximately 25°C, the IC resumes normal operation with
a complete soft-start. For continuous operation, provide
adequate cooling so that the junction temperature does
not exceed 150°C. Note that the VCC regulator remains
on as the OTP is triggered.
Enable and Disable
The enable input (EN) has a logic-low level of 1.15V. When
VEN is below this level, the IC enters shutdown mode and
supply current drops to less than 5μA (typical). When
VEN exceeds its logic-high level (1.35V typical), the IC is
fully operational.
Soft-Start
The RT6219 provides an internal soft-start function to
prevent large inrush current and output voltage overshoot
when the converter starts up. The soft-start (SS)
automatically begins once the chip is enabled. During softstart, it clamps the ramp of internal reference voltage which
is compared with FB signal. And it will correct the output
voltage more accurately after soft-start. The typical softstart duration is 1.5ms.
Power Good Output (PGOOD)
The power good output is an open-drain output that requires
a pull-up resistor. When the output voltage is 20% (typical)
below its set voltage, PGOOD will be pulled low. It is held
low until the output voltage returns to 90% of its set voltage
once more. During soft-start, PGOOD is actively held low
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and only allowed to be pulled high after soft-start is over
and the output reaches 90% of its set voltage, and the
PGOOD low to high delay (500μs typical) has passed.
There is a 2μs PGOOD high to low delay built into PGOOD
circuitry to prevent false triggering.
External Bootstrap Capacitor (CBOOT)
Connect a 0.22μF low ESR ceramic capacitor between
the BOOT and SW pins. This bootstrap capacitor provides
the gate driver supply voltage for the high-side N-MOSFET
switch.
The internal power MOSFET switch gate driver is
optimized to turn the switch on fast enough for low power
loss and good efficiency, and slow enough to reduce EMI.
Switch turn-on is when most EMI occurs since VSW rises
rapidly. During switch turn-off, SW is discharged relatively
slowly by the inductor current during the dead-time
between high-side and low-side switch on-times. In some
cases it is desirable to reduce EMI further, at the expense
of some additional power dissipation. The switch turn-on
can be slowed by placing a small (<10Ω) resistance
between BOOT and the external bootstrap capacitor. This
will slow the high-side switch turn-on and VSW's rise.
Setting the Output Voltage
The output voltage of RT6219 is adjustable and with valley
control. There is an easy way to determine the output
voltage only by two resistors, R1 and R2. As the feedback
circuit shown in Figure 5, the relation of VOUT and VREF
can be derived as VOUT = (1+R1/R2) x VREF readily.
Generally, the stability is a serious issue for converter. In
order to achieve better performance on stability and
transient, a feed-forward capacitor, CFF, is added to
increase the noise margin and transient response of loop
control. However, there is a tradeoff of adding a feed-forward
capacitor. An additional dc offset will be generated on
output voltage due to the amplified feedback ripple by feedforward compensator. This is not always the case that
every CFF makes the same value of dc offset, it is based
on different pole and zero placement generated by R1, R2
and C FF. For simplicity, a symbol named Vdc,offset is
supposed to be the value of dc offset. This value may
influence the performance (e.g. regulation or peak value
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DS6219-04
September 2015
RT6219
of VOUT) of converter slightly, the suggested CFF is to select
a pair of pole and zero to provide the maximum phase
lead at switching frequency.
VOUT,valley =  1+ R1   VREF + Vdc,offset
 R2 
VOUT,valley is the valley of output voltage, and Vdc,offset is
used for describing the additional dc offset on VOUT, the
value is related to the output voltage ripple and CFF.
VOUT
R1
CFF (opt.)
FB
RT6219
R2
GND
Figure 5. The equivalent circuit of feedback loop
Inductor Selection
Selecting an inductor involves specifying its inductance
and also its required peak current. The exact inductor value
is generally flexible and is ultimately chosen to obtain the
best mix of cost, physical size, and circuit efficiency.
Lower inductor values benefit from reduced size and cost
and they can improve the circuit's transient response.
However, they increase the inductor ripple current and
output voltage ripple and reduce the efficiency due to the
resulting higher peak currents. Conversely, higher inductor
values increase efficiency, but the inductor will either be
physically larger or have higher resistance since more
turns of wire are required and transient response will be
slower since more time is required to change current (up
or down) in the inductor. A good compromise between
size, efficiency, and transient response is to use a ripple
current (ΔIL) about 20-50% of the desired full output load
current. Calculate the approximate inductor value by
selecting the input and output voltages, the switching
frequency (fSW), the maximum output current (IOUT(MAX))
and estimating a ΔIL as some percentage of that current.
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6219-04
September 2015
V
 (VIN  VOUT )
L  OUT
VIN  fSW  IL
Once an inductor value is chosen, the ripple current (ΔIL)
is calculated to determine the required peak inductor
current.
V
 (VIN  VOUT )
I
IL  OUT
and IL(PEAK)  IOUT(MAX)  L
VIN  fSW  L
2
To guarantee the required output current, the inductor
needs a saturation current rating and a thermal rating that
exceeds IL(PEAK). These are minimum requirements. To
maintain control of inductor current in overload and shortcircuit conditions, some applications may desire current
ratings up to the current limit value. However, the IC's
output under-voltage shutdown feature make this
unnecessary for most applications.
For best efficiency, choose an inductor with a low DC
resistance that meets the cost and size requirements.
For low inductor core losses some type of ferrite core is
usually best and a shielded core type, although possibly
larger or more expensive, will probably give fewer EMI
and other noise problems.
Input Capacitor Selection
High quality ceramic input decoupling capacitor, such as
X5R or X7R, with values greater than 20μF are
recommended for the input capacitor. The X5R and X7R
ceramic capacitors are usually selected for power regulator
capacitors because the dielectric material has less
capacitance variation and more temperature stability.
Voltage rating and current rating are the key parameters
when selecting an input capacitor. Generally, selecting an
input capacitor with voltage rating 1.5 times greater than
the maximum input voltage is a conservatively safe design.
The input capacitor is used to supply the input RMS
current, which can be calculated using the following
equation :
IRMS 
VOUT 
V
I 2 
 (1  OUT )  IOUT 2  L 
VIN
VIN
12 

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RT6219
The next step is to select a proper capacitor for RMS
current rating. One good design uses more than one
capacitor with low Equivalent Series Resistance (ESR) in
parallel to form a capacitor bank. The input capacitance
value determines the input ripple voltage of the regulator.
The input voltage ripple can be approximately calculated
using the following equation :
IOUT  VIN
V
VIN 
 (1  OUT )
CIN  fSW  VOUT
VIN
The typical operating circuit is recommended to use two
10μF low ESR ceramic capacitors on the input.
Output Capacitor Selection
The RT6219 is optimized for ceramic output capacitors
and best performance will be obtained by using them. The
total output capacitance value is usually determined by
the desired output voltage ripple level and transient response
requirements for sag (undershoot on positive load steps)
and soar (overshoot on negative load steps).
Output ripple at the switching frequency is caused by the
inductor current ripple and its effect on the output
capacitor's ESR and stored charge. These two ripple
components are called ESR ripple and capacitive ripple.
Since ceramic capacitors have extremely low ESR and
relatively little capacitance, both components are similar
in amplitude and both should be considered if ripple is
critical.
VRIPPLE  VRIPPLE(ESR)  VRIPPLE(C)
VRIPPLE(ESR)  IL  RESR
VRIPPLE(C) 
IL
8  COUT  fSW
In addition to voltage ripple at the switching frequency,
the output capacitor and its ESR also affect the voltage
sag (undershoot) and soar (overshoot) when the load steps
up and down abruptly. The ACOT transient response is
very quick and output transients are usually small.
However, the combination of small ceramic output
capacitors (with little capacitance), low output voltages
(with little stored charge in the output capacitors), and
low duty cycle applications (which require high inductance
to get reasonable ripple currents with high input voltages)
increases the size of voltage variations in response to
very quick load changes. Typically, load changes occur
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slowly with respect to the IC's 500kHz switching frequency.
However, some modern digital loads can exhibit nearly
instantaneous load changes and the following section
shows how to calculate the worst-case voltage swings in
response to very fast load steps.
The amplitude of the ESR step up or down is a function of
the load step and the ESR of the output capacitor :
VESR_STEP  IOUT  RESR
The amplitude of the capacitive sag is a function of the
load step, the output capacitor value, the inductor value,
the input-to-output voltage differential, and the maximum
duty cycle. The maximum duty cycle during a fast transient
is a function of the on-time and the minimum off-time since
the ACOTTM control scheme will ramp the current using
on-times spaced apart with minimum off-times, which is
as fast as allowed. Calculate the approximate on-time
(neglecting parasitics) and maximum duty cycle for a given
input and output voltage as :
t ON 
VOUT
tON
and DMAX 
VIN  fSW
tON + tOFF(MIN)
The actual on-time will be slightly longer as the IC
compensates for voltage drops in the circuit, but we can
neglect both of these since the on-time increases
compensations for the voltage losses. Calculate the output
voltage sag as :
VSAG 
L  (IOUT )2
2  COUT  ( VIN(MIN)  DMAX  VOUT )
The amplitude of the capacitive soar is a function of the
load step, the output capacitor value, the inductor value
and the output voltage :
VSOAR 
L  ( IOUT )2
2  COUT  VOUT
Most applications never experience instantaneous full load
steps and the RT6219's high switching frequency and fast
transient response can easily control voltage regulation
at all times. Therefore, sag and soar are seldom an issue
except in very low-voltage CPU core or DDR memory
supply applications, particularly for devices with high clock
frequencies and quick changes into and out of sleep
modes. In such applications, simply increasing the amount
of ceramic output capacitor (sag and soar are directly
proportional to capacitance) or adding extra bulk
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DS6219-04
September 2015
RT6219
3.6
Maximum Power Dissipation (W)1
capacitance can easily eliminate any excessive voltage
transients.
In any application with large quick transients, it should
calculate soar and sag to make sure that over-voltage
protection and under-voltage protection will not be triggered.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
Four-Layer PCB
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 6. Derating Curve of Maximum Power Dissipation
PD(MAX) = (TJ(MAX) − TA) / θJA
Layout Considerations
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
Layout is very important in high frequency switching
converter design. The PCB can radiate excessive noise
and contribute to converter instability with improper layout.
Certain points must be considered before starting a layout
using the RT6219.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WDFN-10L 3x3 package, the thermal resistance, θJA, is
30.5°C/W on a standard JEDEC 51-7 four-layer thermal
test board. The maximum power dissipation at TA = 25°C
can be calculated by the following formula :

Make traces of the high current paths as short and wide
as possible.

Put the input capacitor as close as possible to the device
pins (VIN and PGND).

The SW node encounters high frequency voltage swings
so it should be kept in a small area. Keep sensitive
components away from the SW node to prevent noise
coupling.

The PGND pin should be connected to a strong ground
plane for heat sinking and noise protection.

Avoid using vias in the power path connections that have
switched currents (from CIN to PGND and CIN to VIN)
and the switching node (SW).

An example of PCB layout guide is shown in Figure 7
for reference.
PD(MAX) = (125°C − 25°C) / (30.5°C/W) = 3.28W for
WDFN-10L 3x3 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 6 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
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DS6219-04
September 2015
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15
RT6219
The input capacitor must be placed as
close to the IC as possible.
The output capacitor must be placed
near the IC.
GND
CIN
COUT
VIN
PGOOD
1
10
SW
VBYP
2
9
SW
VIN
3
8
SW
EN
4
FB
5
L
VOUT
PGND
CBOOT
CFF (opt.)
VOUT
11
7
BOOT
6
VCC
R1
R2
GND
The optional compensating
components must be connected as close to the
IC as possible.
GND
Figure 7. PCB Layout Guide
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CVCC
SW should be connected to inductor by
wide and short trace.
Keep sensitive components away from
this trace.
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DS6219-04
September 2015
RT6219
Outline Dimension
D2
D
L
E
E2
1
e
SEE DETAIL A
b
2
1
2
1
A
A1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
2.300
2.650
0.091
0.104
E
2.950
3.050
0.116
0.120
E2
1.500
1.750
0.059
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 10L DFN 3x3 Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
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obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS6219-04
September 2015
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