IRFD310 Data Sheet July 1999 0.4A, 400V, 3.600 Ohm, N-Channel Power MOSFET 2324.4 Features • 0.4A, 400V These are N-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. • rDS(ON) = 3.600Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Formerly developmental type TA17444. Ordering Information PART NUMBER File Number Symbol PACKAGE BRAND D IRFD310 HEXDIP IRFD310 NOTE: When ordering, use the entire part number. G S Packaging HEXDIP DRAIN GATE SOURCE 4-293 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 IRFD310 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRFD310 400 400 0.4 1.6 ±20 1.0 0.008 45 -55 to 150 UNITS V V A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS V Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 9) 400 - - Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA Zero Gate Voltage Drain Current On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time IDSS ID(ON) IGSS rDS(ON) gfs td(ON) Rise Time tr Turn-Off Delay Time td(OFF) Fall Time 2.0 - 4.0 V VDS = Rated BVDSS, VGS = 0V - - 25 µA VDS = 0.8 x Rated BVDSS , VGS = 0V, TC = 125oC - - 250 µA 0.4 - - A VDS > ID(ON) x rDS(ON)MAX, VGS = 10V VGS = ±20V - - ±100 nA ID = 0.2A, VGS = 10V (Figures 7, 8) - 3.3 3.6 Ω 1.0 1.2 - S - 3.0 10 ns - 10 20 ns - 5.0 10 ns - 8.0 15 ns - 6.0 7.5 nC - 3.0 - nC - 3.0 - nC VDS ≥ 10V, ID = 1.2A (Figure 11) VDD = 0.5 x Rated BVDSS, ID ≈ 0.4A, RG = 9.1Ω, VGS = 10V, RL = 495Ω for VDSS = 200V MOSFET Switching Times are Essentially Independent of Operating Temperature tf Total Gate Charge (Gate to Source + Gate to Drain) Qg(TOT) Gate to Source Charge Qgs Gate to Drain “Miller” Charge Qgd VGS = 10V, ID = 0.4A, VDS = 0.8 x Rated BVDSS Ig(REF) = 1.5mA (Figure 13) Gate Charge is Essentially Independent of Operating Temperature Input Capacitance CISS - 135 - pF Output Capacitance COSS - 35 - pF Reverse Transfer Capacitance CRSS - 8.0 - pF - 4.0 - nH - 6.0 - nH - - 120 oC/W Internal Drain Inductance LD Internal Source Inductance LS VDS = 25V, VGS = 0V, f = 1MHz (Figure 10) Measured From Drain Modified MOSFET Lead, 2.0mm (0.08in) From Symbol Showing the Package to Center of Die Internal Device Inductances Measured From the Source D Lead, 2.0mm (0.08in) from Package to Source LD Bonding Pad G LS S Thermal Resistance, Junction to Ambient 4-294 RθJA Free Air Operation IRFD310 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier D MIN TYP MAX UNITS - - 0.4 A - - 1.6 A G S Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge VSD TJ = 25oC, ISD = 1.6A, VGS = 0V (Figure 12) - - 1.6 V trr TJ = 150oC, ISD = 1.6A, dISD/dt = 100A/µs - 380 - ns QRR TJ = 150oC, ISD = 1.6A, dISD/dt = 100A/µs - 2.7 - µC NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. 4. VDD = 40V, starting TJ = 25oC, L = 44.89mH, RG = 50Ω, peak IAS = 1.4A. Typical Performance Curves Unless Otherwise Specified 0.4 POWER DISSIPATION MULTIPLIER 1.2 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.3 0.1 0.2 0 0 0 25 50 75 100 TA , CASE TEMPERATURE (oC) 125 25 150 75 50 FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE 150 2.20 VGS = 7V 1 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 1.76 10µs 100µs 0.1 1ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 00.1 TC = 25oC TJ = MAX RATED SINGLE PULSE 1 10ms ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 125 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 5 0.001 100 TC, CASE TEMPERATURE (oC) VGS = 6V 1.32 0.88 VGS = 5V 0.44 DC 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 3. FORWARD BIAS SAFE OPERATING AREA 4-295 VGS = 4V 1000 0 0 20 40 60 80 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. OUTPUT CHARACTERISTICS 100 IRFD310 Typical Performance Curves Unless Otherwise Specified (Continued) 2.20 2.20 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 1.76 VGS = 9V VGS = 8V VGS = 7V VGS = 6V 1.32 0.88 VGS = 5V 0.44 1.76 1.32 TJ = 125oC 0.88 TJ = 25oC TJ = -55oC 0.44 VGS = 4V 0 0 2 4 6 0 10 8 0 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 5. SATURATION CHARACTERISTICS FIGURE 6. TRANSFER CHARACTERISTICS 10 2.21 NORMALIZED DRAIN TO SOURCE ON RESISTANCE rDS(ON), DRAIN TO SOURSE ON RESISTANCE (Ω) 2µs PULSE TEST VGS = 10V 9 8 VGS = 20V 7 6 5 4 1 2 3 4 5 ID, DRAIN CURRENT (A) 6 7 0.82 -14 250 1.07 1.03 0.99 0.95 -14 27 68 109 150 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 4-296 27 68 109 150 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 200 C, CAPACITANCE (pF) NORMALIZED ON RESISTANCE 1.17 FIGURE 8. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE ID = 250µA 0.92 -55 1.52 TJ , JUNCTION TEMPERATURE (oC) FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 1.10 1.86 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 0.2A 0.47 -55 3 0 10 CISS 150 100 COSS 50 CRSS 0 0 10 30 40 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 50 FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE IRFD310 Typical Performance Curves Unless Otherwise Specified (Continued) 3.0 10 ISD, SOURCE TO DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S) PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 2.4 TJ = -55oC 1.8 TJ = 25oC TJ = 125oC 1.2 0.6 0 0 0.44 0.88 1.32 1.76 5.0 2.0 1.0 0.5 TJ = 150oC TJ = 25oC 0.2 0.1 2.2 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 0 1.0 2.0 3.0 4.0 VSD, SOURCE TO DRAIN VOLTAGE (V) I D , DRAIN CURRENT (A) FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT 5.0 FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE VGS, GATE TO SOURCE VOLTAGE (V) 20 ID = 4A VDS = 80V 15 VDS = 200V VDS = 320V 10 5 0 0 2 4 6 Qg, GATE CHARGE (nC) 8 10 FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE Test Circuits and Waveforms VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS tP IAS + RG - VGS VDS VDD VDD DUT 0V tP IAS 0 0.01Ω tAV FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT 4-297 FIGURE 15. UNCLAMPED ENERGY WAVEFORM IRFD310 Test Circuits and Waveforms (Continued) tON tOFF td(ON) td(OFF) tf tr RL VDS 90% 90% + RG - VDD 10% 10% 0 DUT 90% VGS VGS 0 FIGURE 17. GATE CHARGE TEST CIRCUIT VDS (ISOLATED SUPPLY) CURRENT REGULATOR 0.2µF 50% PULSE WIDTH 10% FIGURE 16. SWITCHING TIME TEST CIRCUIT 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50kΩ Qgd 0.3µF VGS Qgs D VDS DUT G 0 IG(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 18. GATE CHARGE TEST CIRCUIT IG(REF) 0 FIGURE 19. GATE CHARGE WAVEFORMS All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. 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