RFG75N05E Data Sheet July 1999 75A, 50V, 0.008 Ohm, N-Channel Power MOSFET Features These are N-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. • rDS(ON) = 0.008Ω File Number 2275.5 • 75A, 50V • Electrostatic Discharge Rated • UIS Rating Curve (Single Pulse) • 175oC Operating Temperature • Temperature Compensated PSPICE® Model Provided Symbol D Formerly developmental type TA09821. G Ordering Information PART NUMBER RFG75N05E PACKAGE TO-247 BRAND S RFG75N05E NOTE: When ordering, include the entire part number. Packaging JEDEC STYLE TO-247 SOURCE DRAIN GATE DRAIN (BOTTOM SIDE METAL) 4-481 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. PSPICE® is a registered trademark of MicroSim Corporation. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 RFG75N05E Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDSS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current (Current Limited by Package). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrostatic Discharge Rating, MIL-STD-883, Category B(2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ESD Single Pulse Avalanche Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg RFG75N05E 50 50 75 200 ±20 240 1.6 2 Refer to UIS SOA Curves -55 to 175 UNITS V V A A V W W/oC kV 300 260 oC oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA (Figure 9) 50 - - V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA (Figure 8) 2.0 - 4.0 V VDS = Rated BVDSS, VGS = 0V - - 1 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 150oC - - 25 µA VGS = ±20V - - ±100 nA VGS = 10V, ID = 75A (Figure 7) - - 0.008 Ω VDD = 25V, ID ≈ 37.5A, RL = 0.67Ω, RG = 1.67Ω, VGS = 10V, (Figure 11) - - 125 ns - 17 - ns Zero Gate Voltage Drain Current Gate to Source Leakage IDSS IGSS Drain to Source on Resistance (Note 2) rDS(ON) Turn On Time t(ON) Turn On Delay Time td(ON) Rise Time Turn Off Delay Time Fall Time Turn Off Time Total Gate Charge (Gate to Source + Gate to Drain) tr - 75 - ns td(OFF) - 70 - ns tf - 17 - ns t(OFF) - - 125 ns - - 400 nC - - 220 nC - - 15 nC Qg(TOT) VGS = 0, 20V Gate Charge at 10V Qg(10) VGS = 0, 10V Threshold Gate Charge Qg(TH) VGS = 0, 2V VDD = 40V, ID = 75A, RL = 0.53Ω IG(REF) = 3.44mA (Figure 11) Junction to Case RθJC - - 0.625 oC/W Junction to Ambient RθJA - - 80 oC/W Source to Drain Diode Specifications PARAMETER SYMBOL Source to Drain Diode Voltage VSD Diode Reverse Recovery Time trr TEST CONDITIONS MIN TYP MAX UNITS ISD = 75A - - 1.5 V ISD = 75A, dISD/dt = 100A/µs - - 125 ns NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive pulse: pulse width is limited by maximum junction temperature. 4. Refer to Intersil Application Notes AN9321 and AN9322. See Figure 4. 4-482 RFG75N05E Typical Performance Curves Unless Otherwise Specified 80 POWER DISSIPATION MULTIPLIER 1.2 70 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 60 50 40 30 20 10 0 25 0 0 25 50 75 100 125 TC , CASE TEMPERATURE (oC) 175 150 50 75 100 125 150 175 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 100 1000 IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) ID MAX CONTINUOUS OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 10 DC TC = 25oC TJ = MAX RATED SINGLE PULSE 1 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 102 IDS(ON), DRAIN TO SOURCE CURRENT (A) VGS = 10V VGS = 7.0V ID, DRAIN CURRENT (A) VGS = 6.0V 160 TC = 25oC PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 120 VGS = 5.0V 80 40 VGS = 4.0V 0 0 1.5 3.0 4.5 6.0 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 5. SATURATION CHARACTERISTICS 4-483 STARTING TJ = 25oC 100 STARTING TJ = 150oC If R = 0 tAV = (L)(IAS)/(1.3 RATED BVDSS - VDD) If R ≠ 0 tAV = (L/R)ln[(IAS*R)/(1.3 RATED BVDSS - VDD) +1] 10 0.01 0.10 1 tAV, TIME IN AVALANCHE (ms) 10 FIGURE 4. UNCLAMPED INDUCTIVE SWITCHING SOA (SINGLE PULSE UIS SOA) FIGURE 3. FORWARD BIAS SAFE OPERATING AREA 200 Idm 7.5 200 VDD > ID x rDS(ON) PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 160 -55oC 25oC 175oC 120 80 40 0 0 8 2 4 6 VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 6. TRANSFER CHARACTERISTICS 10 RFG75N05E Typical Performance Curves Unless Otherwise Specified (Continued) 2.0 ID = 75A, VGS = 10V PULSE DURATION = 80µs 2.5 DUTY CYCLE = 0.5% MAX NORMALIZED GATE THRESHOLD VOLTAGE 2.0 1.5 1.0 ID = 250µA VGS = VDS 1.6 1.2 0.8 0.4 0.5 0 -50 0 50 100 150 0 -50 200 TJ, JUNCTION TEMPERATURE (oC) 0 50 FIGURE 7. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 150 200 FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE 2.0 6000 ID = 250µA CISS 1.5 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 100 TJ, JUNCTION TEMPERATURE (oC) 1.0 0.5 4000 COSS VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 2000 CRSS 0 -50 0 50 100 150 0 200 0 TJ, JUNCTION TEMPERATURE (oC) VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 10 VDD = BVDSS VDD = BVDSS 8 GATE SOURCE VOLTAGE 30 6 RL = 0.667Ω IG(REF) = 3.44mA VGS = 10V 4 20 VDD = 0.75 BVDSS VDD = 0.50 BVDSS VDD = 0.25 BVDSS 10 2 DRAIN SOURCE VOLTAGE 0 0 I G ( REF ) 20 ------------------------I G ( ACT ) t, TIME (µs) I G ( REF ) 80 ------------------------I G ( ACT ) NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 11. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT 4-484 25 FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 50 40 10 15 20 5 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS , GATE TO SOURCE VOLTAGE (V) NORMALIZED DRAIN TO SOURCE ON RESISTANCE 3.0 RFG75N05E Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN REQUIRED PEAK IAS IAS + RG VDS VDD VDD - VGS DUT tP 0V IAS 0 0.01Ω tAV FIGURE 12. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 13. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) VDS td(OFF) tf tr VDS 90% 90% RL VGS + - DUT 10% 10% 0 VDD 90% RGS VGS VGS 0 50% 10% FIGURE 14. SWITCHING TIME TEST CIRCUIT 50% PULSE WIDTH FIGURE 15. RESISTIVE SWITCHING WAVEFORMS VDS VDD RL Qg(TOT) VDS VGS = 20V VGS Qg(10) + VDD DUT Ig(REF) VGS = 10V VGS - VGS = 2V 0 Qg(TH) Ig(REF) 0 FIGURE 16. GATE CHARGE TEST CIRCUIT 4-485 FIGURE 17. GATE CHARGE WAVEFORM RFG75N05E PSpice Electrical Model DPLCAP 5 LDRAIN DRAIN 10 2 .SUBCKT RFG75N05 2 1 3 ; rev 10/30/90 o *Nominal Temperature = 25 C CA 12 8 8.98e-9 CB 15 14 8.81e-9 DBREAK Cin 6 8 4.48e-9 DPLCAP 10 5 DPLCAPMOD 11 RDRAIN Dbody 7 5 DBODYMOD + Dbreak 5 11 DBREAKMOD DBODY ESG 6 EBREAK 17 Eds 14 8 5 8 1 8 18 + Egs 13 8 6 8 1 Esg 6 10 6 8 1 16 EVTO GATE LGATE RGATE Ebreak 11 7 17 18 58.4 + 18 6 1 MOS EVTEMP 20 6 18 8 1 9 20 22 IT 8 17 1 RIN CIN Ldrain 2 5 e-10 LSOURCE Lgate 1 9 5e-9 RSOURCE 8 3 Lsource 3 7 3e-9 7 SOURCE Mos 16 6 8 8 MODMOD Rbreak 17 18 RBREAKMOD 1 S1A S2A Rdrain 5 16 RSOURCEMOD 3.07e-3 RBREAK 12 15 14 13 Rgate 9 20 1.2 18 17 8 13 Rin 6 8 1e9 S1B S2B RVTEMP Rsource 8 7 RSOURCEMOD 2.e-3 13 CB RVTEMP 18 19 RVTONEGMOD 1 19 CA IT 14 S1a 6 12 13 8 S1AMOD + + VBAT 6 S1b 13 12 13 8 S1BMOD EDS 5 EGS + 8 8 S2A 6 15 14 13 S2AMOD 8 S2b 13 15 14 13 S2AMOD Vbat 8 19 DC 1 .MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.48 VOFF=-0.48) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=0.48 VOFF=-2.48) .MODEL S2AMOD VSWITCH (RON=1e=5 ROFF=0.1 VON=-2.25 VOFF=2.75) .MODEL S2ABMOD VSWITCH (RON=1e-5 ROFF=0.1 VON =2.75 VOFF=-2.25) .MODEL DBODYMOD D (IS=2.23e-12 RS=249e-3 TRS1=2.5e-3 CJO=7.55e-9 TT=4e-8) .MODEL DBREAKMOD D (RS=8e-2 TRS1=2.5e-3) .MODEL DPLCAPMOD D (IS=1e-30 N=10 CJO=2.14e-9) .MODEL RBREAKMOD RES (TC1=9.5e-4 TC2=-1.17e-6) .MODEL RSOURCEMOD RES (TC1=5.2e-3 TC2=1.37e-5) .MODEL RVTONEGMOD RES (TC1=-3.78e-3 TC2=-7.51e-7) .MODEL MODMOD NMOS (VTO=3.48 N=10 IS=1e-30 KP=78.5 TOX=1 L=1u W1u) .ENDS All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. 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