INTERSIL IRFF9220

IRFF9220
Data Sheet
July 1998
-2.5A, -200V, 1.5 Ohm, P-Channel Power
MOSFETs
• -2.5A, -200V
• rDS(ON) = 1.5Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
Symbol
Formerly develpomental type TA17502.
D
Ordering Information
IRFF9220
PACKAGE
TO-205AF
2288.2
Features
These are advanced power MOSFETs designed, tested, and
guaranteed to withstand a specified level of energy in the
breakdown avalanche mode of operation. They are P-Channel
enhancement mode silicon gate power field effect transistors
designed for applications such as switching regulators,
switching converters, motor drivers, relay drivers and drivers for
high power bipolar switching transistors requiring high speed
and low gate drive power. These types can be operated directly
from integrated circuits.
PART NUMBER
File Number
BRAND
G
IRFF9220
NOTE: When ordering, use the entire part number.
S
Packaging
JEDEC TO-205AF
DRAIN
(CASE)
SOURCE
GATE
4-107
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
IRFF9220
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
IRFF9220
-200
-200
-2.5
-10
±20
20
0.16
290
-55 to 150
UNITS
V
V
A
A
V
W
W/oC
mJ
oC
300
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
Drain to Source Breakdown Voltage
BVDSS
ID = -250µA, VGS = 0V, (Figure 10)
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = -250µA
Zero Gate Voltage Drain Current
On-State Drain Current (Note 2)
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
IDSS
ID(ON)
IGSS
rDS(ON)
gfs
td(ON)
Rise Time
tr
Turn-Off Delay Time
td(OFF)
Fall Time
tf
Total Gate Charge
(Gate to Source + Gate to Drain)
Gate to Source Charge
Qg(TOT)
Qgs
Gate to Drain “Miller” Charge
Qgd
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
MIN
TYP
MAX
UNITS
-200
-
-
V
-2
-
-4
V
VDS = Rated BVDSS, VGS = 0V
-
-
-25
µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC
-
-
-250
µA
-2.5
-
-
A
VDS > ID(ON) x rDS(ON)MAX, VGS = -10V
VGS = ±20V
-
-
±100
nA
ID = 1.5A, VGS = -10V, (Figures 8, 9)
-
1.0
1.5
Ω
VDS > ID(ON) x rDS(ON)MAX, ID = 1.5A,
(Figure 12)
1
1.8
-
S
VDD = 0.5 x Rated BVDSS, ID = -2.5A, RGS = 9.1Ω,
RL = 38.5Ω for BVDSS = -200V
RL = 28.5Ω for BVDSS = -150V
(Figures 17, 18) MOSFET Switching Times are
Essentially Independent of Operating
Temperature
-
15
40
ns
-
25
50
ns
-
80
120
ns
-
50
75
ns
VGS = -10V, ID = -2.5A, VDS = 0.8 x Rated BVDSS
IG(REF) = -1.5mA, (Figures 14, 19, 20)
Gate Charge is Essentially Independent of
Operating Temperature
-
16
22
nC
-
9
-
nC
-
7
-
nC
VDS = -25V, VGS = 0V, f = 1MHz, (Figure 11)
-
350
-
pF
-
100
-
pF
Internal Drain Inductance
LD
Measured From the Drain
Lead, 5mm (0.2in) From
Header To Center of Die
Internal Source Inductance
LS
Measured From the Source
Lead, 5mm (0.2in) From
Header to Source Bonding
Pad
Modified MOSFET
Symbol Showing the Internal Devices
Inductances
D
-
30
-
pF
-
5.0
-
nH
-
15
-
nH
-
-
6.25
oC/W
-
-
175
oC/W
LD
G
LS
S
Thermal Resistance Junction to Case
RθJC
Thermal Resistance
Junction to Ambient
RθJA
4-108
Typical Socket Mount
IRFF9220
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Continuous Source to Drain Current
ISD
Pulse Source to Drain Current
(Note 3)
ISDM
TEST CONDITIONS
Modified MOSFET Symbol
Showing the Integral Reverse P-N Junction Rectifier
MIN
TYP
MAX
UNITS
-
-
-2.5
A
-
-
-10
A
-
-
-1.5
V
-
300
-
ns
-
1.9
-
µC
D
G
S
Source to Drain Diode Voltage (Note 2)
VSD
Reverse Recovery Time
trr
Reverse Recovery Charge
QRR
TC = 25oC, ISD = -2.5A, VGS = 0V, (Figure 13)
TJ = 150oC, ISD = -2.5A, dISD/dt = 100A/µs
TJ = 150oC, ISD = -2.5A, dISD/dt = 100A/µs
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 69.6mH, RG = 25Ω, peak IAS = 2.5A (Figures 15, 16).
Typical Performance Curves
Unless Otherwise Specified
-2.5
ID, DRAIN CURRENT (A)
1.0
0.8
0.6
0.4
0.2
-2.0
-1.5
-1.0
-0.5
0
0
0
25
50
75
100
TC , CASE TEMPERATURE (oC)
125
150
25
50
75
100
125
150
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
ZθJC, NORMALIZED
TRANSIENT THERMAL IMPEDANCE
POWER DISSIPATION MULTIPLIER
1.2
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
1.0
0.5
0.2
0.1
0.1
PDM
0.05
0.02
SINGLE PULSE
0.01
0.01
10-5
10-4
10-3
10-2
10-1
t 1, RECTANGULAR PULSE DURATION (s)
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
4-109
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
1
10
IRFF9220
Typical Performance Curves
Unless Otherwise Specified (Continued)
-20
-5
10µs
100µs
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
-10
1ms
-1.0
10ms
OPERATION IN THIS AREA
IS LIMITED BY rDS(ON)
100ms
-0.1
DC
TC = 25oC
TJ = MAX RATED
SINGLE PULSE
-0.01
-1.0
-10V
-9V
-4
VGS = -6V
-3
PULSE DURATION = 80µs
-2
VGS = -5V
-1
VGS = -4V
0
-10
-100
VDS, DRAIN TO SOURCE VOLTAGE (V)
-1000
0
-10
VGS = -7V
VGS = -8V
VGS = -9V
VGS = -10V
VGS = -6V
VGS = -5V
-1
VGS = -4V
0
-4
-2
-3
-1
VDS, DRAIN TO SOURCE VOLTAGE (V)
0
-4
TJ = 125oC
TJ = 25oC
-3
TJ = -55oC
-2
-1
0
-5
0
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
ON RESISTANCE (Ω)
rDS(ON), DRAIN TO SOURCE
VGS = -10V, ID = -1.5A
4
3
VGS = -10V
2
VGS = - 20V
0
12
8
ID, DRAIN CURRENT (A)
16
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
4-110
-10
2.5
PULSE DURATION = 2µs
4
-2
-4
-6
-8
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 7. TRANSFER CHARACTERISTICS
5
0
-50
PULSE DURATION = 80µs
VDS ≥ I D(ON) x rDS(ON) MAX
FIGURE 6. SATURATION CHARACTERISTICS
1
-40
-5
ID(ON), DRAIN TO SOURCE CURRENT (A)
ID, DRAIN CURRENT (A)
PULSE DURATION = 80µs
-2
-30
FIGURE 5. OUTPUT CHARACTERISTICS
-5
-4
-20
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
-3
VGS = -7V
VGS = -8V
20
2.0
1.5
1.0
0.5
0
-40
0
40
80
120
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
160
IRFF9220
Typical Performance Curves
Unless Otherwise Specified (Continued)
500
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
ID = 250µA
400
1.15
C, CAPACITANCE (pF)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
1.25
1.05
0.95
CISS
300
200
COSS
100
0.85
CRSS
0.75
-40
0
40
80
120
0
160
-10
0
TJ , JUNCTION TEMPERATURE (oC)
-30
-40
-50
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
-100
4.0
ISD, SOURCE TO DRAIN CURRENT (A)
PULSE DURATION = 80µs
3.2
TJ = -55oC
2.4
TJ = 25oC
TJ = 125oC
1.6
0.8
0
0
-1
-2
-3
-4
-10
TJ = 150oC
TJ = 25oC
-1.0
-0.1
-0.4
-5
-0.6
ID , DRAIN CURRENT (A)
-0.8
ID = -2.5A
-5
-10
VDS = -100V
VDS = -60V
VDS = -40V
-20
0
4
8
12
16
Qg(TOT), TOTAL GATE CHARGE (nC)
20
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
4-111
-1.2
-1.4
-1.6
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
0
-15
-1.0
VSD, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
VGS, GATE TO SOURCE VOLTAGE (V)
gfs, TRANSCONDUCTANCE (S)
-20
-1.8
IRFF9220
Test Circuits and Waveforms
VDS
tAV
L
0
VARY tP TO OBTAIN
-
RG
REQUIRED PEAK IAS
+
VDD
DUT
0V
VDD
tP
VGS
IAS
IAS
VDS
tP
0.01Ω
BVDSS
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON
tOFF
td(OFF)
td(ON)
tr
0
RL
-
DUT
VGS
+
10%
10%
VDS
VDD
RG
tf
VGS
0
90%
90%
10%
50%
50%
PULSE WIDTH
90%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
-VDS
(ISOLATED
SUPPLY)
CURRENT
REGULATOR
0
VDS
DUT
12V
BATTERY
0.2µF
50kΩ
0.3µF
Qgs
Qg(TOT)
DUT
G
VGS
Qgd
D
VDD
0
S
IG(REF)
IG CURRENT
SAMPLING
RESISTOR
+VDS
ID CURRENT
SAMPLING
RESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
4-112
0
IG(REF)
FIGURE 20. GATE CHARGE WAVEFORMS
IRFF9220
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
4-113
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029