HGTG5N120CND, HGTP5N120CND, HGT1S5N120CNDS Data Sheet January 2000 25A, 1200V, NPT Series N-Channel IGBT with Anti-Parallel Hyperfast Diode The HGTG5N120CND, HGTP5N120CND and HGT1S5N120CNDS are Non-Punch Through (NPT) IGBT designs. They are new members of the MOS gated high voltage switching IGBT family. IGBTs combine the best features of MOSFETs and bipolar transistors. This device has the high input impedance of a MOSFET and the low on-state conduction loss of a bipolar transistor. The IGBT used is developmental type TA49309. The diode used in anti-parallel is developmental type TA49058. The IGBT is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential, such as AC and DC motor controls, power supplies and drivers for solenoids, relays and contactors. File Number Features • 25A, 1200V, TC = 25oC • 1200V Switching SOA Capability • Typical Fall Time. . . . . . . . . . . . . . . . 350ns at TJ = 150oC • Short Circuit Rating • Low Conduction Loss • Temperature Compensating SABER™ Model Thermal Impedance SPICE Model www.intersil.com • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Packaging JEDEC TO-220AB ALTERNATE VERSION Formerly Developmental Type TA49307. E Ordering Information PART NUMBER PACKAGE 4598.2 BRAND HGTG5N120CND TO-247 5N120CND HGTP5N120CND TO-220AB 5N120CND HGT1S5N120CNDS TO-263AB 5N120CND C G COLLECTOR (FLANGE) JEDEC TO-263AB NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in Tape and Reel, i.e., HGT1S5N120CNDS9A. COLLECTOR (FLANGE) G E Symbol C JEDEC STYLE TO-247 E C G G E COLLECTOR (FLANGE) INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,598,461 4,682,195 4,803,533 4,888,627 4,417,385 4,605,948 4,684,413 4,809,045 4,890,143 4,430,792 4,620,211 4,694,313 4,809,047 4,901,127 1 4,443,931 4,631,564 4,717,679 4,810,665 4,904,609 4,466,176 4,639,754 4,743,952 4,823,176 4,933,740 4,516,143 4,639,762 4,783,690 4,837,606 4,963,951 4,532,534 4,641,162 4,794,432 4,860,080 4,969,027 4,587,713 4,644,637 4,801,986 4,883,767 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000 SABER™ is a trademark of Analogy, Inc. HGTG5N120CND, HGTP5N120CND, HGT1S5N120CNDS Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCES Collector Current Continuous At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110 Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM Switching Safe Operating Area at TJ = 150oC, Figure 2 . . . . . . . . . . . . . . . . . . . . . . . . SSOA Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Lead Temperature for Soldering Leads at 0.063in (1.6mm) from case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, see Tech Brief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg Short Circuit Withstand Time (Note 2) at VGE = 15V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC Short Circuit Withstand Time (Note 2) at VGE = 12V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC HGTG5N120CND HGTP5N120CND HGT1S5N120CNDS UNITS 1200 V 25 12 40 ±20 ±30 30A at 1200V 167 1.33 -55 to 150 A A A V V W W/oC oC 300 260 oC 8 15 µs µs oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Pulse width limited by maximum junction temperature. 2. VCE(PK) = 840V, TJ = 125oC, RG = 25Ω . TC = 25oC, Unless Otherwise Specified Electrical Specifications PARAMETER SYMBOL Collector to Emitter Breakdown Voltage Collector to Emitter Leakage Current Collector to Emitter Saturation Voltage Gate to Emitter Threshold Voltage BVCES ICES VCE(SAT) VGE(TH) TEST CONDITIONS IC = 250µA, VGE = 0V VCE = BVCES IC = 5.5A, VGE = 15V TC = 25oC TC = 125oC TC = 150oC TC = 25oC TC = 150oC IC = 45µA, VCE = VGE MIN TYP MAX UNITS 1200 - - V - - 250 µA - 100 - µA - - 2 mA - 2.1 2.4 V - 2.9 3.5 V 6.0 7.0 - V - - ±250 nA 25 - - A IGES VGE = ±20V Switching SOA SSOA TJ = 150oC, RG = 25Ω, VGE = 15V, L = 200µH, VCE(PK) = 1200V Gate to Emitter Plateau Voltage VGEP IC = 5.5A, VCE = 0.5 BVCES - 10.6 - V IC = 5.5A, VCE = 0.5 BVCES VGE = 15V - 45 55 nC VGE = 20V - 60 75 nC - 22 30 ns - 12 16 ns - 180 250 ns - 280 350 ns - 400 500 µJ - 640 700 µJ Gate to Emitter Leakage Current On-State Gate Charge QG(ON) Current Turn-On Delay Time td(ON)I Current Rise Time trI Current Turn-Off Delay Time td(OFF)I Current Fall Time tfI Turn-On Energy EON Turn-Off Energy (Note 3) EOFF 2 IGBT and Diode at TJ = 25oC ICE = 5.5A VCE = 0.8 BVCES VGE = 15V RG = 25Ω L = 5mH Test Circuit (Figure 20) HGTG5N120CND, HGTP5N120CND, HGT1S5N120CNDS TC = 25oC, Unless Otherwise Specified (Continued) Electrical Specifications PARAMETER SYMBOL Current Turn-On Delay Time td(ON)I Current Rise Time trI Current Turn-Off Delay Time td(OFF)I Current Fall Time tfI Turn-On Energy EON Turn-Off Energy (Note 3) EOFF Diode Forward Voltage VEC Diode Reverse Recovery Time trr Thermal Resistance Junction To Case RθJC TEST CONDITIONS MIN TYP MAX UNITS - 20 25 ns - 12 16 ns - 225 300 ns - 350 400 ns - 1 1.2 mJ - 1 1.1 mJ IEC = 5.5A - 2.4 3.3 V IEC = 5.5A, dIEC/dt = 200A/µs - 48 60 ns IEC = 1A, dIEC/dt = 200A/µs - 30 40 ns IGBT - - 0.75 oC/W Diode - - 1.9 oC/W IGBT and Diode at TJ = 150oC ICE = 5.5A VCE = 0.8 BVCES VGE = 15V RG = 25Ω L = 5mH Test Circuit (Figure 20) NOTE: 3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Unless Otherwise Specified ICE , DC COLLECTOR CURRENT (A) 25 VGE = 15V 20 15 10 5 0 25 50 75 100 125 TC , CASE TEMPERATURE (oC) FIGURE 1. DC COLLECTOR CURRENT vs CASE TEMPERATURE 3 150 ICE, COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves 35 TJ = 150oC, RG = 25Ω, VGE = 15V, L = 200µH 30 25 20 15 10 5 0 0 200 400 600 800 1000 1200 VCE , COLLECTOR TO EMITTER VOLTAGE (V) 1400 FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA HGTG5N120CND, HGTP5N120CND, HGT1S5N120CNDS TJ = 150oC, RG = 25Ω, L = 5mH, V CE = 960V 100 50 TC VGE 75oC 75oC 110oC 110oC 15V 12V 15V 12V TC = 75oC, VGE = 5V IDEAL DIODE fMAX1 = 0.05 / (td(OFF)I + td(ON)I) fMAX2 = (PD - PC) / (EON + EOFF) PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) RØJC = 0.75oC/W, SEE NOTES 20 10 2 1 3 5 10 35 60 30 ISC 25 50 20 40 30 15 tSC 25 TC = 150oC 15 TC = 25oC 10 DUTY CYCLE < 0.5%, VGE = 12V 250µs PULSE TEST 0 1 6 8 2 3 4 5 7 9 VCE, COLLECTOR TO EMITTER VOLTAGE (V) 10 TJ = 150oC, VGE = 15V, VGE = 12V 2000 1500 1000 500 TJ = 25oC, VGE = 15V, VGE = 12V 0 4 5 6 7 8 9 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT 4 15 80 DUTY CYCLE < 0.5%, VGE = 15V 250µs PULSE TEST 70 60 50 TC = -55oC 40 TC = 150oC 30 20 TC = 25oC 10 0 0 2 4 6 8 10 FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE EOFF, TURN-OFF ENERGY LOSS (µJ) EON , TURN-ON ENERGY LOSS (mJ) 2500 3 14 1750 RG = 25Ω, L = 5mH, VCE = 960V 2 13 VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE 3000 ICE, COLLECTOR TO EMITTER CURRENT (A) ICE, COLLECTOR TO EMITTER CURRENT (A) 30 0 12 FIGURE 4. SHORT CIRCUIT WITHSTAND TIME 35 5 11 VGE , GATE TO EMITTER VOLTAGE (V) FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO EMITTER CURRENT TC = -55oC 20 10 10 ICE, COLLECTOR TO EMITTER CURRENT (A) 20 70 VCE = 840V, RG = 25Ω, TJ = 125oC ISC, PEAK SHORT CIRCUIT CURRENT (A) fMAX, OPERATING FREQUENCY (kHz) 200 Unless Otherwise Specified (Continued) tSC , SHORT CIRCUIT WITHSTAND TIME (µs) Typical Performance Curves 10 RG = 25Ω, L = 5mH, VCE = 960V 1500 TJ = 150oC, VGE = 12V OR 15V 1250 1000 750 500 TJ = 25oC, VGE = 12V OR 15V 250 0 1 2 3 4 5 6 7 8 9 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT 10 HGTG5N120CND, HGTP5N120CND, HGT1S5N120CNDS Typical Performance Curves Unless Otherwise Specified (Continued) 40 40 RG = 25Ω, L = 5mH, VCE = 960V 35 35 30 trI , RISE TIME (ns) tdI , TURN-ON DELAY TIME (ns) RG = 25Ω, L = 5mH, VCE = 960V TJ = 25oC, TJ = 150oC, VGE = 12V 25 30 TJ = 25oC, TJ = 150oC, VGE = 12V 25 20 15 20 10 TJ = 25oC, TJ = 150oC, VGE = 15V 15 2 3 4 6 5 7 8 9 0 10 TJ = 25oC, TJ = 150oC, VGE = 15V 2 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO EMITTER CURRENT 900 RG = 25Ω, L = 5mH, VCE = 960V 400 TJ = 150oC, VGE = 12V, VGE = 15V 300 200 700 600 500 100 100 2 3 4 5 6 7 8 9 ICE , COLLECTOR TO EMITTER CURRENT (A) 10 1 2 3 5 4 6 7 8 9 ICE , COLLECTOR TO EMITTER CURRENT (A) 10 FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER CURRENT DUTY CYCLE < 0.5%, VCE = 20V 250µs PULSE TEST 90 VGE, GATE TO EMITTER VOLTAGE (V) 16 100 TC = 25oC 80 70 TC = -55oC 60 50 TC = 150oC 40 30 20 10 0 TJ = 25oC, VGE = 12V AND 15V 200 TJ = 25oC, VGE = 12V, VGE = 15V 1 TJ = 150oC, VGE = 12V AND 15V 400 300 FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO EMITTER CURRENT ICE, COLLECTOR TO EMITTER CURRENT (A) RG = 25Ω, L = 5mH, VCE = 960V 800 500 0 10 FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO EMITTER CURRENT tfI , FALL TIME (ns) td(OFF)I , TURN-OFF DELAY TIME (ns) 600 3 4 5 6 7 8 9 ICE , COLLECTOR TO EMITTER CURRENT (A) 14 VCE = 1200V 12 10 8 6 4 2 IG(REF) = 1mA, RL = 120Ω, TC = 25oC 0 6 7 13 14 8 9 11 12 10 VGE, GATE TO EMITTER VOLTAGE (V) FIGURE 13. TRANSFER CHARACTERISTIC 5 15 16 VCE = 800V VCE = 400V 0 10 20 30 40 50 QG , GATE CHARGE (nC) FIGURE 14. GATE CHARGE WAVEFORMS 60 HGTG5N120CND, HGTP5N120CND, HGT1S5N120CNDS C, CAPACITANCE (nF) 2.0 Unless Otherwise Specified (Continued) FREQUENCY = 1MHz 1.5 CIES 1.0 0.5 COES CRES 0 0 5 10 15 20 25 ICE, COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves 7 DUTY CYCLE < 0.5%, TC = 110oC 250µs PULSE TEST VGE = 15V 6 5 VGE = 10V 4 3 2 1 0 0 0.5 VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER VOLTAGE ZθJC , NORMALIZED THERMAL RESPONSE 1.0 2.0 1.5 2.5 3.0 3.5 VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 16. COLLECTOR TO EMITTER ON-STATE VOLTAGE 100 0.50 0.20 t1 0.10 10-1 PD 0.05 t2 0.02 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZθJC X RθJC) + TC 0.01 SINGLE PULSE 10-2 10-5 10-4 10-3 10-2 10-1 100 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 17. NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE 60 tr, RECOVERY TIMES (ns) IEC, FORWARD CURRENT (A) 100 25oC 10 50 trr 40 ta 30 20 tb 10 -55oC 150oC TC = 25oC, dIEC/dt = 200A/µs 0 1 0 1 2 3 4 5 6 7 VEC, FORWARD VOLTAGE (V) FIGURE 18. DIODE FORWARD CURRENT vs FORWARD VOLTAGE DROP 6 8 1 2 3 4 5 IEC, FORWARD CURRENT (A) 6 FIGURE 19. RECOVERY TIMES vs FORWARD CURRENT 7 HGTG5N120CND, HGTP5N120CND, HGT1S5N120CNDS Test Circuit and Waveforms HGTP5N120CND 90% 10% VGE EON L = 5mH EOFF VCE RG = 25Ω 90% + - VDD = 960V ICE 10% td(OFF)I trI tfI td(ON)I FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 21. SWITCHING TEST WAVEFORMS Handling Precautions for IGBTs Operating Frequency Information Insulated Gate Bipolar Transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows fMAX1 or fMAX2; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as “ECCOSORBD™ LD26” or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate opencircuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended. fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 21. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJM. td(OFF)I is important when controlling output ripple under a lightly loaded condition. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC. The sum of device switching and conduction losses must not exceed PD. A 50% duty factor was used (Figure 3) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. EON and EOFF are defined in the switching waveforms shown in Figure 21. EON is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turn-off. All tail losses are included in the calculation for EOFF; i.e., the collector current equals zero (ICE = 0). All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com 7 ECCOSORBD™ is a trademark of Emerson and Cumming, Inc.