LF PA K 33 BUK9M120-100E N-channel 100 V, 120 mΩ logic level MOSFET in LFPAK33 16 May 2016 Product data sheet 1. General description Logic level N-channel MOSFET in an LFPAK33 (Power33) package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use in high performance automotive applications. 2. Features and benefits • • • • Q101 compliant Repetitive avalanche rated Suitable for thermally demanding environments due to 175 °C rating True logic level gate with VGS(th) rating of greater than 0.5 V at 175 °C 3. Applications • • • • 12 V, 24 V and 48 V automotive systems Motors, lamps and solenoid control Transmission control Ultra high performance power switching 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - - 100 V ID drain current VGS = 5 V; Tmb = 25 °C; Fig. 2 - - 11.5 A Ptot total power dissipation Tmb = 25 °C; Fig. 1 - - 44 W VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 11 - 100 120 mΩ ID = 5 A; VDS = 80 V; VGS = 5 V; - 3.9 - nC Static characteristics RDSon drain-source on-state resistance Dynamic characteristics QGD gate-drain charge Tj = 25 °C; Fig. 13; Fig. 14 Scan or click this QR code to view the latest information for this product BUK9M120-100E NXP Semiconductors N-channel 100 V, 120 mΩ logic level MOSFET in LFPAK33 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S Source 2 S Source 3 S Source 4 G Gate mb D Mounting base; connected to drain Graphic symbol D G mbb076 1 2 3 S 4 LFPAK33 (SOT1210) 6. Ordering information Table 3. Ordering information Type number Package BUK9M120-100E Name Description Version LFPAK33 Plastic single ended surface mounted package (LFPAK33); 8 leads SOT1210 7. Marking Table 4. Marking codes Type number Marking code BUK9M120-100E 912010 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - 100 V VDGR drain-gate voltage RGS = 20 kΩ - 100 V VGS gate-source voltage DC; Tj ≤ 175 °C -10 10 V -15 15 V Pulsed; Tj ≤ 175 °C [1][2] Ptot total power dissipation Tmb = 25 °C; Fig. 1 - 44 W ID drain current VGS = 5 V; Tmb = 25 °C; Fig. 2 - 11.5 A VGS = 5 V; Tmb = 100 °C; Fig. 2 - 8.1 A pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3 - 46 A IDM peak drain current BUK9M120-100E Product data sheet All information provided in this document is subject to legal disclaimers. 16 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 2 / 13 BUK9M120-100E NXP Semiconductors N-channel 100 V, 120 mΩ logic level MOSFET in LFPAK33 Symbol Parameter Tstg Tj Conditions Min Max Unit storage temperature -55 175 °C junction temperature -55 175 °C Source-drain diode IS source current Tmb = 25 °C - 11.5 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 46 A - 13.2 mJ Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy ID = 11.5 A; Vsup ≤ 100 V; RGS = 50 Ω; [3][4] VGS = 5 V; Tj(init) = 25 °C; unclamped; Fig. 4 [1] [2] [3] [4] Accumulated pulse duration up to 50 hours delivers zero defect ppm. Significantly longer life times are achieved by lowering Tj and or VGS Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. Refer to application note AN10273 for further information. 03aa16 120 ID (A) Pder (%) aaa020927 12 10 8 80 6 4 40 2 0 Fig. 1. 0 50 100 150 Tmb (°C) Normalized total power dissipation as a function of mounting base temperature BUK9M120-100E Product data sheet 0 200 0 25 50 75 100 125 150 175 Tmb (°C) 200 VGS ≥ 5 V Fig. 2. Continuous drain current as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. 16 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 3 / 13 BUK9M120-100E NXP Semiconductors N-channel 100 V, 120 mΩ logic level MOSFET in LFPAK33 ID (A) aaa-020929 102 Limit RDSon = VDS / ID tp = 10 us 10 100 us 1 DC 1 ms 10 ms 100 ms 10-1 10-2 1 102 10 103 VDS (V) Tmb = 25 °C; IDM is a single pulse Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage IAL (A) aaa-020928 102 10 (1) 1 (2) (3) 10-1 10-2 10-3 10-2 10-1 1 tAL (ms) 10 (1) Tj (init) = 25 °C; (2) Tj (init) = 150 °C; (3) Repetitive Avalanche Fig. 4. Avalanche rating; avalanche current as a function of avalanche time 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Fig. 5 - 2.77 3.4 K/W BUK9M120-100E Product data sheet All information provided in this document is subject to legal disclaimers. 16 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 4 / 13 BUK9M120-100E NXP Semiconductors N-channel 100 V, 120 mΩ logic level MOSFET in LFPAK33 aaa-020930 10 Zth(j-mb) (K/W) δ = 0.5 1 0.2 0.1 0.05 10-1 0.02 P single shot δ= tp 10-2 10-6 Fig. 5. 10-5 10-4 10-3 10-2 tp T t T 10-1 1 tp (s) Transient thermal impedance from junction to mounting base as a function of pulse duration 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 100 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 90 - - V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; 1.4 1.7 2.05 V - - 2.45 V 0.5 - - V VDS = 100 V; VGS = 0 V; Tj = 25 °C - 0.01 1 µA VDS = 100 V; VGS = 0 V; Tj = 175 °C - - 500 µA VGS = 10 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = -10 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 11 - 100 120 mΩ VGS = 10 V; ID = 5 A; Tj = 25 °C; Fig. 11 - 96 119 mΩ VGS = 5 V; ID = 5 A; Tj = 175 °C; Fig. 12 - - 340 mΩ Static characteristics V(BR)DSS VGS(th) Fig. 9; Fig. 10 ID = 1 mA; VDS = VGS; Tj = -55 °C; Fig. 10 ID = 1 mA; VDS = VGS; Tj = 175 °C; Fig. 10 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance Dynamic characteristics QG(tot) total gate charge ID = 5 A; VDS = 80 V; VGS = 5 V; - 8.8 - nC QGS gate-source charge Tj = 25 °C; Fig. 13; Fig. 14 - 1.7 - nC QGD gate-drain charge - 3.9 - nC BUK9M120-100E Product data sheet All information provided in this document is subject to legal disclaimers. 16 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 5 / 13 BUK9M120-100E NXP Semiconductors N-channel 100 V, 120 mΩ logic level MOSFET in LFPAK33 Symbol Parameter Conditions Min Typ Max Unit Ciss input capacitance VDS = 25 V; VGS = 0 V; f = 1 MHz; - 663 882 pF Coss output capacitance Tj = 25 °C; Fig. 15 - 52 63 pF Crss reverse transfer capacitance - 35 48 pF td(on) turn-on delay time VDS = 80 V; RL = 15 Ω; VGS = 5 V; - 6.1 - ns tr rise time RG(ext) = 5 Ω; Tj = 25 °C - 9.1 - ns td(off) turn-off delay time - 14.1 - ns tf fall time - 8.3 - ns Source-drain diode VSD source-drain voltage IS = 5 A; VGS = 0 V; Tj = 25 °C; Fig. 16 - 0.84 1.2 V trr reverse recovery time IS = 5 A; dIS/dt = -100 A/µs; VGS = 0 V; - 27.4 - ns recovered charge VDS = 25 V; Tj = 25 °C - 35.5 - nC Qr ID (A) aaa-020931 10 10 V 2.8 V 3.5 V 8 3V aaa-020932 300 RDSon (mΩ) 250 200 6 VGS = 2.6 V 150 4 100 2.4 V 2 50 2.2 V 0 Fig. 6. 0 1 2 3 VDS (V) 0 4 0 2 4 6 8 10 12 14 VGS (V) 16 Tj = 25 °C Tj = 25 °C; ID = 5 A Output characteristics; drain current as a Fig. 7. function of drain-source voltage; typical values Drain-source on-state resistance as a function of gate-source voltage; typical values BUK9M120-100E Product data sheet All information provided in this document is subject to legal disclaimers. 16 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 6 / 13 BUK9M120-100E NXP Semiconductors N-channel 100 V, 120 mΩ logic level MOSFET in LFPAK33 ID (A) aaa-020933 20 003aah026 10-1 ID (A) 10-2 15 min 10-3 typ max 10 10-4 5 175°C 0 0 1 2 10-5 Tj = 25°C 3 VGS (V) 10-6 4 VDS = 12 V Fig. 8. 0 1 2 3 V GS (V) Tj = 25 °C; VDS = 5 V Transfer characteristics; drain current as a function of gate-source voltage; typical values 003aah025 3 VGS(th) (V) 2.5 Fig. 9. Sub-threshold drain current as a function of gate-source voltage aaa-020934 300 RDSon (mΩ) 250 2.4 V 2.6 V 2.8 V max 2 200 typ 1.5 3V 150 min 1 100 VGS = 10 V 0.5 0 -60 0 60 120 Tj (° C) 0 180 0 2 4 6 8 ID (A) 10 Tj = 25 °C Fig. 10. Gate-source threshold voltage as a function of junction temperature Product data sheet 3.5 V 50 ID = 1mA; VDS = VGS BUK9M120-100E 4.5 V Fig. 11. Drain-source on-state resistance as a function of drain current; typical values All information provided in this document is subject to legal disclaimers. 16 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 7 / 13 BUK9M120-100E NXP Semiconductors N-channel 100 V, 120 mΩ logic level MOSFET in LFPAK33 003aaj820 3 VGS (V) a 2.4 8 1.8 6 1.2 4 0.6 2 0 -60 0 60 120 Tj ( °C) 0 180 Fig. 12. Normalized drain-source on-state resistance factor as a function of junction temperature aaa-020935 10 VDS = 14 V 80 V 0 5 10 15 QG (nC) Tj = 25 °C; ID = 5 A Fig. 13. Gate-source voltage as a function of gate charge; typical values aaa-020936 103 C (pF) VDS ID 20 Ciss VGS(pl) 102 VGS(th) VGS Coss QGS2 QGS1 QGS QGD QG(tot) Crss 003aaa508 10 10-1 Fig. 14. Gate charge waveform definitions 1 10 VDS (V) 102 VGS = 0 V; f = 1 MHz Fig. 15. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK9M120-100E Product data sheet All information provided in this document is subject to legal disclaimers. 16 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 8 / 13 BUK9M120-100E NXP Semiconductors N-channel 100 V, 120 mΩ logic level MOSFET in LFPAK33 IS (A) aaa-020937 50 40 30 20 10 0 175°C 0 0.2 0.4 0.6 Tj = 25°C 0.8 1 VSD (V) 1.2 VGS = 0 V Fig. 16. Source-drain (diode forward) current as a function of source-drain (diode forward) voltage; typical values 11. Application information For guidance on how to use and understand this datasheet, please refer to application note AN11158 "Understanding power MOSFET datasheet parameters". BUK9M120-100E Product data sheet All information provided in this document is subject to legal disclaimers. 16 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 9 / 13 BUK9M120-100E NXP Semiconductors N-channel 100 V, 120 mΩ logic level MOSFET in LFPAK33 12. Package outline Plastic single ended surface mounted package (LFPAK33); 8 leads E e1 L SOT1210 A A c1 b1 E1 D2 mounting base D1 D H 1 4 e b w X A A1 c C θ Lp y C detail X 0 2.5 5 mm scale Dimensions Unit(1) A A1 b b1 c c1 D(1) D1 D2 E(1) E1 e e1 H L Lp w y max 0.90 0.10 0.35 0.35 0.20 0.30 2.70 2.35 3.40 2.45 3.40 0.25 0.50 nom 0.50 0.65 0.65 0.20 0.10 3.20 2.00 3.20 0.13 0.30 min 0.80 0.00 0.25 0.25 0.10 0.20 2.50 1.90 mm Note 1. Plastic or metal protrusions of 0.15 mm per side are not included. Outline version JEDEC 8° 0° sot1210_po References IEC θ JEITA European projection Issue date 12-03-12 14-04-25 SOT1210 Fig. 17. Package outline LFPAK33 (SOT1210) BUK9M120-100E Product data sheet All information provided in this document is subject to legal disclaimers. 16 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 10 / 13 BUK9M120-100E NXP Semiconductors N-channel 100 V, 120 mΩ logic level MOSFET in LFPAK33 In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 13. Legal information 13.1 Data sheet status Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. 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Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. 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Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. 16 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 11 / 13 BUK9M120-100E NXP Semiconductors N-channel 100 V, 120 mΩ logic level MOSFET in LFPAK33 No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 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Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................2 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 5 11 Application information .........................................9 12 Package outline ................................................... 10 13 13.1 13.2 13.3 13.4 Legal information .................................................11 Data sheet status ............................................... 11 Definitions ...........................................................11 Disclaimers .........................................................11 Trademarks ........................................................ 12 © NXP Semiconductors N.V. 2016. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 16 May 2016 BUK9M120-100E Product data sheet All information provided in this document is subject to legal disclaimers. 16 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 13 / 13