DP AK BUK9214-30A N-channel TrenchMOS logic level FET Rev. 3 — 14 June 2012 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits Low conduction losses due to low on-state resistance Suitable for logic level gate drive sources Q101 compliant Suitable for thermally demanding environments due to 175 °C rating 1.3 Applications 12 V loads Motors, lamps and solenoids Automotive and general purpose power switching 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 30 V ID drain current VGS = 5 V; Tmb = 25 °C; see Figure 1; see Figure 3 - - 63 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 107 W VGS = 4.5 V; ID = 25 A; Tj = 25 °C - - 15.5 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C - 9 12 mΩ VGS = 5 V; ID = 25 A; Tj = 25 °C; see Figure 11; see Figure 12 - 11 14 mΩ VGS = 5 V; ID = 25 A; VDS = 24 V; Tj = 25 °C; see Figure 13 - 12.2 - nC ID = 63 A; Vsup ≤ 30 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped - - 230 mJ Static characteristics RDSon drain-source on-state resistance Dynamic characteristics QGD gate-drain charge Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 G gate 2 D drain Simplified outline Graphic symbol mb 3 S source mb D mounting base; connected to drain D G mbb076 S 2 1 3 SOT428 (DPAK) 3. Ordering information Table 3. Ordering information Type number BUK9214-30A Package Name Description Version DPAK plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 4. Marking Table 4. Marking codes Type number Marking code BUK9214-30A BUK9214-30A BUK9214-30A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 June 2012 © NXP B.V. 2012. All rights reserved. 2 of 14 BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 30 V VDGR drain-gate voltage RGS = 20 kΩ - 30 V VGS gate-source voltage -15 15 V ID drain current Tmb = 25 °C; VGS = 5 V; see Figure 1; see Figure 3 - 63 A Tmb = 100 °C; VGS = 5 V; see Figure 1 - 45 A - 253 A IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3 Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 107 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Source-drain diode IS source current Tmb = 25 °C - 63 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 253 A ID = 63 A; Vsup ≤ 30 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped - 230 mJ Avalanche ruggedness non-repetitive drain-source avalanche energy EDS(AL)S 03nh79 80 03aa16 120 ID (A) Pder (%) 60 80 40 40 20 0 25 Fig 1. 0 50 75 100 125 150 175 200 Tmb (°C) Continuous drain current as a function of mounting base temperature BUK9214-30A Product data sheet 0 50 100 150 200 Tmb (°C) Fig 2. Normalized total power dissipation as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 June 2012 © NXP B.V. 2012. All rights reserved. 3 of 14 BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET 03nh78 103 ID (A) tp = 10 μs RDSon = VDS / ID 102 100 μs 1 ms DC 10 10 ms 100 ms 1 1 Fig 3. 10 102 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK9214-30A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 June 2012 © NXP B.V. 2012. All rights reserved. 4 of 14 BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET 6. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base see Figure 4 - - 1.4 K/W Rth(j-a) thermal resistance from junction to ambient - 71.4 - K/W 03nh80 10 Zth(j-mb) (K/W) 1 δ = 0.5 0.2 0.1 0.05 10−1 0.02 10−2 δ= P tp T Single Shot t tp 10−3 10−6 T 10−5 10−4 10−3 10−2 10−1 1 tp (s) Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration BUK9214-30A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 June 2012 © NXP B.V. 2012. All rights reserved. 5 of 14 BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET 7. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit ID = 0.25 mA; VGS = 0 V; Tj = 25 °C 30 - - V Static characteristics V(BR)DSS drain-source breakdown voltage VGS(th) gate-source threshold voltage ID = 0.25 mA; VGS = 0 V; Tj = -55 °C 27 - - V ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 10 1 1.5 2 V ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 10 - - 2.3 V ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 10 0.5 - - V IDSS drain leakage current VDS = 30 V; VGS = 0 V; Tj = 175 °C - - 500 µA VDS = 30 V; VGS = 0 V; Tj = 25 °C - 0.05 10 µA IGSS gate leakage current VGS = 10 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = -10 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = 4.5 V; ID = 25 A; Tj = 25 °C - - 15.5 mΩ RDSon drain-source on-state resistance VGS = 10 V; ID = 25 A; Tj = 25 °C - 9 12 mΩ VGS = 5 V; ID = 25 A; Tj = 175 °C; see Figure 11; see Figure 12 - - 26.6 mΩ VGS = 5 V; ID = 25 A; Tj = 25 °C; see Figure 11; see Figure 12 - 11 14 mΩ ID = 25 A; VDS = 24 V; VGS = 5 V; Tj = 25 °C; see Figure 13 - 31 - nC - 5.3 - nC - 12.2 - nC - 1730 2317 pF - 400 481 pF - 260 365 pF Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGD gate-drain charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time tr rise time td(off) VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 14 VDS = 30 V; RL = 1.2 Ω; VGS = 5 V; RG(ext) = 10 Ω; Tj = 25 °C - 10 - ns - 85 - ns turn-off delay time - 94 - ns tf fall time - 108 - ns LD internal drain inductance from drain to centre of die ; Tj = 25 °C - 2.5 - nH LS internal source inductance from source lead to source bond pad ; Tj = 25 °C - 7.5 - nH Source-drain diode VSD source-drain voltage IS = 20 A; VGS = 0 V; Tj = 25 °C; see Figure 15 - 0.85 1.2 V trr reverse recovery time - 83 - ns Qr recovered charge IS = 20 A; dIS/dt = -100 A/µs; VGS = -10 V; VDS = 30 V; Tj = 25 °C - 119 - nC BUK9214-30A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 June 2012 © NXP B.V. 2012. All rights reserved. 6 of 14 BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET 03nf71 300 ID (A) 250 9 10 03nf70 18 RDSon (mΩ) 7 8 16 VGS (V) = 6 200 14 150 5 100 4 50 3 12 0 10 2.2 0 2 4 6 8 8 10 3 5 7 9 11 VDS (V) Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 6. 03aa36 10-1 ID (A) 13 15 VGS (V) Drain-source on-state resistance as a function of gate-source voltage; typical values 03nf68 50 gfs (S) 10-2 40 10-3 30 min typ max 10-4 20 10-5 10 10-6 0 0 1 2 VGS (V) 3 0 10 20 30 40 50 60 70 ID (A) Tj = 25 °C; VDS = 5 V Fig 7. Sub-threshold drain current as a function of gate-source voltage BUK9214-30A Product data sheet Fig 8. Forward transconductance as a function of drain current; typical values All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 June 2012 © NXP B.V. 2012. All rights reserved. 7 of 14 BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET 03nf69 80 03aa33 2.5 VGS(th) (V) ID (A) 2 max 60 1.5 typ 1 min 40 20 0.5 Tj = 175 °C 0 0 1 Tj = 25 °C 2 3 4 0 -60 5 0 60 120 VGS (V) Fig 9. Transfer characteristics: drain current as a function of gate-source voltage; typical values RDSon (mΩ) 25 3 3.4 3.8 4 03aa27 2 VGS (V) = 5 180 Fig 10. Gate-source threshold voltage as a function of junction temperature 03nf72 30 Tj (°C) a 1.5 20 1 15 10 0.5 5 0 0 50 100 150 200 ID (A) Fig 11. Drain-source on-state resistance as a function of drain current; typical values BUK9214-30A Product data sheet 0 −60 0 60 120 Tj (°C) 180 Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 June 2012 © NXP B.V. 2012. All rights reserved. 8 of 14 BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET 03nf67 5 03nf73 3500 C (pF) 3000 VGS (V) 4 VDD = 14 V 2500 VDD = 24 V Ciss 3 2000 Coss 1500 2 1000 Crss 1 500 0 0 10 20 30 0 40 10−2 10−1 1 102 10 VDS (V) QG (nC) Fig 13. Gate-source voltage as a function of turn-on gate charge; typical values Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values 03nf66 100 IS (A) 80 60 40 20 Tj = 175 °C 0 0 0.5 Tj = 25 °C 1.0 1.5 VSD (V) Fig 15. Reverse diode current as a function of reverse diode voltage; typical values BUK9214-30A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 June 2012 © NXP B.V. 2012. All rights reserved. 9 of 14 BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET 8. Package outline Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 y E A A A1 b2 E1 mounting base D2 D1 HD 2 L L2 1 L1 3 b1 b w M c A e e1 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 b2 c D1 D2 min E E1 min e e1 HD L L1 min L2 w y max mm 2.38 2.22 0.93 0.46 0.89 0.71 1.1 0.9 5.46 5.00 0.56 0.20 6.22 5.98 4.0 6.73 6.47 4.45 2.285 4.57 10.4 9.6 2.95 2.55 0.5 0.9 0.5 0.2 0.2 OUTLINE VERSION SOT428 REFERENCES IEC JEDEC JEITA TO-252 SC-63 EUROPEAN PROJECTION ISSUE DATE 06-02-14 06-03-16 Fig 16. Package outline SOT428 (DPAK) BUK9214-30A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 June 2012 © NXP B.V. 2012. All rights reserved. 10 of 14 BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET 9. Revision history Table 8. Revision history Document ID Release date Data sheet status Change notice Supersedes BUK9214-30A v.3 20120614 Product data sheet - BUK9214-30A v.2 - BUK9214-30A v.1 Modifications: BUK9214-30A v.2 BUK9214-30A Product data sheet • Various changes to content. 20100615 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 June 2012 © NXP B.V. 2012. All rights reserved. 11 of 14 BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET 10. Legal information 10.1 Data sheet status Document status[1] [2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URLhttp://www.nxp.com. 10.2 Definitions Preview — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 June 2012 © NXP B.V. 2012. All rights reserved. 12 of 14 BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published athttp://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. 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Adelante,Bitport,Bitsound,CoolFlux,CoReUse,DESFire,EZ-HV,FabKey,G reenChip,HiPerSmart,HITAG,I²C-bus logo,ICODE,I-CODE,ITEC,Labelution,MIFARE,MIFARE Plus,MIFARE Ultralight,MoReUse,QLPAK,Silicon Tuner,SiliconMAX,SmartXA,STARplug,TOPFET,TrenchMOS,TriMedia andUCODE — are trademarks of NXP B.V. HD Radio andHD Radio logo — are trademarks of iBiquity Digital Corporation. 11. Contact information For more information, please visit:http://www.nxp.com For sales office addresses, please send an email to:[email protected] BUK9214-30A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 June 2012 © NXP B.V. 2012. All rights reserved. 13 of 14 BUK9214-30A NXP Semiconductors N-channel TrenchMOS logic level FET 12. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 10.1 10.2 10.3 10.4 11 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 14 June 2012 Document identifier: BUK9214-30A