HA2546/883 Wideband Two Quadrant Analog Multiplier (Voltage Output) July 1994 Features Description • This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. The HA-2546/883 is a monolithic, high speed, two quadrant, analog multiplier constructed in the Intersil Dielectrically Isolated High Frequency Process. The HA-2546/883 has a voltage output with a 30MHz signal bandwidth, 300V/µs slew rate and a 17MHz control input bandwidth. High bandwidth and slew rate make this part an ideal component for use in video systems. The suitability for precision video applications is demonstrated further by the 0.1dB gain flatness at 5MHz, 1.6% multiplication error, -52dB feedthrough and differential inputs with 1.2µA bias currents. The HA-2546/883 also has low differential gain (0.1% typ.) and phase (0.1o typ.) errors. • High Speed Voltage Output. . . . . . . . . . . 300V/µs (Min) • Low Multiplication Error . . . . . . . . . . . . . . . .3.0% (Max) 1.6% (Typ) • Input Bias Currents . . . . . . . . . . . . . . . . . . . . 5µA (Max) 1.2µA (Typ) • Signal Input Feedthrough . . . . . . . . . . . . . . -52dB (Typ) • Wide Signal Bandwidth . . . . . . . . . . . . . . . 30MHz (Typ) • Wide Control Bandwidth . . . . . . . . . . . . . . 17MHz (Typ) • Gain Flatness to 5MHz. . . . . . . . . . . . . . . . 0.10dB (Typ) Applications • Military Avionics The HA-2546/883 is well suited for AGC circuits as well as mixer applications for sonar, radar, and medical imaging equipment. The voltage output of the HA-2546/883 simplifies many designs by eliminating the current-to-voltage conversion stage required for current output multipliers. Ordering Information • Missile Guidance Systems • Medical Imaging Displays TEMPERATURE RANGE PART NUMBER • Video Mixers PACKAGE HA1-2546/883 -55oC to +125oC 16 Lead CerDIP HA4-2546/883 -55oC to +125oC 20 Lead Ceramic LCC • Sonar AGC Processors • Radar Signal Conditioning • Voltage Controlled Amplifier • Vector Generator Pinouts + VY+ 5 VY - 6 VOUT + - Y V- 7 8 13 VX + X 12 VX 11 V+ +- Σ Z + 10 VZ 9 VZ + 1 20 19 VYIOB 4 18 GA B VYIOA 5 17 VX + NC 6 16 NC VY + 7 15 VX - VY - 8 14 V+ CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 8-3 GA C 4 2 9 10 11 12 13 VZ - VYIOA 3 VZ + 14 GA B NC 15 GA C 3 VOUT 2 V- VREF VYIOB GA A REF NC 16 GA A GND 1 GND HA-2546/883 (CLCC) TOP VIEW VREF HA-2546/883 (CERDIP) TOP VIEW Spec Number 511050-883 File Number 2444.1 Specifications HA2546/883 Absolute Maximum Ratings Thermal Information Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Storage Temperature Range . . . . . . . . . . . . . . -65oC ≤ TA ≤ +150oC ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2000V Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC Thermal Resistance θJA θJC CerDIP Package . . . . . . . . . . . . . . . . . . . . . 80oC/W 25oC/W Ceramic LCC . . . . . . . . . . . . . . . . . . . . . . . . 61oC/W 12oC/W Maximum Package Power Dissipation CerDIP Package at +75oC. . . . . . . . . . . . . . . . . . . . . . . . . . 1.25W Ceramic LCC Package at +75oC. . . . . . . . . . . . . . . . . . . . . 1.64W Package Power Dissipation Derating Factor above +75oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12mW/oC Ceramic LCC Package . . . . . . . . . . . . . . . . . . . . . . . . . 16mW/oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Operating Conditions Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Operating Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . ±8V to ±15V TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested at: VSUPPLY = ±15V, RLOAD = 1kΩ, CLOAD = 50pF, Unless Otherwise Specified. PARAMETERS Multiplication Error Scale Factor Error Common Mode Range SYMBOL ME CONDITIONS VY = ±5V SF +CMR -CMR Input Offset Voltage (VY) Input Bias Current (VY) Input Offset Current (VY) Common Mode (VY) Rejection Ratio VIO(VY) IB(VY) IIO(VY) +CMRR(VY) -CMRR(VY) Input Offset Voltage (VX) Input Bias Current (VX) Input Offset Current (VX) Input Offset Voltage (VZ) Output Voltage Swing VIO(VX) IB(VX) IIO(VX) VIO(VZ) +VOUT -VOUT Output Current +IOUT -IOUT VCM = 0V VCM = 0V VCM = 0V VY = 0 to +5V, VX = +2V VY = 0 to -5V, VX = +2V VCM = 0V VCM = 0V VCM = 0V VX = 0V, VY = 0V VY = +5V, VX = +2.5V VY = -5V, VX = +2.5V VY = +5V, VX = +2.5V VY = -5V, VX = +2.5V GROUP A SUBGROU PS LIMITS TEMPERATURE MIN MAX 1 +25oC -3 3 %FS 2, 3 +125oC, -55oC -5 5 %FS 1 +25oC -5 5 % 2, 3 +125oC, -55oC -5 5 % 1 +25oC 5 - V 2, 3 +125oC, -55oC 5 - V 1 +25oC - -5 V 2, 3 +125oC, -55oC - -5 V 1 +25oC -10 10 mV 2, 3 +125oC, -55oC -15 15 mV 1 +25oC -15 15 µA 2, 3 +125oC, -55oC -20 20 µA 1 +25oC -2 2 µA 2, 3 +125oC, -55oC -3 3 µA 1 +25oC 60 - dB 2, 3 +125oC, -55oC 60 - dB 1 +25oC 60 - dB 2, 3 +125oC, -55oC 60 - dB 1 +25oC -2 2 mV 2, 3 +125oC, -55oC -15 15 mV 1 +25oC -2 2 µA 2, 3 +125oC, -55oC -5 5 µA 1 +25oC -2 2 µA 2, 3 +125oC, -55oC -3 3 µA 1 +25oC -15 15 mV 2, 3 +125oC, -55oC -15 15 mV 1 +25oC 5 - V 2, 3 +125oC, -55oC 5 - V 1 +25oC - -5 V 2, 3 +125oC, -55oC - -5 V 1 +25oC 20 - mA 2, 3 +125oC, -55oC 20 - mA 1 +25oC - -20 mA 2, 3 +125oC, -55oC - -20 mA Spec Number 8-4 UNITS 511050-883 Specifications HA2546/883 TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at: VSUPPLY = ±15V, RLOAD = 1kΩ, CLOAD = 50pF, Unless Otherwise Specified. PARAMETERS SYMBOL CONDITIONS Power Supply Rejection Ratio +PSRR ∆ VS = 3V, V+ = +15V, V- = -15V, V+ = +12V, V- = -15V -PSRR Quiescent Power Supply Current +ICC -ICC GROUP A SUBGROU PS TEMPERATURE MIN MAX 1 +25oC 58 - dB 2, 3 +125oC, -55oC 58 - dB 1 +25oC 58 - dB 2, 3 +125oC, -55oC 58 - dB 1 +25oC 29 - mA 2, 3 +125oC, -55oC 29 - mA 1 +25oC - -29 mA 2, 3 +125oC, -55oC - -29 mA ∆ VS = 3V, V+ = +15V, V- = -15V, V+ = +15V, V- = -12V VX = VY = 0V, IOUT = 0mA VX = VY = 0V, IOUT = 0mA LIMITS UNITS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS Table 2 Intentionally Left Blank. See AC Specifications in Table 3. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested at: VSUPPLY = ±15V, RLOAD = 1kΩ, CLOAD = 50pF, Unless Otherwise Specified. LIMITS PARAMETER SYMBOL Slew Rate +SR -SR Rise and Fall Time TR TF Overshoot +OS -OS Full Power Bandwidth FPBW CONDITIONS VOUT = -5V to +5V, VX = 2VDC VOUT = +5V to -5V, VX = 2VDC NOTES TEMPERATURE MIN MAX UNITS 1 +25oC 300 - V/µs o o 1 +125 C, -55 C 300 - V/µs 1 +25oC 300 - V/µs o o 1 +125 C, -55 C 300 - V/µs VOUT = -100mV to +100mV VX = 2VDC 1, 3 +25oC - 15 ns 1, 3 +125 C, -55 C - 17 ns VOUT = +100mV to -100mV VX = 2VDC 1, 3 +25oC - 15 ns 1, 3 +125 C, -55 C - 17 ns VOUT = -100mV to +100mV VX = 2VDC 1 +25oC - 30 % 1 +125 C, -55 C - 30 % VOUT = +100mV to -100mV VX = 2VDC 1 +25oC - 30 % VPEAK = 5V, VX = 2VDC o o o o o o o o 1 +125 C, -55 C - 30 % 1, 2 +25oC 9.5 - MHz 1, 2 +125oC, -55oC 9.5 - MHz NOTES: 1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon data from multiple production runs which reflect lot to lot and within lot variation. 2. Full Power Bandwidth guarantee based on Slew Rate measurement using FPBW = Slew Rate/(2πVPEAK). 3. Measured between 10% and 90% points. TABLE 4. ELECTRICAL TEST REQUIREMENTS MIL-STD-883 TEST REQUIREMENTS SUBGROUPS (SEE TABLE 1) Interim Electrical Parameters (Pre Burn-in) 1 Final Electrical Test Parameters 1(Note 1), 2, 3 Group A Test Requirements 1, 2, 3 Groups C and D Endpoints 1 NOTE: 1. PDA applies to Subgroup 1 only. Spec Number 8-5 511050-883 HA2546/883 Die Characteristics DIE DIMENSIONS: 79.9mils x 119.7mils x 19mils ± 1mils METALLIZATION: Type: Al, 1%Cu Thickness: 16kÅ ± 2kÅ GLASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos) Silox Thickness: 12kÅ ± 1.5kÅ Nitride Thickness: 3.5kÅ ± 1.5kÅ WORST CASE CURRENT DENSITY: 0.72 x 105 A/cm2 TRANSISTOR COUNT: 87 Metallization Mask Layout HA-2546/883 VREF GND GA A GA C (2) (1) (16) (15) (14) GA B (13) VX+ (5) (12) VX- (6) (11) V+ VYIOB (3) VYIOA (4) VY+ VY - (7) (8) (9) (10) V- VOUT VZ + VZ - Spec Number 8-6 511050-883 Specifications HA2546/883 Test Circuit L MSR GND M2 H VREF K5 V2 V1 VADJB K1 VADJA K6 0.001 µF 10 µF 1000 pF VOUT 1000 pF 15 3 14 13 5 VEE - 15V 2 DUT VYK9 16 4 VY+ K2 1 12 6 11 7 10 8 9 GADJA GADJC GADJB K3 V2 VX+ VX- K4 VCC 10 µF VZVZ+ 0.001 µF +15V 50Ω 50Ω K7A K8 K11 K10 25 µF 100Ω 1K K7B 1K 50Ω 50pF M1 For Detailed Information, Refer to HA-2546/883 Test Tech Brief Test Waveforms LARGE AND SMALL SIGNAL RESPONSE TEST CIRCUIT 16 NC 1 REF NC 2 NC 3 15 14 + NC 4 VY + 5 - Y 6 V- 7 13 VX + X + +- Σ 8 Z 12 11 V+ 10 + 9 VOUT 50Ω 1K 50pF Spec Number 8-7 511050-883 HA2546/883 Test Waveforms (Continued) VY LARGE SIGNAL RESPONSE Vertical Scale: 5V/Div. Horizontal Scale: 50ns/Div. VY SMALL SIGNAL RESPONSE Vertical Scale: 100mV/Div. Horizontal Scale: 50ns/Div. 100mV +5V IN 0 IN -5V -100mV +5V OUT 0 100mV 0 OUT 0 -5V -100mV VX LARGE SIGNAL RESPONSE Vertical Scale: 2V/Div. Horizontal Scale: 50ns/Div. VX SMALL SIGNAL RESPONSE Vertical Scale: 200mV/Div. Horizontal Scale: 50ns/Div. 2V 200mV IN IN 0 0 500mV 5V OUT OUT 0 0 Spec Number 8-8 511050-883 HA2546/883 Burn-In Circuits HA-2546/883 CERDIP D2 C2 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 V+ C1 D1 V- NOTES: C1 = 0.01µF/Socket Min. C2 = 0.01µF/Socket Min. D1 = D2 = IN4002 or Equivalent/Board (V+) - (V-) = 31V ± 1V 1 20 GA C GA A 2 NC 3 GND VREF HA-2546/883 CERAMIC LCC 19 GA B VYIOB 4 18 VYIOA 5 17 NC 6 16 NC 7 15 8 14 11 12 VX V+ +V 13 VZ - 10 VOUT C2 V- 9 VZ + VY - NC VY + VX + C1 D1 D2 -V NOTES: C1 = C2 = 0.01µF/Socket Min. D1 = D2 = IN4002 or Equivalent/Board (V+) - (V-) = 31V ± 1V Spec Number 8-9 511050-883 HA2546/883 Simplified Schematic V+ VBIAS VBIAS VX + GA A + + - - VX VZ + VZ - GA C GA B REF 1.67kΩ OUT VY + VY - GND VVYIO A VYIO B Spec Number 8-10 511050-883 HA2546/883 Packaging c1 F16.3 MIL-STD-1835 GDIP1-T16 (D-2, CONFIGURATION A) LEAD FINISH 16 LEAD DUAL-IN-LINE FRIT-SEAL CERAMIC PACKAGE -D- -A- INCHES BASE METAL (c) E b1 M M (b) -Bbbb S C A-B S SECTION A-A D S D BASE PLANE Q A -C- SEATING PLANE α L S1 eA A A b2 b ccc M C A-B S e D S eA/2 c aaa M C A - B S D S NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.200 - 5.08 - b 0.014 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 - b3 0.023 0.045 0.58 1.14 4 c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3 D - 0.840 - 21.34 5 E 0.220 0.310 5.59 7.87 5 e 0.100 BSC 2.54 BSC eA 0.300 BSC 7.62 BSC - eA/2 0.150 BSC 3.81 BSC - L 0.125 0.200 3.18 5.08 - Q 0.015 0.060 0.38 1.52 6 S1 0.005 - 0.13 - 7 S2 0.005 - 0.13 - - α 90o 105o 90o 105o - aaa - 0.015 - 0.38 - bbb - 0.030 - 0.76 - ccc - 0.010 - 0.25 - M - 0.0015 - 0.038 2 N 16 16 8 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b1. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling Dimension: Inch. 11. Materials: Compliant to MIL-I-38535. Spec Number 8-11 511050-883 HA2546/883 Packaging (Continued) J20.A MIL-STD-1835 CQCC1-N20 (C-2) 20 PAD METAL SEAL LEADLESS CERAMIC CHIP CARRIER D D3 INCHES j x 45o E3 B E SYMBOL MIN MAX MIN MAX NOTES A 0.060 0.100 1.52 2.54 6, 7 A1 0.050 0.088 1.27 2.23 7 B - - - - 4 B1 0.022 0.028 0.56 0.71 2, 4 B2 h x 45o A A1 PLANE 2 PLANE 1 0.022 0.15 0.56 - 0.342 0.358 8.69 9.09 - D1 0.200 BSC 5.08 BSC - D2 0.100 BSC 2.54 BSC - D3 - 0.358 - 9.09 2 E 0.342 0.358 8.69 9.09 - E1 0.200 BSC 5.08 BSC - E2 0.100 BSC 2.54 BSC - E3 - j B3 B1 E1 E2 B2 - 0.015 9.09 1.27 BSC - 0.38 0.040 REF 0.020 REF 2 - - 2 1.02 REF 5 0.51 REF 5 0.045 0.055 1.14 1.40 - L1 0.045 0.055 1.14 1.40 - L2 0.075 0.095 1.91 2.41 - L3 0.003 0.015 0.08 5 0.38 5 3 NE 5 5 3 N 20 20 3 NOTES: 1. Metallized castellations shall be connected to plane 1 terminals and extend toward plane 2 across at least two layers of ceramic or completely across all of the ceramic layers to make electrical connection with the optional plane 2 terminals. L1 D2 e1 0.358 0.050 BSC L ND L2 - 0.006 h L3 1.83 REF D e1 e 0.072 REF B3 e L MILLIMETERS D1 2. Unless otherwise specified, a minimum clearance of 0.015 inch (0.381mm) shall be maintained between all metallized features (e.g., lid, castellations, terminals, thermal pads, etc.) 3. Symbol “N” is the maximum number of terminals. Symbols “ND” and “NE” are the number of terminals along the sides of length “D” and “E”, respectively. 4. The required plane 1 terminals and optional plane 2 terminals shall be electrically connected. 5. The corner shape (square, notch, radius, etc.) may vary at the manufacturer’s option, from that shown on the drawing. 6. Chip carriers shall be constructed of a minimum of two ceramic layers. 7. Maximum limits allows for 0.007 inch solder thickness on pads. 8. Materials: Compliant to MIL-I-38535. Spec Number 8-12 511050-883 HA2546 Semiconductor Wideband Two Quadrant Analog Multiplier DESIGN INFORMATION August 1999 The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VS = ±15V, TA = +25oC, See Test Circuit For Multiplier Configuration. VY GAIN AND PHASE vs FREQUENCY VX GAIN AND PHASE vs FREQUENCY 9 RL = 1K, VX = 2VDC, VY = 200mVrms 15 RL = 1K, VX+ = 200mVrms, VY = 5VDC, VX- = -1VDC CL = 50pF 10 0 -3 -6 CL = 0pF 0 45 90 CL = 50pF 10K 100K 1M FREQUENCY (Hz) 10M 135 180 100M PHASE SHIFT (DEGREES) CL = 0pF 5 0 -5 0 -10 45 90 135 10K 100K VY FEEDTHROUGH vs FREQUENCY 1M FREQUENCY (Hz) 180 100M 10M PHASE SHIFT (DEGREES) 3 GAIN (dB) GAIN (dB) 6 VX FEEDTHROUGH vs FREQUENCY -10 RL = 1K, VX+ = 200mVrms, VY = 0V VX = 0V, RL = 1K, VY = 200mVrms -30 0 -40 -10 -50 -20 (dB) GAIN (dB) -20 -60 VX = -2.0VDC -30 -40 -70 -50 -80 VX = -1.0VDC VX = -0.5VDC -90 10K 100K 1M 10M 10K 100M 100K 1M FREQUENCY (Hz) FREQUENCY (Hz) VARIOUS VY FREQUENCY RESPONSES 10M 100M VARIOUS VX FREQUENCY RESPONSES 9 6 RL = 1K, CL = 50pF, VY = 200mVrms VX = 2.0VDC 5 -3 GAIN (dB) 0 VX = 1.0VDC -6 -9 VX = 0.5VDC 0 -10 -15 -15 -20 100K 1M FREQUENCY (Hz) 10M 10K 100M VY = 5VDC VY = 2VDC -5 -12 10K VX+ = 200mVrms, RL = 1K, VX- = -1VDC 10 3 GAIN (dB) 15 VY = 1VDC VY = 0.5VDC 100K 1M FREQUENCY (Hz) 10M Spec Number 8-13 100M 511050-883 HA2546 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VS = ±15V, TA = +25oC, See Test Circuit For Multiplier Configuration. (Continued) NOISE CHARACTERISTICS VY OFFSET AND BIAS CURRENT vs TEMPERATURE 14 VX = 0V, VY = 0V 975 12 825 10 750 675 CURRENT (µA) VOLTAGE NOISE (nV/√Hz) 900 600 525 450 375 300 225 8 BIAS CURRENT 6 4 2 0 OFFSET CURRENT 150 -2 75 0 1 10 100 1K 10K -4 -55 100K -25 0 FREQUENCY (Hz) OFFSET VOLTAGE vs TEMPERATURE 25 50 75 TEMPERATURE (oC) 100 125 VX OFFSET AND BIAS CURRENT vs TEMPERATURE 10 3 8 2 4 VY CURRENT (µA) OFFSET VOLTAGE (mV) 6 VX 2 0 -2 VZ BIAS CURRENT 1 OFFSET CURRENT -4 0 -6 -8 -10 -55 0 -25 25 50 75 TEMPERATURE (oC) 100 -1 -55 125 -25 VOUT vs VSUPPLY 25 50 75 TEMPERATURE (oC) 100 125 VY CMRR vs FREQUENCY 120 VYCM = 200mVrms 100 7 80 CMRR (dB) 6 -VOUT |VOUT| (V) 0 5 +VOUT 4 VX = 0V 60 40 VX = 2V 20 3 0 2 -10 1 0 ±5 ±7 ±8 ±12 ±15 ±17 100 VSUPPLY 1K 10K 100K 1M 10M 100M FREQUENCY (Hz) Spec Number 8-14 511050-883 HA2546 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VS = ±15V, TA = +25oC, See Test Circuit For Multiplier Configuration. (Continued) VX COMMON MODE REJECTION RATIO vs FREQUENCY PSRR vs FREQUENCY 120 VX = 200mVrms 80 60 100 VY = 2V 40 0 0 10K 100K 1M FREQUENCY (Hz) 10M -PSSR 40 20 1K +PSSR 60 20 100 VY = VX = 0V 80 VY = 0V PSRR (dB) CMRR (dB) 100 100 100M 1K 10K 100K 1M 10M 100M FREQUENCY (Hz) SUPPLY CURRENT vs TEMPERATURE COMMON MODE RANGE vs VSUPPLY 25 |COMMON MODE RANGE| (V) 14 SUPPLY CURRENT (mA) -ICC +ICC 20 15 -55 12 10 6 0 25 50 TEMPERATURE 75 100 CMR(+) 4 2 0 -25 CMR(-) 8 125 ±5 ±7 ±8 ±12 VSUPPLY (oC) PSRR vs TEMPERATURE 1.5 X=1 X = 1.2 X = 1.4 +PSRR 1 MULTIPLIER ERROR (%FS) 80 -PSRR PSRR (dB) ±17 MULTIPLIER ERROR 100 60 40 20 0 -55 ±15 -25 0 25 50 TEMPERATURE 75 100 0.5 0 -0.5 -1.5 -6 125 (oC) X = 1.6 X = 1.8 X=2 -1 -4 -2 0 Y INPUT (V) 2 Spec Number 8-15 4 6 511050-883 HA2546 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VS = ±15V, TA = +25oC, See Test Circuit For Multiplier Configuration. (Continued) MULTIPLIER ERROR 2 X = 0.8 X = 0.4, 0.6 MULTIPLIER ERROR (%FS) 1.5 MULTIPLIER ERROR (%FS) MULTIPLIER ERROR 2 1 X = 0.2 0.5 X=1 0 X=0 -0.5 -1 1.5 Y = -5 1 Y = -3 Y = -4 0.5 0 Y = -2 -0.5 Y = -1 Y=0 -1 -1.5 -2 -6 -4 -2 0 Y INPUT (V) 2 4 -1.5 6 0 MULTIPLIER ERROR Y=0 Y=1 0.5 0 -0.5 Y=2 Y=3 -1 Y=4 -1.5 -2 Y=5 0 0.5 1 1.5 2 2.5 X INPUT (V) 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 -55 MULTIPLICATION ERROR vs TEMPERATURE 2 2.5 0 -25 25 50 75 TEMPERATURE (oC) 100 125 GAIN VARIATION vs FREQUENCY 0.5 0.6 RL = 1K, VX = 2VDC, VY = 200mVrms 0.4 0.4 GAIN (dB) MULTIPLICATION ERROR (%) 1 1.5 X INPUT (V) WORST CASE MULTIPLICATION ERROR vs TEMPERATURE MULTIPLICATION ERROR (%) MULTIPLIER ERROR (%FS) 1 0.5 0.3 0.2 CL = 50pF 0.2 0 CL = 0pF 0.1 -0.2 0.0 -55 -25 0 25 50 75 100 10K 125 100K 1M 10M 100M FREQUENCY (Hz) oC) TEMPERATURE ( Spec Number 8-16 511050-883 HA2546 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VS = ±15V, TA = +25oC, See Test Circuit For Multiplier Configuration. (Continued) SCALE FACTOR vs TEMPERATURE OUTPUT VOLTAGE SWING vs LOAD RESISTANCE 2.010 7.0 2.008 6.0 PEAK OUTPUT VOLTAGE 2.006 SCALE FACTOR fO = 10kHz, VX = 2VDC, THD < 0.1% 2.004 2.002 2.000 1.998 1.996 1.994 VS = ±15 VS = ±12 5.0 VS = ±10 4.0 3.0 VS = ±8 2.0 1.0 1.992 1.990 -55 -25 0 25 50 75 100 0.0 10 125 100 TEMPERATURE (oC) 1K 10K 100K LOAD RESISTANCE (Ω) SLEW RATE vs TEMPERATURE RISE TIME vs TEMPERATURE 500 24 22 20 VY CHANNEL 400 VX CHANNEL RISE TIME (ns) 300 200 100 16 14 12 VY CHANNEL 10 8 6 VX CHANNEL 4 2 0 -60 -40 -20 0 20 40 60 80 100 0 -60 120 -20 -40 TEMPERATURE (oC) 0 20 40 60 TEMPERATURE (oC) 80 100 120 SUPPLY CURRENT vs SUPPLY VOLTAGE 28 -ICC 26 24 SUPPLY CURRENT (mA) SLEW RATE (V/µs) 18 +ICC 22 20 18 16 14 12 10 8 6 4 2 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE (±V) 16 18 20 Spec Number 8-17 511050-883 HA2546 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Application Information REF Theory of Operation NC 2 The HA-2546 is a two quadrant multiplier with the following three differential inputs; the signal channel, VY+ and VY -, the control channel, VX+ and VX-, and the summed channel, VZ + and VZ -, to complete the feedback of the output amplifier. The differential voltages of channel X and Y are converted to differential currents. These currents are then multiplied in a circuit similar to a Gilbert Cell multiplier, producing a differential current product. The differential voltage of the Z channel is converted into a differential current which then sums with the products currents. The differential “product/sum” currents are converted to a single-ended current and then converted to a voltage output by a transimpedance amplifier. NC 3 The open loop transfer equation for the HA-2546 is: (VX+ - VX-) (VY+ - VY-) VOUT = A where; SF - (VZ+ - VZ-) A = Output Amplifier Open Loop Gain SF = Scale Factor VX, VY, VZ = Differential Inputs SF = 2, when GA B is shorted to GA C SF ≅ 1.2 REXT, when REXT is connected between GA A and GA C (REXT is in kΩ) The scale factor can be adjusted from 2 to 5. It should be noted that any adjustments to the scale factor will affect the AC performance of the control channel, VX. The normal input operating range of VX is equal to the scale factor voltage. The typical multiplier configuration is shown in Figure 1. The ideal transfer function for this configuration is: 2 0 + VZ- , when VX ≥ 0V 14 + NC 4 VY + 5 - Y 6 V- - 7 13 VX + X + +- Σ Z 8 + 12 11 V+ 10 9 VOUT 50Ω 1K 50pF FIGURE 1. The VY- terminal is usually grounded allowing the VY+ to swing ±5V. The VZ+ terminal is usually connected directly to VOUT to complete the feedback loop of the output amplifier while VZ- is grounded. The scale factor is normally set to 2 by connecting GA B to GA C. Therefore the transfer equation simplifies to VOUT = (VX VY) / 2. Offset Adjustment The signal channel offset voltage may be nulled by using a 20kΩ potentiometer between VYIO Adjust pins A and B and connecting the wiper to -V. Reducing the signal channel offset will reduce VX AC feedthrough. Output offset voltage can also be nulled by connecting VZ- to the wiper of a 20kΩ potentiometer which is tied between +V and -V. Capacitive Drive Capability SF ≅ 1.2 (REXT + 1.667kΩ), when REXT is connected to GA B and GA C (REXT is in kΩ) (VX+ - VX-) (VY+ - VY-) 15 The VX- pin is usually connected to ground so that when VX+ is negative there is no signal at the output, i.e. two quadrant operation. If the VX input is a negative going signal the VX+ pin maybe grounded and the VX- pin used as the control input. The scale factor is used to maintain the output of the multiplier within the normal operating range of ±5V. The scale factor can be defined by the user by way of an optional external resistor, REXT, and the Gain Adjust pins, Gain Adjust A (GA A), Gain Adjust B (GA B), and Gain Adjust C (GA C). The scale factor is determined as follows: VOUT = 16 NC 1 When driving capacitive loads >20pF, a 50Ω resistor is recommended between VOUT and VZ+, using VZ+ as the output (See Figure 1). This will prevent the multiplier from going unstable. Power Supply Decoupling Power supply decoupling is essential for high frequency circuits. A 0.01µF high quality ceramic capacitor at each supply pin in parallel with a 1µF tantalum capacitor will provide excellent decoupling. Chip capacitors produce the best results due to the close spacing with which they may be placed to the supply pins minimizing lead inductance. Adjusting Scale Factor , when VX < 0V The HA-2546 two quadrant multiplier may be configured for many uses. Following are examples of a few typical applications. Spec Number 8-18 511050-883 HA2546 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Adjusting the scale factor will tailor the control signal, VX, input voltage range to match your needs. Referring to the simplified schematic and looking for the VX input stage, you will notice the unusual design. The internal reference sets up a 1.2mA current sink for the VX differential pair. The control signal applied to this input will be forced across the scale factor setting resistor and set the current flowing in the VX+ side of the differential pair. When the current through this resistor reaches 1.2mA, all the current available is flowing in the one side and full scale has been reached. Normally the 1.67kΩ internal resistor sets the scale factor to 2V when the Gain Adjust pins B and C are connected together, but you may set this resistor to any convenient value using pins 16 (GA A) and 15 (GA C). 16 NC 1 REF NC 2 NC 3 15 14 + NC 4 VY + 5 6 - 7 12 - Y V- 13 X + +- Σ 8 11 V+ - 10 Z 9 + VOUT 50Ω 10kΩ REF NC 2 NC 3 1N914 16 NC 1 10kΩ 15 14 5kΩ + NC VY + 4 5 Y 6 V- - +- 7 Σ Z 8 + 11 V+ 0.1µF 9 FIGURE 3. AUTOMATIC GAIN CONTROL FIGURE 2A. MULTIPLIER, VOUT = VXVY / 2, SCALE FACTOR = 2V REF 3 4 In Figure 3, the HA-2546 is configured in a true Automatic Gain Control or AGC application. The HA-5127, low noise op amp, provides the gain control level to the X input. This level will set the peak output voltage of the multiplier to match the reference level. The feedback network around the HA-5127 provides stability and a response time adjustment for the gain control circuit. 16 1 NC 3.3V 10 1K NC + 12 VOUT NC - +15V 20kΩ 50Ω 2 0.01µF HA-5127 13 VX + X + 0.1µF 4.167K 15 14 NC + VY + 5 V- - Y 6 7 13 VX + X + +- Σ 8 Z + 12 11 V+ 10 9 VOUT 50Ω 1K FIGURE 2B. MULTIPLIER, VOUT = VXVY / 5, SCALE FACTOR = 5V Spec Number 8-19 511050-883 HA2546 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. . REF NC 2 NC 3 REF LEVEL 0.000dB 180.000DEG 16 NC 1 15 14 100 13 80 12 60 11 V+ 40 /DIV 20.000dB 45.000DEG MARKET 1000 000.00Hz MAG (UDF) 56.431dB MARKER 1000 000.000Hz PHASE (UDF) 177.646deg 4 5 X + - Y 6 V- 7 +- Σ 8 Z + HFA0002 VOUT - 10 9 5kΩ - + 20 0.902V 0 180 -20 135 -40 90 -60 45 -80 0 -100 1K FIGURE 4A. VOLTAGE CONTROLLED AMPLIFIER 0.126V 0.4V VGAIN = 0.030V 1M 100K FREQUENCY (Hz) 10K 10M PHASE (DEGREES) NC VOLTAGE GAIN (dB) + 100M FIGURE 4B. VOLTAGE CONTROLLED AMPLIFIER This multiplier has the advantage over other AGC circuits, in that the signal bandwidth is not affected by the control signal gain adjustment. A wide range of gain adjustment is available with the Voltage Controlled Amplifier configuration shown in Figure 4A. and Figure 4B. Here the gain of the HFA0002 is swept from 20V/ V at a control voltage of 0.902V to a gain of almost 1000V/V with a control voltage of 0.03V. The Video Fader circuit provides a unique function as shown in Figure 5. Here Ch B is applied to the minus Z input in addition to the minus Y input. VMIX will control the percentage of Ch A and Ch B that are mixed together to produce a resulting video image or other signal. Many other applications are possible including division, squaring, square-root, percentage calculations, etc. Please refer to the HA-2556 four quadrant multiplier for additional applications. 16 NC 1 REF NC 2 NC 3 NC 4 15 14 + CH A 5 CH B 6 13 VMIX (0V TO 2V) X + - Y V- 7 +- Σ 8 Z + 12 11 V+ 10 9 VOUT 50Ω VOUT = Ch B + (Ch A - Ch B) VMIX / Scale Factor Scale Factor = 2 VOUT = All Ch B; if VMIX = 0V VOUT = All Ch A; if VMIX = 2V (Full Scale) VOUT = Mix of Ch A and Ch B; if 0V < VMIX < 2V FIGURE 5. VIDEO FADER Spec Number 8-20 511050-883 HA2546 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. TYPICAL PERFORMANCE CHARACTERISTICS Device Tested at: Supply Voltage = ±15V, RLOAD = 1kΩ, CLOAD = 50pF, Unless Otherwise Specified. PARAMETER CONDITIONS Multiplication Error Drift TEMP TYP UNITS Full 0.002 %/ oC Differential Gain VX = 2V, VY = 300mVP-P , fO = 3.58MHz +25oC 0.1 % Differential Phase VX = 2V, VY = 300mVP-P , fO = 3.58MHz +25oC 0.1 Degrees VX = 2V +25oC 0.1 dB +25oC 0.18 dB 1% Amplitude Error +25oC 6 MHz 1% Vector Error +25oC 260 kHz THD+N fO = 10kHz, VY = 1Vrms, VX = 2V +25oC 0.03 % VX = 0V, VY = 0V +25oC 400 nV/Hz fO = 100Hz +25oC 150 nV/Hz fO = 1kHz +25oC 75 nV/Hz +25oC ±9 V Average Offset Voltage Drift Full 45 µV/ oC Differential Input Resistance +25oC 720 KΩ Small Signal Bandwidth (-3dB) VX = 2V +25oC 40 MHz Feedthrough fO = 5MHz, VX = 0V, VY = 200mVrms +25oC -52 dB +25oC 25 ns +25oC 200 ns Average Offset Voltage Drift Full 10 µV/ oC Differential Input Resistance +25oC 360 kΩ Small Signal Bandwidth (-3dB) VY = 5V, VX = -1V +25oC 17 MHz Feedthrough fO = 100kHz, VY = 0V, VX = 200mVrms +25oC -40 dB VX = 0V to 2V, VY = 5V +25oC 80 dB Gain Tolerance DC to 5MHz 5MHz to 8MHz Voltage Noise fO = 10Hz Common Mode Range SIGNAL INPUT, VY VY TRANSIENT RESPONSE Propagation Delay VY = ±5V, VX = 2V Settling Time CONTROL INPUT, VX Common Mode Rejection Ratio VX TRANSIENT RESPONSE +25oC 50 ns +25oC 200 ns Open Loop Gain +25oC 70 dB Differential Input Resistance +25oC 900 kΩ +25oC 1 Ω Propagation Delay Settling Time VX = 0 to 2V, VY = 5V VZ CHARACTERISTICS OUTPUT CHARACTERISTICS Output Resistance All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Spec Number 8-21 511050-883