NSM3005NZ D

NSM3005NZ
Small Signal BJT and
MOSFET
30 V, 500 mA, PNP BJT with 20 V, 224 mA,
N−Channel MOSFET
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Features
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
6
Typical Applications
1
UDFN6
CASE 517AT
mCOOLt
• Portable Devices
Q1 MAXIMUM RATINGS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Value
Unit
Collector–Emitter Voltage
VCEO
30
V
Collector–Base Voltage
VCBO
40
V
Emitter–Base Voltage
VEBO
5.0
V
Collector Current
IC
500
mA
Base Current
IB
50
mA
MARKING DIAGRAM
1
XX MG
G
XX = Specific Device Code
M = Date Code
G = Pb−Free Package
Q2 MAXIMUM RATINGS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
20
V
Gate−to−Source Voltage
VGS
±8
V
ID
224
mA
Continuous Drain
Current (Note 1)
Steady
State
TA = 25°C
TA = 85°C
162
t≤5s
TA = 25°C
241
Pulsed Drain Current
Tp = 10 ms
Source Current (Body Diode)
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
PIN CONNECTIONS
IDM
673
mA
IS
120
mA
Symbol
Value
Unit
RqJA
PD
245
0.8
°C/W
W
TJ, TSTG
−55 to
150
°C
TL
260
°C
THERMAL CHARACTERISTICS
Parameter
Thermal Resistance
Junction−to−Ambient (Note 1)
Total Power Dissipation @ TA = 25°C
Operating Junction and Storage
Temperature
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface mounted on FR4 board using 1 in sq pad size
(Cu. area = 1.127 in sq [1 oz] including traces).
ORDERING INFORMATION
Device
Package
Shipping†
NSS3005NZTAG
UDFN6
(Pb−Free)
3000 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
January, 2016 − Rev. 1
1
Publication Order Number:
NSM3005NZ/D
NSM3005NZ
Q1 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Collector–Base Breakdown Voltage
V(BR)CBO
IC = 100 mA
40
−
−
V
Collector–Emitter Breakdown Voltage
V(BR)CEO
IC = 10 mA
30
−
−
V
Emitter–Base Breakdown Voltage
V(BR)EBO
IE = 100 mA
5.0
−
−
V
OFF CHARACTERISTICS
Collector Cutoff Current
ICBO
VCB = 25 V, IE = 0 A
−
−
1.0
mA
Emitter Cutoff Current
IEBO
VEB = 5.0 V, IC = 0 A
−
−
10
mA
hFE
VCE = 3.0 V, IC = 30 mA
20
−
100
VCE = 3.0 V, IC = 100 mA
20
−
100
VCE = 3.0 V, IC = 500 mA
20
−
100
IC = 500 mA, IB = 50 mA
−
−
0.4
V
ON CHARACTERISTICS (Note 2)
DC Current Gain
Collector–Emitter Saturation Voltage
VCE(sat)
Base–Emitter Saturation Voltage
VBE(sat)
IC = 500 mA, IB = 50 mA
−
−
1.1
V
Base–Emitter Turn–On Voltage
VBE(on)
VCE = 1.0 V, IC = 500 mA
−
−
1.0
V
Q2 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
20
−
−
V
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
ID = −250 µA, ref to 25°C
−
19
−
mV/°C
Zero Gate Votlage Drain Current
IDSS
VGS = 0 V, VDS = 16 V, TJ = 25°C
−
−
1.0
mA
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = ±8.0 V
−
−
±2.0
mA
OFF CHARACTERISTICS
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
VGS(TH)
VGS = VDS, ID = 250 mA
0.4
−
1.0
V
VGS(TH)/TJ
−
−
1.9
−
mV/°C
RDS(ON)
VGS = 4.5 V, ID = 100 mA
−
0.65
1.4
W
VGS = 2.5 V, ID = 50 mA
−
0.9
1.9
VGS = 1.8 V, ID = 20 mA
−
1.1
2.2
1.4
4.3
gFS
VDS = 5.0 V, ID = 100 mA
VGS = 1.5 V, ID = 10 mA
−
0.56
−
S
Input Capacitance
CISS
−
15.8
−
pF
Output Capacitance
COSS
f = 1.0 MHz, VGS = 0 V,
VDS = 15 V
−
3.5
−
Reverse Transfer Capacitance
CRSS
−
2.4
−
−
0.70
−
Forward Transconductance
CHARGES AND CAPACITANCES
VGS = 4.5 V, VDS = 15 V;
ID = 200 mA
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
−
0.05
−
Gate−to−Source Charge
QGS
−
0.14
−
Gate−to−Drain Charge
QGD
−
0.10
−
−
18
−
nC
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 3)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
VGS = 4.5 V, VDD = 15 V,
ID = 200 mA, RG = 2 W
−
35
−
Td(ON)
−
201
−
tf
−
110
−
−
0.55
1.0
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
VGS = 0 V, IS = 10 mA
2. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
3. Switching characteristics are independent of operating junction temperatures.
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2
V
NSM3005NZ
TYPICAL CHARACTERISTICS − Q1
1
VCE(sat), COLLECTOR−EMITTER
SATURATION VOLTAGE (V)
hFE, DC CURRENT GAIN
1000
TJ = 150°C
TJ = 25°C
10
TJ = −55°C
0.1
1
10
100
TJ = 150°C
TJ = 25°C
TJ = −55°C
1
1000
10
100
1000
IC, COLLECTOR CURRENT (mA)
IC, COLLECTOR CURRENT (mA)
Figure 1. PNP DC Current Gain vs. Collector
Current
Figure 2. PNP VCE vs. IC
1.0
1.1
IC/IB = 10
1.0
VBE(on), BASE−EMITTER (V)
VCE(sat), BASE−EMITTER SATURATION VOLTAGE (V)
0.1
0.01
1
0.9
0.8
TJ = −55°C
0.7
TJ = 25°C
0.6
0.5
0.4
TJ = 150°C
0.3
0.2
0.1
0.9
TJ = −55°C
0.8
0.7
TJ = 25°C
0.6
0.5
TJ = 150°C
0.4
0.3
VCE = 1 V
0.2
1
10
100
1
1000
10
100
IC, COLLECTOR CURRENT (mA)
IC, COLLECTOR CURRENT (mA)
Figure 3. PNP VBE(sat) vs. IC
Figure 4. PNP VBE(on) vs. IC
1.0
1000
1000
0.9
0.8
C, CAPACITANCE (pF)
VCE, COLLECTOR−EMITTER VOLTAGE (V)
IC/IB = 10
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
500 mA
10 mA
IC = 1.0 mA
0.1
Cobo
10
100 mA
300 mA
0.01
Cibo
100
1
10
1
100
0.1
1
10
IB, BASE CURRENT (mA)
VR, REVERSE VOLTAGE (V)
Figure 5. PNP VCE vs. IB
Figure 6. PNP Capacitance
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3
100
NSM3005NZ
TYPICAL CHARACTERISTICS − Q2
3.0 V
ID, DRAIN CURRENT (A)
0.9
1.0
VGS = 2.5 V
0.9
3.5 V
0.8
2.0 V
4.0 V
0.7
1.8 V
4.5 V
0.6
0.5
1.5 V
0.4
0.3
1.2 V
0.2
TJ = 125°C
0.6
0.5
0.4
0.3
0.2
0.1
0
0.5
1.0
1.5
2.0
2.5
0
3.0
1.0
1.5
2.0
2.5
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 7. On−Region Characteristics
Figure 8. Transfer Characteristics
5.0
4.5
TJ = 25°C
ID = 0.1 A
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1.0
0.5
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
3.0
5.0
4.5
TJ = 25°C
4.0
VGS = 1.5 V
3.5
3.0
2.5
VGS = 1.8 V
2.0
1.5
VGS = 2.5 V
1.0
0.5
0
VGS = 4.5 V
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9 1.0
VGS, GATE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 9. On−Resistance vs. Gate−to−Source
Voltage
Figure 10. On−Resistance vs. Drain Current
and Gate Voltage
1.8
1000
VGS = 4.5 V
ID = 100 mA
1.7
1.6
TJ = 125°C
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
TJ = 25°C
0.7
0.1
0
RDS(on), NORMALIZED DRAIN−TO−SOURCE
RESISTANCE
TJ = −55°C
VDS = 5 V
0.8
ID, DRAIN CURRENT (A)
1.0
1.5
1.4
VGS = 1.8 V
ID = 20 mA
1.3
1.2
1.1
1.0
100
TJ = 85°C
10
0.9
0.8
0.7
−50
1
−25
0
25
50
75
100
125
2
150
4
6
8
10
12
14
16
18
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. On−Resistance Variation with
Temperature
Figure 12. Drain−to−Source Leakage Current
vs. Voltage
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4
20
NSM3005NZ
TYPICAL CHARACTERISTICS − Q2
25
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
VGS = 0 V
TJ = 25°C
f = 1 MHz
20
Ciss
15
10
Coss
5
Crss
0
0
2
4
6
8
10
12
14
16
5
15
VGS
VDS
12
3
9
2
QGS
QGD
6
VDS = 15 V
TJ = 25°C
ID = 0.2 A
1
3
0
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
QG, TOTAL GATE CHARGE (nC)
Figure 13. Capacitance Variation
Figure 14. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
10
1000
IS, SOURCE CURRENT (A)
VGS = 4.5 V
VDD = 15 V
td(off)
tf
100
tr
td(on)
TJ = 125°C
TJ = 25°C
1
TJ = −55°C
0.1
0.01
10
1
10
0.4 0.5
100
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 15. Resistive Switching Time Variation
vs. Gate Resistance
Figure 16. Diode Forward Voltage vs. Current
VGS(th), GATE−TO−SOURCE THRESHOLD
VOLTAGE (V)
t, TIME (ns)
18
QT
4
20
18
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
30
0.85
0.75
ID = 250 mA
0.65
0.55
0.45
0.35
−50
−25
0
25
50
75
100
TJ, TEMPERATURE (°C)
Figure 17. Threshold Voltage
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5
125
150
NSM3005NZ
PACKAGE DIMENSIONS
UDFN6 1.6x1.6, 0.5P
CASE 517AT
ISSUE O
A
B
D
2X
0.10 C
PIN ONE
REFERENCE
2X
0.10 C
ÉÉ
ÉÉ
L
L1
DETAIL A
E
OPTIONAL
CONSTRUCTION
EXPOSED Cu
TOP VIEW
A
(A3)
DETAIL B
0.05 C
6X
A1
D1
DETAIL A
ÉÉÉ
ÈÈÈ
MOLD CMPD
K
1
A3
DETAIL B
C
A1
SEATING
PLANE
1.34
3
6
4
L
e
BOTTOM VIEW
6X
2X
0.58
E1
6X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.20
0.30
1.60 BSC
1.60 BSC
0.50 BSC
1.14
1.34
0.38
0.58
0.54
0.74
0.20
−−−
0.15
0.35
−−−
0.10
SOLDERMASK DEFINED
MOUNTING FOOTPRINT*
2X
D2
6X
DIM
A
A1
A3
b
D
E
e
D1
D2
E1
K
L
L1
OPTIONAL
CONSTRUCTION
0.05 C
SIDE VIEW
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
b
6X
0.10 C A B
0.05 C
0.48
0.74 1.90
NOTE 3
1
0.50 PITCH
6X
0.32
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
mCOOL is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
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6
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NSM3005NZ/D