ISL54209 Features The Intersil ISL54209 dual SPDT (Single Pole/Double Throw) switch combines low distortion audio and accurate USB 2.0 high speed data (480Mbps) signal switching in the same low voltage device. When operated with a 2.5V to 5.0V single supply, this analog switch allows audio signal swings below ground, allowing for the use of a common USB and audio headphone connector in Personal Media Players and other portable battery powered devices. • High Speed (480Mbps) and Full Speed (12Mbps) Signaling Capability per USB 2.0 The ISL54209 logic control pins are 1.8V compatible, which allows for control via a standard µcontroller. • Low Distortion Negative Signal Capability • Low Power Shutdown State • Low Distortion Headphone Audio Signals - THD+N at 1mW into 32Ω Load. . . . . . .<0.013% • Crosstalk (100kHz). . . . . . . . . . . . . . . . . . -95dB • OFF-Isolation (100kHz) . . . . . . . . . . . . . . . 95dB • Single Supply Operation (VDD) . . . . . 2.5V to 5.0V The ISL54209 has an audio enable control pin to open all switches and put the part in a low power state. In this state, the device draws typically 1nA of current. The ISL54209 is available in a small 10 Ld 1.8mm x 1.4mm or 2.1mmx 1.6mm ultra-thin µTQFN packages and a 10 Ld 3mmx3mm TDFN package. It operates over a temperature range of -40°C to +85°C. Related Literature • -3dB Bandwidth USB Switch . . . . . . . . . . 736MHz • Available in µTQFN and TDFN Packages • COM Pins Over-voltage Tolerant to 5.5V • Compliant with USB 2.0 Short Circuit Requirements Without Additional External Components • Pb-Free (RoHS Compliant) Applications*(see page 16) • MP3 and other Personal Media Players • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” • Application Note AN1406 “ISL54209EVAL1Z Evaluation Board User’s Manual” • Cellular/Mobile Phones • PDAs • Audio/USB Switching Application Block Diagram 3.3V VDD ISL54209 USB/HEADPHONE JACK IN VBUS LOGIC CONTROL 4MΩ CTRL µCONTROLLER 4MΩ D- COM - D+ USB HIGH-SPEED TRANSCEIVER COM + L R 50kΩ AUDIO CODEC 50kΩ GND June 10, 2010 FN6627.4 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2009, 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL54209 MP3/USB 2.0 High Speed Switch with Negative Signal Handling and Low Power Shutdown ISL54209 Pin Configurations (Note 1) ISL54209 (10 LD 3.0mmx3.0mm TDFN) TOP VIEW ISL54209 (10 LD 2.1mmx1.6mm µTQFN) TOP VIEW CTRL 10 4MΩ VDD LOGIC CONTROL VDD 1 IN 2 9 D- COM - 3 COM - 3 COM + 4 7 L 10 CTRL 9 D- 8 D+ 7 L 6 R 50kΩ 50kΩ GND 5 6 R COM + 4 4MΩ LOGIC CONTROL 4MΩ IN 2 8 D+ 4MΩ PD 1 50kΩ 50kΩ 5 GND ISL54209 (10 LD 1.8mmx1.4mm µTQFN) TOP VIEW D- 8 CTRL 9 VDD 10 D+ L 7 6 LOGIC CONTROL 50kΩ 5 R 4 GND 3 COM + 4MΩ 1 2 IN COM - NOTE: 1. ISL54209 Switches Shown for IN = Logic “0” and CTRL = Logic “1”. Truth Table ISL54209 IN CTRL L, R D+, D- 0 0 OFF OFF 0 1 ON OFF 1 X OFF ON IN, CTRL: Logic “0” when ≤ 0.5V or Floating, Logic “1” when ≥ 1.4V with 2.7V to 3.6V Supply. 2 FN6627.4 June 10, 2010 ISL54209 Pin Descriptions TDFN µTQFN 2.1mmx1.6mm µTQFN 1.8mmx1.4mm NAME 1 1 10 VDD 2 2 1 IN 3 3 2 COM- Voice and Data Common Pin 4 4 3 COM+ Voice and Data Common Pin 5 5 4 GND 6 6 5 R Audio Right Input 7 7 6 L Audio Left Input 8 8 7 D+ USB Differential Input 9 9 8 D- USB Differential Input 10 10 9 CTRL PD - - PD FUNCTION Power Supply Digital Control Input Ground Connection Digital Control Input (Audio Enable) Thermal Pad. Tie to Ground or Float Ordering Information PART NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE (Pb-Free) PKG. DWG. # ISL54209IRUZ-T (Notes 3, 4, 5) GF -40 to +85 10 Ld 2.1mmx1.6mm µTQFN L10.2.1x1.6A ISL54209IRU1Z-T (Notes 3, 4, 5) U4 -40 to +85 10 Ld 1.8mmx1.4mm µTQFN L10.1.8x1.4A ISL54209IRTZ-T (Notes 2, 4, 5) 4209 -40 to +85 10 Ld 3mmx3mm TDFN L10.3x3A ISL54209IRTZ (Notes 2, 5) 4209 -40 to +85 10 Ld 3mmx3mm TDFN L10.3x3A ISL54209EVAL1Z ISL54209 Eval Kit NOTES: 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. Please refer to TB347 for details on reel specifications. 5. For Moisture Sensitivity Level (MSL), please see device information page for ISL54209. For more information on MSL please see techbrief TB363. 3 FN6627.4 June 10, 2010 ISL54209 Absolute Maximum Ratings Thermal Information VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5.5V Input Voltages D+, D- (Note 6) . . . . . . . . . . . . . . . . . . . . . - 2V to 5.5V L, R (Note 6). . . . . . . . . . . . . . . . - 2V to ((VDD) + 0.3V) IN, CTRL (Note 6) . . . . . . . . . . . -0.3V to ((VDD) + 0.3V) Output Voltages COM-, COM+ (Note 6) . . . . . . . . . . . . . . . . . -2V to 5.5V Continuous Current (Audio Switches) . . . . . . . . . . ±150mA Peak Current (Audio Switches) (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . ±300mA Continuous Current (USB Switches) . . . . . . . . . . . . ±40mA Peak Current (USB Switches) (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . ±100mA ESD Ratings Human Body Model, I/0 to GND . . . . . . . . . . . . . . . >4kV Human Body Model, All Other Pins. . . . . . . . . . . . . >3.5kV Human Body Model, VDD to GND . . . . . . . . . . . . . . >11kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . >250V Charged Device Model . . . . . . . . . . . . . . . . . . . . . . >2kV Latch-up Tested per JEDEC: ClassII Level A > . . . . @ +85°C Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 10 Ld 2.1mmx1.6mm µTQFN (Notes 8, 10). .154 100 10 Ld 3mmx3mm TDFN (Notes 7, 9) . . 58 18 10 Ld 1.8mmx1.4mm µTQFN (Notes 8, 10). 160 105 Maximum Junction Temperature (Plastic Package). . +150°C Maximum Storage Temperature Range. . . . . -65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C Audio Signal Range . . . . . . . . . . . . . . . . . . . . -1.5V to 1.5V USB Signal Range . . . . . . . . . . . . . . . . . . . . . . . 0V to VDD CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 6. Signals on D+, D-, L, R, COM-, COM+, CTRL and IN exceeding VDD or GND by specified amount are clamped. Limit current to maximum current ratings. 7. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 8. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 9. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. 10. For θJC, the “case temp” location is taken at the package top center. Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VINH = VCTRLH = 1.4V, VINL = VCTRLL = 0.5V, (Note 11), Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +85°C. PARAMETER TEST CONDITIONS TEMP MIN (°C) (Notes 12, 13) TYP MAX (Notes 12, 13) UNITS ANALOG SWITCH CHARACTERISTICS Audio Switches (L, R) Analog Signal Range, VANALOG VDD = 3.3V, IN = 0.5V, CTRL = 1.4V Full -1.5 - 1.5 V ON-Resistance, rON VDD = 3.0V, IN = 0.5V, CTRL = 1.4V, ICOMx = 40mA, VL or VR = -0.85V to 0.85V (Figure 3, Note 15) +25 - 2.5 2.8 Ω Full - - 3.4 Ω rON Matching Between Channels, ΔrON VDD = 3.0V, IN = 0.5V, CTRL = 1.4V, ICOMx = 40mA, VL or VR = Voltage at max rON over signal range of -0.85V to 0.85V (Notes 15, 16) +25 - 0.09 0.25 Ω Full - - 0.26 Ω rON Flatness, rFLAT(ON) VDD = 3.0V, IN = 0.5V, CTRL = 1.4V, ICOMx = 40mA, VL or VR = -0.85V to 0.85V (Notes 14, 15) +25 - 0.02 0.05 Ω Full - - 0.07 Ω VDD = 5.0V, IN = 0V, CTRL = VDD, ICOMx = 40mA, VL or VR = -0.85V to 0.85V (Figure 3) 25 - 2.3 - Ω ON-Resistance, rON 4 FN6627.4 June 10, 2010 ISL54209 Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VINH = VCTRLH = 1.4V, VINL = VCTRLL = 0.5V, (Note 11), Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER TEST CONDITIONS TEMP MIN (°C) (Notes 12, 13) TYP MAX (Notes 12, 13) UNITS ON-Resistance, rON VDD = 4.2V, IN = 0V, CTRL = VDD, ICOMx = 40mA, VL or VR = -0.85V to 0.85V (Figure 3) 25 - 2.35 - Ω ON-Resistance, rON VDD = 2.85V, IN = 0V, CTRL = VDD, ICOMx = 40mA, VL or VR = -0.85V to 0.85V (Figure 3) 25 - 2.72 - Ω Discharge Pull-Down Resistance, RL, RR VDD = 3.6V, IN = 0V, CTRL = 1.4V, VCOM- or VCOM+ = -0.85V, 0.85V, VL or VR = -0.85V, 0.85V, VD+ and VD- = floating; measure current through the discharge pull-down resistor and calculate resistance value. +25 - 50 - kΩ Analog Signal Range, VANALOG VDD = 2.7V to 3.6V, IN = 1.4V, CTRL = 1.4V Full 0 - VDD V ON-Resistance, rON (High-Speed) VDD = 3.3V, IN = 1.4V, CTRL = 1.4V, ICOMx = 40mA, VD+ or VD- = 0V to 400mV (Figure 4, Note 15) 25 - 5 6.5 Ω Full - - 7 Ω rON Matching Between Channels, ΔrON (High-Speed) VDD = 3.3V, IN = 1.4V, CTRL = 1.4V, ICOMx = 40mA, VD+ or VD- = Voltage at max rON (Notes 15, 16) 25 - 0.05 0.25 Ω Full - - 0.55 Ω rON Flatness, rFLAT(ON) (High-Speed) VDD = 3.3V, IN = 1.4V, CTRL = 1.4V, ICOMx = 40mA, VD+ or VD- = 0V to 400mV (Notes 14, 15) 25 - 0.45 0.55 Ω Full - - 1.0 Ω ON-Resistance, rON (Full-Speed) VDD = 3.3V, IN = 1.4V, CTRL = 1.4V, ICOMx = 1mA, VD+ or VD- = 3.3V (Figure 4, Note 15) 25 - 25 30 Ω Full - - 35 Ω ON-Resistance, rON VDD = 5.0V, IN = VDD, CTRL = VDD, ICOMx = 1mA, VD+ or VD- = 5V (Figure 4) +25 - 20 - Ω ON-Resistance, rON VDD = 4.2V, IN = VDD, CTRL = VDD, ICOMx = 1mA, VD+ or VD- = 4.2V (Figure 4) 25 - 22 - Ω ON-Resistance, rON VDD = 2.85V, IN = VDD, CTRL = VDD, ICOMx = 1mA, VD+ or VD- = 2.85V (Figure 4) 25 - 28 - Ω OFF-Leakage Current, ID+(OFF) or ID-(OFF) VDD = 3.6V, IN = 0V, CTRL = 3.6V, VCOM- or VCOM+ = 0.5V, 0V, VD+ or VD- = 0V, 0.5V, VL and VR = float 25 -5 0.5 5 nA Full -60 - 60 nA 25 -10 2 10 nA Full -70 - 70 nA VDD = 3.0V, RL = 50Ω, CL = 10pF (Figure 1) 25 - 52 - ns USB Turn-OFF Time, tOFF VDD = 3.0V, RL = 50Ω, CL = 10pF (Figure 1) 25 - 20 - ns Audio Turn-ON Time, tON VDD = 3.0V, RL = 50Ω, CL = 10pF (Figure 1) 25 - 2.5 - µs Audio Turn-OFF Time, tOFF VDD = 3.0V, RL = 50Ω, CL = 10pF (Figure 1) 25 - 50 - ns Break-Before-Make Time VDD = 3.0V, RL = 50Ω, CL = 10pF (Figure 2) Delay, tD 25 - 44 - ns USB Switches (D+, D-) ON-Leakage Current, IDX VDD = 3.6V, IN = VDD, CTRL = 0V or VDD, VD+ or VD- = 2.7V, VCOM- or VCOM+ = Float, VL and VR = float DYNAMIC CHARACTERISTICS USB Turn-ON Time, tON 5 FN6627.4 June 10, 2010 ISL54209 Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VINH = VCTRLH = 1.4V, VINL = VCTRLL = 0.5V, (Note 11), Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER TEST CONDITIONS TEMP MIN (°C) (Notes 12, 13) TYP MAX (Notes 12, 13) UNITS Skew, tSKEW VDD = 3.0V, IN = 3V, CTRL = 3V, RL = 45Ω, CL = 10pF, tR = tF = 720ps at 480Mbps, (Duty Cycle = 50%) (Figure 7) 25 - 50 - ps Total Jitter, tJ VDD =3.0V, IN = 3V, CTRL = 3V, RL = 50Ω, CL = 10pF, tR = tF = 750ps at 480Mbps 25 - 210 - ps Propagation Delay, tPD VDD = 3.0V, IN = 3V, CTRL = 3V, RL = 45Ω, CL = 10pF (Figure 7) 25 - 250 - ps Audio Crosstalk R to COM-, L to COM+ VDD = 3.0V, IN = 0V, CTRL = 3.0V, RL = 32Ω, f = 20Hz to 20kHz, VR or VL = 0.707VRMS (2VP-P) (Figure 6) 25 - -110 - dB Crosstalk (Audio to USB, USB to Audio) VDD = 3.0V, RL = 50Ω, f = 100kHz (Figure 6) 25 - -95 - dB OFF-Isolation VDD = 3.0V, RL = 50Ω, f = 100kHz 25 - 95 - dB OFF-Isolation VDD = 3.0V, RL = 32Ω, f = 20Hz to 20kHz 25 - 114 - dB Total Harmonic Distortion f = 20Hz to 20kHz, VDD = 3.0V, IN = 0V, CTRL = 3.0V, VL or VR = 180mVRMS (509mVP-P), RL = 32Ω 25 - 0.013 - % Total Harmonic Distortion f = 20Hz to 20kHz, VDD = 3.0V, IN = 0V, CTRL = 3.0V, VL or VR = 0.707VRMS (2VP-P), RL = 32Ω 25 - 0.06 - % USB Switch -3dB Bandwidth Signal = 0dBm, 0.2VDC offset, RL = 50Ω, CL = 5pF 25 - 736 - MHz D+/D- OFF-Capacitance, f = 1MHz, VDD = 3.0V, IN = 0V, CTRL = 3.0V, VD- or VD+ = VCOMx = 0V (Figure 5) CDxOFF 25 - 3 - pF L/R OFF-Capacitance, CLOFF, CROFF f = 1MHz, VDD = 3.0V, IN = 3.0V, CTRL = 0V or 3V, VL or VR = VCOMx = 0V (Figure 5) 25 - 5 - pF COM ON-Capacitance, CCOMx(ON) f = 1MHz, VDD = 3.0V, IN = 3.0V, CTRL = 0V or 3V, VD- or VD+ = VCOMx = 0V (Figure 5) 25 - 8 - pF Power Supply Range, VDD Full 2.5 5.0 V Positive Supply Current, VDD = 3.6V, IN = 0V or 3.6V, CTRL = 3.6V IDD 25 - 7 13 µA Full - - 15 µA 25 - 1 10 nA Full - - 150 nA 25 - 7 - µA POWER SUPPLY CHARACTERISTICS Positive Supply Current, VDD = 3.6V, IN = 0V, CTRL = 0V or float IDD (Low Power State) Power OFF-Current, IDx ICOMx VDD = 0V, VDx = VCOMx = 5.25V, IN = CTRL = Float DIGITAL INPUT CHARACTERISTICS Voltage Low, VINL, VCTRLL VDD = 2.7V to 3.6V Full - - 0.5 V Voltage High, VINH, VCTRLH VDD = 2.7V to 3.6V Full 1.4 - - V 6 FN6627.4 June 10, 2010 ISL54209 Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VINH = VCTRLH = 1.4V, VINL = VCTRLL = 0.5V, (Note 11), Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) TEMP MIN (°C) (Notes 12, 13) TEST CONDITIONS Input Current, IINL, ICTRLL VDD = 3.6V, IN = 0V, CTRL = 0V Full -50 20 50 nA Input Current, IINH VDD = 3.6V, IN = 3.6, CTRL = 0V Full -2 0.9 2 µA Input Current, ICTRLH VDD = 3.6V, IN = 0V, CTRL = 3.6V Full -2 0.9 2 µA CTRL Pull-Down Resistor, VDD = 3.6V, IN = 0V, CTRL = 3.6V; measure RCTRL current through the internal pull-down resistor and calculate resistance value. Full - 4 - MΩ IN Pull-Down Resistor, RIN Full - 4 - MΩ VDD = 3.6V, IN = 3.6V, CTRL = 3.6V; measure current through the internal pull-down resistor and calculate resistance value. TYP MAX (Notes 12, 13) UNITS PARAMETER NOTES: 11. VLOGIC = Input voltage to perform proper function. 12. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 14. Flatness is defined as the difference between maximum and minimum value of ON-resistance over the specified analog signal range. 15. Limits established by characterization and are not production tested. 16. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel with lowest max rON value, between L and R or between D+ and D-. 7 FN6627.4 June 10, 2010 ISL54209 Test Circuits and Waveforms VINH LOGIC INPUT 50% VINL VINPUT tOFF SWITCH INPUT VINPUT SWITCH INPUT CTRL VOUT AUDIO OR USB COMx IN VOUT 90% SWITCH OUTPUT C VDD tr < 20ns tf < 20ns 90% VIN CL 10pF RL 50Ω GND 0V tON Logic input waveform is inverted for switches that have the opposite logic sense. Repeat test for all switches. CL includes fixture and stray capacitance. RL ----------------------V OUT = V (INPUT) R + r L ON FIGURE 1B. TEST CIRCUIT FIGURE 1A. MEASUREMENT POINTS FIGURE 1. SWITCHING TIMES VDD VINH LOGIC INPUT C CTRL VINL D- OR D+ VINPUT SWITCH OUTPUT VOUT 0V GND VIN tD FIGURE 2A. MEASUREMENT POINTS CL 10pF RL 50Ω IN 90% VOUT COMx L OR R Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 2B. TEST CIRCUIT FIGURE 2. BREAK-BEFORE-MAKE TIME VDD VDD C C rON = V1/40mA rON = V1/40mA CTRL CTRL D- OR D+ L OR R VL OR VR VD- OR VD+ IN 0V OR FLOAT V1 40mA 40mA COMx IN V1 VDD COMx GND GND Repeat test for all switches. Repeat test for all switches. FIGURE 3. AUDIO rON TEST CIRCUIT 8 FIGURE 4. USB rON TEST CIRCUIT FN6627.4 June 10, 2010 ISL54209 Test Circuits and Waveforms (Continued) VDD VDD C CTRL C CTRL AUDIO OR USB SIGNAL GENERATOR L OR R IN IMPEDANCE ANALYZER 32Ω COMx IN 0V OR VDD 0V COMx GND R OR L COMx ANALYZER RL Repeat test for all switches. NC GND Signal direction through switch is reversed, worst case values are recorded. Repeat test for all switches. FIGURE 5. CAPACITANCE TEST CIRCUIT FIGURE 6. AUDIO CROSSTALK TEST CIRCUIT VDD C tri CTRL 90% DIN+ DIN- 10% 50% tskew_i 90% VDD DIN+ IN 15.8Ω COM+ 143Ω 50% 10% DIN- tfi tro 15.8Ω OUT+ D+ CL COM- OUT- DCL 143Ω 45Ω 45Ω 90% OUT+ OUT- 10% GND 50% tskew_o 50% 90% tf0 10% |tro - tri| Delay Due to Switch for Rising Input and Rising Output Signals. |tfo - tfi| Delay Due to Switch for Falling Input and Falling Output Signals. |tskew_0| Change in Skew through the Switch for Output Signals. |tskew_i| Change in Skew through the Switch for Input Signals. FIGURE 7A. MEASUREMENT POINTS FIGURE 7B. TEST CIRCUIT FIGURE 7. SKEW TEST 9 FN6627.4 June 10, 2010 ISL54209 Typical Application Block Diagrams 3.3V VDD ISL54209 USB/HEADPHONE JACK IN LOGIC CONTROL VBUS 4MΩ CTRL µCONTROLLER 4MΩ D- COM - D+ USB HIGH-SPEED TRANSCEIVER COM + L AUDIO CODEC R 50kΩ 50kΩ GND FIGURE 8. LOGIC CONTROL VIA MICRO-PROCESSOR 3.3V VDD ISL54209 USB/HEADPHONE JACK IN LOGIC CONTROL VBUS 500kΩ 4MΩ CTRL µCONTROLLER 4MΩ D- COM - D+ USB HIGH-SPEED TRANSCEIVER COM + L R 50kΩ AUDIO CODEC 50kΩ GND FIGURE 9. LOGIC CONTROL VIA VBUS VOLTAGE FROM COMPUTER OR USB HUB 10 FN6627.4 June 10, 2010 ISL54209 Detailed Description The ISL54209 device is a dual single pole/double throw (SPDT) analog switch that operates from a single DC power supply in the range of 2.5V to 5.0V. It was designed to function as a dual 2 to 1 multiplexer to select between USB differential data signals and audio L and R stereo signals. It comes in tiny µTQFN and TDFN packages for use in MP3 players, PDAs, cellular phones and other personal media players. The part consists of two 2.5Ω audio switches and two 5Ω USB switches. The audio switches can accept signals that swing below ground. They were designed to pass audio left and right stereo signals, that are ground referenced, with minimal distortion. The USB switches were designed to pass high-speed USB differential data signals with minimal edge and phase distortion. The ISL54209 was specifically designed for MP3 players, personal media players and cellular phone applications that need to combine the audio headphone jack and the USB data connector into a single shared connector, thereby saving space and component cost. “Typical Application Block Diagrams” on page 10 of this functionality are shown in Figures 8 and 9. The ISL54209 has a single logic control pin (IN) that selects between the audio switches and the USB switches. This pin can be driven Low or High to switch between the audio CODEC drivers and USB transceiver of the MP3 player or cellular phone. The ISL54209 also contains a logic control pin (CTRL) that when driven Low while IN is Low, opens all switches and puts the part into a low power state, drawing typically 1nA of IDD current. Detailed descriptions of the two types of switches are provided in the following sections. Audio Switches The two audio switches (L, R) are 2.5Ω switches that can pass signals that swing below ground by as much as 1.5V. They were designed to pass ground reference stereo signals with minimal insertion loss and very low distortion over a ±1V signal range. Crosstalk between the audio channels is -110dB over the audio band. Crosstalk between the audio channel and USB channel is -95dB at 100kHz. These switches have excellent OFF-isolation, 114dB, over the audio band with a 32Ω load. Over a signal range of ±1V (0.707VRMS) with VDD > 2.7V, these switches have an extremely low rON resistance variation. They can pass ground referenced audio signals with very low distortion (<0.06% THD+N) when delivering 15.6mW into a 32Ω headphone speaker load. See Figures 10 and 11. These switches are bi-directional switches. In typical applications, the audio drivers would be connected at the L and R side of the switch and the speaker loads would be connected at the COM side of the switch. 11 The audio switches are active (turned ON) whenever the IN voltage is ≤ 0.5V or floating and the CTRL voltage ≥ to 1.4V. USB Switches The two USB switches (D+, D-) are bidirectional switches that can pass rail-to-rail signals. When powered with a 3.3V supply, these switches have a nominal rON of 5Ω over the signal range of 0V to 400mV with a rON flatness of 0.45Ω. The rON matching between the D+ and Dswitches over this signal range is only 0.05Ω ensuring minimal impact by the switches to USB high speed signal transitions. As the signal level increases, the rON resistance increases. At a signal level of 3.3V, the switch resistance is nominally 25Ω. The USB switches were specifically designed to pass USB 2.0 high-speed (480Mbps) differential signals typically in the range of 0V to 400mV. They have low capacitance and high bandwidth to pass the USB high-speed signals with minimum edge and phase distortion to meet USB 2.0 high speed signal quality specifications. See Figure 12. The USB switches can also pass USB full-speed signals (12Mbps) with minimal distortion and meet all the USB requirements for USB 2.0 full-speed signaling. See Figure 13 for Full-speed Eye Pattern taken with switch in the signal path. The USB switches are active (turned ON) whenever the IN voltage is ≥ to 1.4V. COM+, COM-, 1D-, 1D+, 2D-, AND 2D+ ARE OVERVOLTAGE TOLERANT UP TO 5.5V AND DOWN TO -1.5V For normal operation, the signal range for the USB switches is from -1V to VDD. During normal operation, the signal voltage at D- and D+ should not be allowed to exceed the VDD voltage rail or go below ground by more than -1.0V. However, the ISL54209, with a VDD supply voltage in the range of 0V to 5.0V, can withstand an overvoltage of up to 5.5V or down to -1.5V applied at its COM pins (COM-, COM+) and/or USB signal pins (1D-, 1D+, 2D-, 2D+) without damage. In this overvoltage condition, the part draws <1mA of current and causes no stress to the IC. Note: When in the overvoltage state, the fault voltage at a COM pin will pass thru the USB switch to the signal side of the switch, so the media player’s USB transceiver must have protection circuitry to protect it from damage. ISL54209 Operation The following will discuss using the ISL54209 in the “Typical Application Block Diagrams” on page 10 shown in Figures 8 and 9. VDD SUPPLY The DC power supply connected at VDD pin provides the required bias voltage for proper switch operation. The FN6627.4 June 10, 2010 ISL54209 part can operate with a supply voltage in the range of 2.5V to 5.0V. and will drive the IN pin low and put the part back into the Audio or Low Power Mode. In a typical USB/Audio application for portable battery powered devices, the VDD voltage will come from a battery or an LDO and be in the range of 2.7V to 3.6V. For best possible USB full-speed operation (12Mbps), it is recommended that the VDD voltage be ≥ 2.5V in order to get a USB data signal level above 2.5V. Low Power Mode LOGIC CONTROL The state of the ISL54209 device is determined by the voltage at the IN pin and the CTRL pin. These logic pins are 1.8V logic compatible when VDD is in the range of 2.7V to 3.6V and can be controlled by a standard microprocessor. The part has three states or modes of operation. The Audio Mode, USB Mode and the Low Power Mode. Refer to the “Truth Table” on page 2. The IN and CTRL pins are internally pulled low through a 4MΩ resistor to ground and can be left floating or tri-stated by the microprocessor. The CTRL control pin is only active when IN is logic “0”. Logic control voltage levels: IN = Logic “0” (Low) when VIN ≤ 0.5V or Floating. IN = Logic “1” (High) when VIN ≥ 1.4V CTRL = Logic “0” (Low) when ≤ 0.5V or Floating. CTRL = Logic “1” (High) when ≥ 1.4V Audio Mode If the IN pin = Logic “0” and CTRL pin = Logic “1”, the part will be in the Audio mode. In Audio mode, the L (left) and R (right) 2.5Ω audio switches are ON and the D- and D+ 5Ω switches are OFF (high impedance). When nothing is plugged into the common connector or a headphone is plugged into the common connector, the µprocessor will sense that there is no voltage at the VBUS pin of the connector and will drive and hold the IN control pin of the ISL54209 low. As long as CTRL = Logic “1,” the ISL54209 part will be in the audio mode and the audio drivers of the media player can drive the headphones and play music. USB Mode If the IN pin = Logic “1” and the CTRL pin = Logic “0” or Logic “1”, the part will go into USB mode. In USB mode, the D- and D+ 5Ω switches are ON and the L and R 2.5Ω audio switches are OFF (high impedance). When a USB cable from a computer or USB hub is connected at the common connector, the µprocessor will sense the presence of the 5V VBUS and drive the IN pin voltage high. The ISL54209 part will go into the USB mode. In USB mode, the computer or USB hub transceiver and the MP3 player or cell phone USB transceiver are connected and digital data will be able to be transmitted back and forth. If the IN pin = Logic “0” and CTRL pin = Logic “0”, the part will be in the Low Power mode. In the Low Power mode, the audio switches and the USB switches are OFF. In this state, the device draws typically 1nA of current. In Low Power mode, the OFF-isolation and crosstalk between switch cells is minimal for negative swinging signals. Care should be taken to avoid negative swinging signals in this mode of operation. In typical applications, the Low Power state will be applied to the ISL54209 part when the portable media player is in its sleep or hibernate mode to conserve battery power. In the sleep mode, no audio or USB signals are applied to the part. USING THE COMPUTER VBUS VOLTAGE TO DRIVE THE “IN” PIN Rather than using a microprocessor to control the IN logic pin, one can directly drive the IN pin using the 5V VBUS voltage from the computer or USB hub. See Figure 9 “Typical Application Block Diagrams” on page 10. When a headphone or nothing is connected at the common connector, the internal 4MΩ pull-down will pull the IN pin low, putting the ISL54209 in the Audio or Low Power mode, depending on the condition of the CTRL pin. When a USB cable is connected at the common connector, the voltage at the IN pin will be driven to 5V and the part will automatically go into the USB mode. When the USB cable is disconnected from the common connector, the voltage at the IN pin will be pulled low by the pull-down resistor and return to the Audio or Low Power mode, depending on the condition of the CTRL pin. Note: The ISL54209 contains an internal diode between the IN pin and VDD pin. Whenever the IN voltage is greater than the VDD voltage by more than 0.7V, current will flow through this diode into the VDD power supply bus. An external series resistor in the range of 100kΩ to 500kΩ is required at the IN logic pin to limit the current when driving it with the VBUS voltage. This allows the VBUS voltage from a computer or USB hub (4.4V to 5.25V) to drive the IN pin while the VDD voltage is in the range of 2.5V to 3.6V. A 500kΩ resistor will limit the current to 2.76µA and still allow the IN logic voltage to go to around 3.67V, which is will above the required VINH level of 1.4V. A smaller series resistor can be used but more current will flow. When the USB cable is disconnected, the µprocessor will sense that the 5V VBUS voltage is no longer connected 12 FN6627.4 June 10, 2010 ISL54209 Typical Performance Curves TA = +25°C, Unless Otherwise Specified. 0.11 0.10 0.10 RLOAD = 32Ω VLOAD = 0.707VRMS 0.08 0.08 THD+N (%) THD+N (%) 0.09 0.07 VDD = 2.6V 0.06 0.05 0.04 20 RLOAD = 32Ω VDD = 3V VDD = 2.7V VDD = 3.6V 0.06 2VP-P 1VP-P 0.02 20 200 2k FREQUENCY (Hz) 20k FIGURE 11. THD+N vs SIGNAL LEVELS vs FREQUENCY VOLTAGE SCALE (0.1V/DIV) FIGURE 10. THD+N vs SUPPLY VOLTAGE vs FREQUENCY 20k 2.5VP-P 0.04 VDD = 3V 200 2k FREQUENCY (Hz) 3VP-P TIME SCALE (0.2ns/DIV) FIGURE 12. EYE PATTERN: 480Mbps WITH USB SWITCHES IN THE SIGNAL PATH 13 FN6627.4 June 10, 2010 ISL54209 Typical Performance Curves TA = +25°C, Unless Otherwise Specified. (Continued) VOLTAGE SCALE (0.5V/DIV.) VDD = 3.3V TIME SCALE (10ns/DIV) FIGURE 13. EYE PATTERN: 12Mbps USB SIGNAL WITH USB SWITCHES IN THE SIGNAL PATH 1 -20 -1 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 0 USB SWITCH 0 -2 -3 -4 RL = 50Ω 10M 100M FREQUENCY (Hz) FIGURE 14. FREQUENCY RESPONSE 14 VDCOFFSET = 1.5VDC -40 -60 -80 -100 VSIGNAL = 0.2VP-P TO 2VP-P 1M RL = 50Ω VSIGNAL = 0.2VP-P TO 2VP-P 1G -120 0.001M 0.01M 0.1M 1M 10M FREQUENCY (Hz) 100M 500M FIGURE 15. OFF-ISOLATION USB SWITCHES FN6627.4 June 10, 2010 ISL54209 Typical Performance Curves TA = +25°C, Unless Otherwise Specified. (Continued) NORMALIZED GAIN (dB) 0 -20 RL = 50Ω VSIGNAL = 0.2VP-P TO 2VP-P Die Characteristics SUBSTRATE AND TDFN THERMAL PAD POTENTIAL (POWERED UP): -40 GND -60 TRANSISTOR COUNT: -80 98 PROCESS: -100 Submicron CMOS -120 0.001M 0.01M 0.1M 1M 10M 100M 500M FREQUENCY (Hz) FIGURE 16. OFF-ISOLATION AUDIO SWITCHES 15 FN6627.4 June 10, 2010 ISL54209 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION CHANGE 3/8/10 FN6627.4 Made correction to Tjc in Thermal information and corresponding notes as follows: 2.1x1.6 uTQFN package from “48.3” to “100” and 1.8x1.4 uTQFN package from “61.9” to “105”. Added note that is "not direct attach" for both uTQFN packages. Added Latchup to Abs Max Ratings. Updated POD L10.2.1X1.6A to most recent rev. Changes were to convert to new format by moving dimensions from table onto drawing (no dimension changes) Updated POD L10.3X3A to most recent rev. Changes were to convert to new format by moving dimensions from table onto drawing (no dimension changes) 11/24/09 FN6627.3 Added 10 Ld 1.8x1.4 µTQFN option Added MSL note to Ordering Information Added “Boldface limits apply...” to common conditions of Electrical Specifications table. Bolded full temperature specs in spec table. Added Revision History and Products section Added L10.1.8x1.4A package outline drawing Under thermal information for the 2.1 x 1.6 µTQFN & the 1.8 x 1.4 µTQFN, added new boiler plate note for theta JC indicating measurement taken at center of top of package. Moved Note 8 down to 3x3 TDFN. 7/1/08 FN6627.2 Added eval part # to ordering info and updated ESD HBM rating. Applied Intersil standards: Updated pb-free Note 2 to match format, updated over-temp note 4/3/08 FN6627.1 -P2, added Note 3 to order info per Mark Kwoka's new verbiage based on lead finish. Update cross refs accordingly -P3, changed ESD and added apps info for the VBUS control -P5, Note 10 revised to: "Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested." from "Parts are 100% tested at +25°C. Overtemperature limits established by characterization and are not production tested." 12/20/07 FN6627.0 Initial Release Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. *For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL54209 To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 16 FN6627.4 June 10, 2010 ISL54209 Package Outline Drawing L10.1.8x1.4A 10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 5, 3/10 1.80 B 6 PIN #1 ID A 1 1 1.40 3 10 0.50 6 PIN 1 INDEX AREA 9 X 0.40 2 10X 0.20 4 0.10 M C A B 0.05 M C 0.70 8 5 0.10 7 2X 4X 0.30 6 6X 0.40 TOP VIEW BOTTOM VIEW SEE DETAIL "X" 0.10 C MAX. 0.55 C SEATING PLANE 0.08 C (9 X 0.60) 1 (10X 0.20) (4X 0.30) 3 10 8 (0.70) SIDE VIEW (0.70) C 5 6 0 .1 27 REF 7 (6X 0.40) PACKAGE OUTLINE 0-0.05 TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. JEDEC reference MO-255. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 17 FN6627.4 June 10, 2010 ISL54209 Package Outline Drawing L10.2.1x1.6A 10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 5, 3/10 8. PIN 1 INDEX AREA 2.10 A B PIN #1 ID 1 0.05 MIN. 1 8. 4 4X 0.20 MIN. 1.60 0.10 MIN. 10 5 0.80 10X 0.40 0.10 6 9 2X 6X 0.50 10 X 0.20 4 TOP VIEW 0.10 M C A B M C BOTTOM VIEW (10 X 0.20) SEE DETAIL "X" (0.05 MIN) PACKAGE OUTLINE 1 MAX. 0.55 0.10 C (10X 0.60) C (0.10 MIN.) (2.00) SEATING PLANE 0.08 C SIDE VIEW (0.80) (1.30) C 0 . 125 REF (6X 0.50 ) (2.50) 0-0.05 TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" NOTES: 18 1. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 2. All Dimensions are in millimeters. Angles are in degrees. Dimensions in ( ) for Reference Only. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Lead width dimension applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Maximum package warpage is 0.05mm. 6. Maximum allowable burrs is 0.076mm in all directions. 7. Same as JEDEC MO-255UABD except: No lead-pull-back, MIN. Package thickness = 0.45 not 0.50mm Lead Length dim. = 0.45mm max. not 0.42mm. 8. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. FN6627.4 June 10, 2010 ISL54209 Package Outline Drawing L10.3x3A 10 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE Rev 5, 3/10 3.00 A 2.0 REF 6 PIN 1 INDEX AREA B 8X 0.50 BSC 5 1 6 PIN 1 INDEX AREA 10X 0 . 30 3.00 1.50 0.15 (4X) 10 0.10 M C A B 0.05 M C 5 4 10 X 0.25 TOP VIEW 2.30 ( 2.30 ) BOTTOM VIEW 0 .80 MAX SEE DETAIL "X" 0.10 C C (2.90) SEATING PLANE 0.08 C (1.50) SIDE VIEW (10 X 0.50) 0 . 2 REF 5 C ( 8X 0 .50 ) ( 10X 0.25 ) 0 . 00 MIN. 0 . 05 MAX. TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 Angular ±2.50° 4. Dimension applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. 19 Compliant to JEDEC MO-229-WEED-3 except exposed pad length (2.30mm). FN6627.4 June 10, 2010