74AHCT240-Q100
Octal buffer/line driver; inverting; 3-state
Rev. 2 — 1 March 2016
Product data sheet
1. General description
The 74AHCT240-Q100 is an 8-bit inverting buffer/line drivers with 3-state outputs. This
device can be used as two 4-bit buffers or one 8-bit buffer. It features two output enables
(1OE and 2OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the
outputs to assume a high-impedance OFF-state. Inputs are over voltage tolerant. This
feature allows the use of these devices as translators in mixed voltage environments.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accept voltages higher than VCC
74AHCT240-Q100 operates with TTL input levels
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
Multiple package options
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
40 C to +125 C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74AHCT240PW-Q100 40 C to +125 C
TSSOP20
plastic thin shrink small outline package; 20 leads; SOT360-1
body width 4.4 mm
74AHCT240BQ-Q100 40 C to +125 C
DHVQFN20 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads;
20 terminals; body 2.5 4.5 0.85 mm
74AHCT240D-Q100
SOT764-1
4. Functional diagram
$
$
< < $
$
< < $
< $
<
$
$
< < 2(
2(
Fig 1.
Logic symbol
74AHCT240_Q100
Product data sheet
(1
(1
PJX
PJX
Fig 2.
IEC logic symbol
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
2 of 15
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
5. Pinning information
5.1 Pinning
WHUPLQDO
LQGH[DUHD
9&&
2(
$+&74
$+&74
$
2(
<
<
$
$
2(
9&&
$
2(
<
<
<
<
$
$
$
$
<
<
<
<
$
$
<
$
<
$
$
<
<
<
*1' $
*1'
$
$
*1' <
DDD
7UDQVSDUHQWWRSYLHZ
DDD
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 3.
Pin configuration SO20 and TSSOP20
Fig 4.
Pin configuration DHVQFN20
5.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
1OE
1
output enable input (active LOW)
2OE
19
output enable input (active LOW)
1A0, 1A1, 1A2, 1A3
2, 4, 6, 8
data input
2A0, 2A1, 2A2, 2A3
17, 15, 13, 11
data input
1Y0, 1Y1, 1Y2, 1Y3
18, 16, 14, 12
data output
2Y0, 2Y1, 2Y2, 2Y3
3, 5, 7, 9
data output
GND
10
ground (0 V)
VCC
20
power supply
74AHCT240_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
3 of 15
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
6. Functional description
Table 3.
Function table[1]
Control
Input
Output
nOE
nAn
nYn
L
L
H
L
H
L
H
X
Z
[1]
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
VCC
supply voltage
VI
input voltage
IIK
input clamping current
VI < 0.5 V
[1]
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
[1]
IO
output current
VO = 0.5 V to (VCC + 0.5 V)
Min
Max
Unit
0.5
+7.0
V
0.5
+7.0
V
20
-
mA
-
20
mA
-
25
mA
ICC
supply current
-
75
mA
IGND
ground current
75
-
mA
Tstg
storage temperature
65
+150
C
-
500
mW
[1]
[2]
Tamb = 40 C to +125 C
total power dissipation
Ptot
[2]
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SO20 package: above 70 C the value of Ptot derates linearly with 8.0 mW/K.
For TSSOP20 package: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
For DHVQFN20 package: above 60 C the value of Ptot derates linearly with 4.5 mW/K.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Symbol
Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
Tamb
ambient temperature
t/V
input transition rise and fall rate
74AHCT240_Q100
Product data sheet
Conditions
VCC = 5 V 0.5 V
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
Min
Typ
Max
Unit
4.5
5.0
5.5
V
0
-
5.5
V
0
-
VCC
V
40
+25
+125
C
-
-
20
ns/V
© NXP Semiconductors N.V. 2016. All rights reserved.
4 of 15
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
2.0
-
2.0
-
V
VIL
LOW-level
input voltage
VCC = 4.5 V to 5.5 V
-
-
0.8
-
0.8
-
0.8
V
VOH
HIGH-level
VI = VIH or VIL; VCC = 4.5 V
output voltage
IO = 50 A
4.4
4.5
-
4.4
-
4.4
-
V
3.94
-
-
3.80
-
3.70
-
V
IO = 8.0 mA
VOL
LOW-level
VI = VIH or VIL; VCC = 4.5 V
output voltage
IO = 50 A
IO = 8.0 mA
0
0.1
-
0.1
-
0.1
V
-
0.36
-
0.44
-
0.55
V
-
-
0.1
-
1.0
-
2.0
A
II
input leakage
current
IOZ
OFF-state
VI = VIH or VIL;
output current VO = VCC or GND per input
pin; other inputs at
VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
0.25
-
2.5
-
10.0
A
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
4.0
-
40
-
80
A
ICC
additional
per input pin;
supply current VI = VCC 2.1 V;
other pins at VCC or GND;
IO = 0 A; VCC = 4.5 V to 5.5 V
-
-
1.35
-
1.5
-
1.5
mA
CI
input
capacitance
-
3
10
-
10
-
10
pF
CO
output
capacitance
-
4
-
-
-
-
-
pF
74AHCT240_Q100
Product data sheet
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
-
VI = VCC or GND
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
5 of 15
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 7.
Symbol Parameter
propagation delay
tpd
25 C
Conditions
VCC = 4.5 V to 5.5 V; CL = 50 pF
enable time
nOE to nYn; see Figure 6
VCC = 4.5 V to 5.5 V; CL = 50 pF
disable time
power dissipation
capacitance
CPD
Min
Max
Min
Max
(85 C)
Max
(125 C)
-
3.0
5.8
1.0
6.8
8.5
ns
-
4.4
8.4
1.0
9.5
11.9
ns
-
3.4
7.5
1.0
9.0
14.4
ns
-
4.5
9.5
1.0
11.5
14.4
ns
[2]
VCC = 4.5 V to 5.5 V; CL = 15 pF
tdis
[2]
nOE to nYn; see Figure 6
VCC = 4.5 V to 5.5 V; CL = 15 pF
-
3.9
6.1
1.0
6.7
8.3
ns
VCC = 4.5 V to 5.5 V; CL = 50 pF
-
6.2
8.7
1.0
9.2
11.5
ns
-
9
-
-
-
-
pF
[3]
VI = GND to VCC; CL = 50 pF;
fi = 1 MHz
[1]
Typical values are measured at nominal supply voltage (VCC = 5.0 V).
[2]
tpd is the same as tPLH and tPHL; ten is the same as tPZH and tPZL; tdis is the same as tPLZ and tPHZ.
[3]
Unit
[2]
nAn to nYn; see Figure 5
VCC = 4.5 V to 5.5 V; CL = 15 pF
ten
40 C to +125 C
Typ[1]
CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
11. Waveforms
9,
Q$QLQSXW
90
90
*1'
W3+/
92+
W3/+
90
Q<QRXWSXW
90
92/
W7+/
W7/+
PJX
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5.
Propagation delay input (nAn) to output (nYn)
74AHCT240_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
6 of 15
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
9,
Q2(LQSXW
90
*1'
W 3/=
W 3=/
9&&
Q<QRXWSXW
/2:WR2))
2))WR/2:
90
9;
92/
W 3=+
W 3+=
92+
9<
Q<QRXWSXW
+,*+WR2))
2))WR+,*+
*1'
90
RXWSXWV
HQDEOHG
RXWSXWV
GLVDEOHG
RXWSXWV
HQDEOHG
DDH
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6.
Enable and disable times
Table 8.
Measurement points
Input
Output
VM
VM
VX
VY
1.5 V
0.5VCC
VOL + 0.3 V
VOH 0.3 V
74AHCT240_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
7 of 15
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
9,
W:
QHJDWLYH
SXOVH
90
9
9,
WI
WU
WU
WI
SRVLWLYH
SXOVH
9
90
90
90
W:
9&&
9&&
*
9,
92
5/
6
RSHQ
'87
&/
57
DDG
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 7.
Test circuit for measuring switching times
Table 9.
Test data
Input
Load
S1 position
VI
tr, tf
CL
RL
tPHL, tPLH
tPZH, tPHZ
tPZL, tPLZ
3.0 V
3.0 ns
15 pF, 50 pF
1 k
open
GND
VCC
74AHCT240_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
8 of 15
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
12. Package outline
62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP
627
'
$
(
;
F
\
+(
Y 0 $
=
4
$
$
$
$
SLQLQGH[
ș
/S
/
H
GHWDLO;
Z 0
ES
PP
VFDOH
',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV
81,7
$
PD[
$
$
$
ES
F
'
(
H
+(
/
/S
4
Y
Z
\
PP
LQFKHV
=
ș
R
R
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG
Fig 8.
5()(5(1&(6
287/,1(
9(56,21
,(&
-('(&
627
(
06
-(,7$
(8523($1
352-(&7,21
,668('$7(
Package outline SOT163-1 (SO20)
74AHCT240_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
9 of 15
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP
'
627
(
$
;
F
+(
\
Y 0 $
=
4
$
SLQLQGH[
$
$
$
ș
/S
/
H
GHWDLO;
Z 0
ES
PP
VFDOH
',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV
81,7
$
PD[
$
$
$
ES
F
'
(
H
+(
/
/S
4
Y
Z
\
=
ș
PP
R
R
1RWHV
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
287/,1(
9(56,21
627
Fig 9.
5()(5(1&(6
,(&
-('(&
-(,7$
(8523($1
352-(&7,21
,668('$7(
02
Package outline SOT360-1 (TSSOP20)
74AHCT240_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
10 of 15
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
'+94)1SODVWLFGXDOLQOLQHFRPSDWLEOHWKHUPDOHQKDQFHGYHU\WKLQTXDGIODWSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP
%
'
627
$
$
$
(
F
GHWDLO;
WHUPLQDO
LQGH[DUHD
WHUPLQDO
LQGH[DUHD
H
&
H
E
Y
Z
& $ %
&
\ &
\
/
(K
H
;
'K
PP
VFDOH
'LPHQVLRQVPPDUHWKHRULJLQDOGLPHQVLRQV
8QLW
PP
$
$
E
PD[ QRP PLQ F
'
'K
(
(K
H
H
/
Y
Z
\
\
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
5HIHUHQFHV
2XWOLQH
YHUVLRQ
,(&
-('(&
-(,7$
627
02
VRWBSR
(XURSHDQ
SURMHFWLRQ
,VVXHGDWH
Fig 10. Package outline SOT764-1 (DHVQFN20)
74AHCT240_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
11 of 15
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
13. Abbreviations
Table 10.
Abbreviations
Acronym
Description
CDM
Charge Device Model
DUT
Device Under Test
ESD
ElectroStatic Discharge
MIL
Military
HBM
Human Body Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 11.
Revision history
Document ID
Release date
Data sheet status
Change notice Supersedes
74AHCT240_Q100 v.2
20160301
Product data sheet
-
Modifications:
74AHC_AHCT240_Q100 v.1
74AHCT240_Q100
Product data sheet
•
74AHC_AHCT240_Q100 v.1
Type numbers 74AHC240D-Q100, 74AHC240PW-Q100 and 74AHC240BQ-Q100
removed.
20131106
Product data sheet
-
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
-
© NXP Semiconductors N.V. 2016. All rights reserved.
12 of 15
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74AHCT240_Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
13 of 15
74AHCT240-Q100
NXP Semiconductors
Octal buffer/line driver; inverting; 3-state
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74AHCT240_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
14 of 15
NXP Semiconductors
74AHCT240-Q100
Octal buffer/line driver; inverting; 3-state
17. Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
11
12
13
14
15
15.1
15.2
15.3
15.4
16
17
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Contact information. . . . . . . . . . . . . . . . . . . . . 14
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2016.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 1 March 2016
Document identifier: 74AHCT240_Q100