Package Outline Drawing (POD)

Plastic Packages for Integrated Circuits
Package Outline Drawing
W4x4.16C
(WLCSP 0.5mm PITCH) WAFER LEVEL CHIP SCALE PACKAGE
Rev 1, 05/14
1.500
X
Y
2.160 ±0.030
0.500
D
C
16x 0.320 ±0.030
2.160 ±0.030
B
A
0.330
(4X)
1
PIN 1
(A1 CORNER)
0.10
2
4
3
0.330
0.250
TOP VIEW
BOTTOM VIEW
Z
SEATING PLANE
0.05 Z
PACKAGE
OUTLINE
0.280
0.330
0.500
0.320 ±0.030
Ø0.10 M Z X Y
Ø0.05 M Z
3
NSMD
0.240 ±0.030
RECOMMENDED LAND PATTERN
0.600 ±0.06mm
SIDE VIEW
NOTES:
1. All dimensions are in millimeters.
2. Dimension and tolerance per ASMEY 14.5M-1994,
and JESD 95-1 SPP-010.
3. NSMD refers to non-solder mask defined pad design per Intersil Techbrief TB451.
1