Package Outline Drawing (POD)

Plastic Packages for Integrated Circuits
Package Outline Drawing
W4x4.16
4X4 ARRAY 16 BALL WAFER LEVEL CHIP SCALE PACKAGE (WLCSP)
Rev 0, 6/10
X
1.965±0.02
Y
1.20
16X 0.270 ± 0.025
LOGO ID
4
3
1.20
1.815±0.02
PIN 1
2
0.40
1
0.10
D
(4X)
TOP VIEW
A
C
B
BOTTOM VIEW
0.305 ± 0.025
0.535 mm MAX
0.10 Z
0.27 ± 0.025
Z SEATING PLANE
Ø0.10 M Z X Y
Ø0.05 M Z
0.19 ± 0.015
0.05 Z
SIDE VIEW
0.275
PACKAGE
OUTLINE
NOTES:
1. All dimensions are in millimeters.
2. Dimension and tolerance per ASMEY 14.5M-1994,
and JESD 95-1 SPP-010.
3. NSMD refers to Non-solder Mask Defined pad design per
Intersil Tech Brief TB451 located at:
http://www.intersil.com/data/tb/tb451.pdf.
0.225
0.40
3
NSMD
TYPICAL RECOMMENDED LAND PATTERN
1