83B PDTC115EMB SO T8 NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ Rev. 1 — 1 June 2012 Product data sheet 1. Product profile 1.1 General description NPN Resistor-Equipped Transistor (RET) in a leadless ultra small DFN1006B-3 (SOT883B) Surface-Mounted Device (SMD) plastic package. PNP complement: PDTA115EMB. 1.2 Features and benefits 20 mA output current capability Simplifies circuit design Reduces component count AEC-Q101 qualified Built-in bias resistors Leadless ultra small SMD plastic package Reduces pick and place costs Low package height of 0.37 mm 1.3 Applications Low-current peripheral driver Control of IC inputs Replaces general-purpose transistors in digital applications Mobile applications 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VCEO collector-emitter voltage open base - - 50 V IO output current - - 20 mA R1 bias resistor 1 (input) 70 100 130 kΩ R2/R1 bias resistor ratio 0.8 1 1.2 Tamb = 25 °C PDTC115EMB NXP Semiconductors NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 I input (base) 2 G GND (emitter) Simplified outline Graphic symbol 1 3 3 3 O output (collector) R1 1 2 Transparent top view R2 2 SOT883B (DFN1006B-3) sym007 3. Ordering information Table 3. Ordering information Type number Package Name Description Version PDTC115EMB DFN1006B-3 Leadless ultra small plastic package; 3 solder lands; body 1.0 x 0.6 x 0.37 mm SOT883B 4. Marking Table 4. Marking codes Type number Marking code PDTC115EMB 0011 0001 PIN 1 INDICATION READING DIRECTION READING EXAMPLE: 0111 1011 MARKING CODE (EXAMPLE) READING DIRECTION 006aac673 Fig 1. DFN1006B-3 (SOT883B) binary marking code description PDTC115EMB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 2 of 11 PDTC115EMB NXP Semiconductors NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - 50 V VCEO collector-emitter voltage open base - 50 V VEBO emitter-base voltage open collector - 10 V VI input voltage positive - 40 V negative - -10 V - 20 mA IO output current ICM peak collector current pulsed; tp ≤ 1 ms Ptot total power dissipation Tamb ≤ 25 °C Tj - 100 mA - 250 mW junction temperature - 150 °C Tamb ambient temperature -65 150 °C Tstg storage temperature -65 150 °C [1] [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. 006aad009 300 Ptot (mW) 200 100 0 -75 -25 25 75 125 175 Tamb (°C) FR4 PCB, standard footprint Fig 2. Power derating curve for DFN1006B-3 (SOT883B) 6. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Rth(j-a) thermal resistance from junction to ambient in free air [1] [1] Min Typ Max Unit - - 500 K/W Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. PDTC115EMB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 3 of 11 PDTC115EMB NXP Semiconductors NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ 006aab603 103 duty cycle = 1 Zth(j-a) (K/W) 0.75 0.5 0.33 102 0.2 0.1 0.05 0.02 10 0.01 0 1 10−5 10−4 10−3 10−2 10−1 1 102 10 103 tp (s) FR4 PCB, standard footprint Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values 7. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit ICBO collector-base cut-off current VCB = 50 V; IE = 0 A; Tamb = 25 °C - - 100 nA ICEO collector-emitter cut-off VCE = 30 V; IB = 0 A; Tamb = 25 °C current VCE = 30 V; IB = 0 A; Tj = 150 °C - - 1 µA - - 5 µA IEBO emitter-base cut-off current VEB = 5 V; IC = 0 A; Tamb = 25 °C - - 50 µA hFE DC current gain VCE = 5 V; IC = 5 mA; Tamb = 25 °C 80 - - VCEsat collector-emitter saturation voltage IC = 5 mA; IB = 0.25 mA; Tamb = 25 °C - - 150 mV VI(off) off-state input voltage VCE = 5 V; IC = 100 µA; Tamb = 25 °C - 1.1 0.5 V VI(on) on-state input voltage VCE = 0.3 V; IC = 1 mA; Tamb = 25 °C 3 1.5 - V R1 bias resistor 1 (input) Tamb = 25 °C 70 100 130 kΩ R2/R1 bias resistor ratio 0.8 1 1.2 CC collector capacitance VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C - - 2.5 pF fT transition frequency VCE = 5 V; IC = 10 mA; f = 100 MHz; Tamb = 25 °C - 230 - MHz [1] [1] Characteristics of built-in transistor. PDTC115EMB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 4 of 11 PDTC115EMB NXP Semiconductors NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ 006aad081 103 (1) hFE 006aad082 10-1 VCEsat (V) (2) (1) (3) (2) (3) 102 10 10-1 1 10 10-2 10-1 1 IC (A) IC/IB = 20 VCE = 5 V Fig 4. 10 IC (mA) (1) Tamb = 100 °C (1) Tamb = 100 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = -40 °C (3) Tamb = -40 °C DC current gain as a function of collector current; typical values Fig 5. 006aad083 10 Collector-emitter saturation voltage as a function of collector current; typical values 006aad084 10 VI(on) (V) VI(off) (V) (1) (1) (2) (2) (3) 1 1 10-1 10-1 1 10 (3) 10-1 10-1 IC (mA) Fig 6. VCE = 5 V (1) Tamb = -40 °C (1) Tamb = -40 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = 100 °C (3) Tamb = 100 °C On-state input voltage as a function of collector current; typical values Product data sheet 10 IC (mA) VCE = 0.3 V PDTC115EMB 1 Fig 7. Off-state input voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 5 of 11 PDTC115EMB NXP Semiconductors NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ 006aad055 3 006aac757 103 Cc (pF) fT (MHz) 2 102 1 10 10-1 0 0 10 20 30 40 50 VCB (V) 102 10 IC (mA) f = 1 MHz; Tamb = 25 °C Fig 8. 1 VCE = 5 V; Tamb = 25 °C Collector capacitance as a function of collector-base voltage; typical values of built-in transistor Fig 9. Transition frequency as a function of collector current; typical values of built-in transistor 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. PDTC115EMB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 6 of 11 PDTC115EMB NXP Semiconductors NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ 9. Package outline 0.65 0.55 0.40 0.34 0.35 0.20 0.12 1 0.04 max 2 0.30 0.22 1.05 0.65 0.95 0.30 0.22 3 0.55 0.47 Dimensions in mm 11-11-02 Fig 10. Package outline SOT883B (DFN1006B-3) 10. Soldering Footprint information for reflow soldering SOT883B 1.3 0.7 R0.05 (8x) 0.9 0.6 0.7 0.25 (2x) 0.3 (2x) 0.3 0.4 (2x) 0.4 solder land solder land plus solder paste solder paste deposit solder resist occupied area Dimensions in mm sot883b_fr Fig 11. Reflow soldering footprint for SOT883B (DFN1006B-3) PDTC115EMB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 7 of 11 PDTC115EMB NXP Semiconductors NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ 11. Revision history Table 8. Revision history Document ID Release date Data sheet status Change notice Supersedes PDTC115EMB v.1 20120601 Product data sheet - - PDTC115EMB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 8 of 11 PDTC115EMB NXP Semiconductors NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ 12. Legal information 12.1 Data sheet status Document status[1] [2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URLhttp://www.nxp.com. 12.2 Definitions Preview — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 9 of 11 PDTC115EMB NXP Semiconductors NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published athttp://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante,Bitport,Bitsound,CoolFlux,CoReUse,DESFire,EZ-HV,FabKey,G reenChip,HiPerSmart,HITAG,I²C-bus logo,ICODE,I-CODE,ITEC,Labelution,MIFARE,MIFARE Plus,MIFARE Ultralight,MoReUse,QLPAK,Silicon Tuner,SiliconMAX,SmartXA,STARplug,TOPFET,TrenchMOS,TriMedia andUCODE — are trademarks of NXP B.V. HD Radio andHD Radio logo — are trademarks of iBiquity Digital Corporation. 13. Contact information For more information, please visit:http://www.nxp.com For sales office addresses, please send an email to:[email protected] PDTC115EMB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 10 of 11 PDTC115EMB NXP Semiconductors NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ 14. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 9 10 11 12 12.1 12.2 12.3 12.4 13 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Test information . . . . . . . . . . . . . . . . . . . . . . . . . .6 Quality information . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .7 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . .8 Legal information. . . . . . . . . . . . . . . . . . . . . . . . .9 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . .9 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Contact information. . . . . . . . . . . . . . . . . . . . . .10 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 1 June 2012 Document identifier: PDTC115EMB