SQ1912AEEH www.vishay.com Vishay Siliconix Automotive Dual N-Channel 20 V (D-S) 175 °C MOSFET FEATURES PRODUCT SUMMARY VDS (V) • TrenchFET® power MOSFET 20 • AEC-Q101 qualified RDS(on) (Ω) at VGS = 4.5 V 0.280 RDS(on) (Ω) at VGS = 2.5 V 0.360 • 100 % Rg tested RDS(on) (Ω) at VGS = 1.8 V 0.450 • Typical ESD protection: 800 V ID (A) • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 0.8 Configuration Dual SOT-363 SC-70 Dual (6 leads) D1 6 G2 5 D1 D2 S2 4 3k 3k G1 1 S1 Top View 2 G1 G2 3 D2 S1 Marking Code: 8R S2 ORDERING INFORMATION Package SC-70 Lead (Pb)-free and Halogen-free SQ1912AEEH-T1-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER Drain-Source Voltage SYMBOL VDS LIMIT 20 Gate-Source Voltage VGS ± 12 Continuous Drain Current a TC = 25 °C ID TC = 125 °C Continuous Source Current (Diode Conduction) a IS Pulsed Drain Current b Maximum Power Dissipation b IDM TC = 25 °C PD TC = 125 °C Operating Junction and Storage Temperature Range TJ, Tstg UNIT V 0.8 0.8 0.8 A 3 1.5 0.5 W -55 to +175 °C SYMBOL LIMIT UNIT RthJA 220 RthJF 100 THERMAL RESISTANCE RATINGS PARAMETER Junction-to-Ambient Junction-to-Foot (Drain) PCB Mount c °C/W Notes a. Package limited. b. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %. c. When mounted on 1" square PCB (FR4 material). S15-1251 Rev. A, 01-Jun-15 Document Number: 62983 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ1912AEEH www.vishay.com Vishay Siliconix SPECIFICATIONS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current On-State Drain Current a Drain-Source On-State Resistance a Forward Transconductance b VDS VGS = 0, ID = 250 μA 20 - - VGS(th) VDS = VGS, ID = 250 μA 0.45 0.6 1.5 IGSS IDSS ID(on) RDS(on) gfs V VDS = 0 V, VGS = ± 4.5 V - - ±1 μA VDS = 0 V, VGS = ± 12 V - - ± 10 mA 1 VGS = 0 V VDS = 20 V - - VGS = 0 V VDS = 20 V, TJ = 125 °C - - 50 VGS = 0 V VDS = 20 V, TJ = 175 °C - - 150 VGS = 4.5 V VDS ≥ 5 V 1.5 - - VGS = 4.5 V ID = 1.2 A - 0.200 0.280 VGS = 4.5 V ID = 1.2 A, TJ = 125 °C - - 0.423 VGS = 4.5 V ID = 1.2 A, TJ = 175°C - - 0.510 VGS = 2.5 V ID = 1 A - 0.261 0.360 VGS = 1.8 V ID = 0.2 A - 0.320 0.450 - 2.6 - - 27 - - 19 - - 7 - - 1 1.25 - 0.14 - - 0.27 - 1.5 3 4.5 - 66 82 VDS = 10 V, ID = 1.2 A μA A Ω S Dynamic b Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge c Qg Gate-Source Charge c Qgs Gate-Drain Charge c Qgd Gate Resistance d Turn-On Delay Time c Rise Time c Turn-Off Delay Time c Fall Time c Rg VGS = 0 V VDS = 10 V, f = 1 MHz VGS = 4.5 V VDS = 10 V, ID = 1.2 A f = 1 MHz td(on) tr td(off) VDD = 10 V, RL = 20 Ω ID ≅ 0.5 A, VGEN = 4.5 V, Rg = 1 Ω tf - 108 135 - 715 893 - 390 487 pF nC kΩ ns Source-Drain Diode Ratings and Characteristics b Pulsed Current a ISM Forward Voltage VSD IF = 0.5 A, VGS = 0 - - 3 A - 0.8 1.2 V Notes a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing. c. Independent of operating temperature. d. Gate is obscured by ESD network series resistance and cannot be tested directly. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S15-1251 Rev. A, 01-Jun-15 Document Number: 62983 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ1912AEEH www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 0.005 100 TJ = 25 °C 10-2 IGSS - Gate Current (μA) IGSS - Gate Current (mA) 0.004 0.003 0.002 10-4 TJ = 150 °C 10-6 TJ = 25 °C 10-8 0.001 10-10 0 0.000 0 5 10 15 20 VGS - Gate-to-Source Voltage (V) 25 4 Gate Current vs. Gate-Source Voltage 8 12 16 VGS - Gate-to-Source Voltage(V) 20 Gate Current vs. Gate-Source Voltage 2.0 2.0 VGS = 5 V thru 2 V 1.6 VGS = 1.5 V ID - Drain Current (A) ID - Drain Current (A) 1.6 1.2 0.8 0.4 1.2 TC = 25 °C 0.8 0.4 VGS = 1 V TC = 125 °C 0.0 TC = - 55 °C 0.0 0.0 0.2 0.4 0.6 0.8 1.0 VDS - Drain-to-Source Voltage (V) 0.0 0.5 1.0 1.5 2.0 VGS - Gate-to-Source Voltage (V) Output Characteristics Transfer Characteristics 5 2.5 0.5 TC = - 55 °C RDS(on) - On-Resistance (Ω) gfs - Transconductance (S) 4 TC = 25 °C 3 TC = 125 °C 2 0.4 0.3 VGS = 1.8 V 0.2 VGS = 4.5 V VGS = 2.5 V 0.1 1 0.0 0 0.0 0.2 0.4 0.6 0.8 1.0 0.0 0.4 0.8 1.2 1.6 ID - Drain Current (A) ID - Drain Current (A) Transconductance On-Resistance vs. Drain Current S15-1251 Rev. A, 01-Jun-15 2.0 Document Number: 62983 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ1912AEEH www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 5 VGS - Gate-to-Source Voltage (V) 80 C - Capacitance (pF) 60 40 Ciss 20 Coss ID = 1.2 A 4 3 2 1 Crss 0 0 0 5 10 15 VDS - Drain-to-Source Voltage (V) 20 0.0 0.2 0.4 Capacitance 1.0 10 ID = 1.2 A 1.7 IS - Source Current (A) VGS = 2.5 V 1.4 VGS = 4.5 V 1.1 1 TJ = 150 °C 0.1 TJ = 25 °C 0.01 0.8 0.5 - 50 - 25 0.001 0 25 50 75 100 125 150 175 0.0 0.2 0.4 0.6 0.8 1.0 TJ - Junction Temperature (°C) VSD - Source-to-Drain Voltage (V) On-Resistance vs. Junction Temperature Source Drain Diode Forward Voltage 1.0 0.5 0.8 0.3 VGS(th) Variance (V) RDS(on) - On-Resistance (Normalized) 0.8 Gate Charge 2.0 RDS(on) - On-Resistance (Ω) 0.6 Qg - Total Gate Charge (nC) 0.6 0.4 TJ = 150 °C 0.1 1.2 ID = 5 mA - 0.1 ID = 250 μA - 0.3 0.2 TJ = 25 °C 0.0 0 1 2 3 4 VGS - Gate-to-Source Voltage (V) On-Resistance vs. Gate-to-Source Voltage S15-1251 Rev. A, 01-Jun-15 5 - 0.5 - 50 - 25 0 25 50 75 100 125 150 175 TJ - Temperature (°C) Threshold Voltage Document Number: 62983 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ1912AEEH www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) 30 VDS - Drain-to-Source Voltage (V) ID = 1 mA 28 26 24 22 20 - 50 - 25 0 25 50 75 100 125 150 175 TJ - Junction Temperature (°C) Drain Source Breakdown vs. Junction Temperature 100 IDM Limited ID - Drain Current (A) 10 Limited by RDS(on)* 1 10 ms 100 ms 1 s, 10 s, DC 0.1 BVDSS Limited TC = 25 °C Single Pulse 0.01 0.01 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Safe Operating Area S15-1251 Rev. A, 01-Jun-15 Document Number: 62983 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ1912AEEH www.vishay.com Vishay Siliconix THERMAL RATINGS (TA = 25 °C, unless otherwise noted) 2 Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 Notes: 0.1 P DM 0.1 0.05 t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = R thJA = 220 °C/W 0.02 3. T JM - TA = PDMZthJA(t) Single Pulse 0.01 10 -4 4. Surface Mounted 10 -3 10 -2 10 -1 1 Square Wave Pulse Duration (s) 10 100 600 Normalized Thermal Transient Impedance, Junction-to-Ambient Normalized Effective Transient Thermal Impedance 2 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10-4 10-3 10-2 10-1 Square Wave Pulse Duration (s) 1 10 Normalized Thermal Transient Impedance, Junction-to-Foot Note • The characteristics shown in the two graphs - Normalized Transient Thermal Impedance Junction-to-Ambient (25 °C) - Normalized Transient Thermal Impedance Junction-to-Foot (25 °C) are given for general guidelines only to enable the user to get a “ball park” indication of part capabilities. The data are extracted from single pulse transient thermal impedance characteristics which are developed from empirical measurements. The latter is valid for the part mounted on printed circuit board - FR4, size 1" x 1" x 0.062", double sided with 2 oz. copper, 100 % on both sides. The part capabilities can widely vary depending on actual application parameters and operating conditions. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?62983. S15-1251 Rev. A, 01-Jun-15 Document Number: 62983 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Ordering Information www.vishay.com Vishay Siliconix SC-70 Ordering codes for the SQ rugged series power MOSFETs in the SC-70 package: OLD ORDERING CODE a NEW ORDERING CODE SQ1421EDH - SQ1421EDH-T1_GE3 SQ1431EH SQ1431EH-T1-GE3 SQ1431EH-T1_GE3 SQ1440EH - SQ1440EH-T1_GE3 SQ1470AEH - SQ1470AEH-T1_GE3 SQ1539EH - SQ1539EH-T1_GE3 SQ1563AEH - SQ1563AEH-T1_GE3 DATASHEET PART NUMBER SQ1902AEL - SQ1902AEL-T1_GE3 SQ1912AEEH - SQ1912AEEH-T1_GE3 Note a. Old ordering code is obsolete and no longer valid for new orders Revision: 11-Nov-15 Document Number: 65839 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix SCĆ70: 6ĆLEADS MILLIMETERS 6 5 Dim A A1 A2 b c D E E1 e e1 L 4 E1 E 1 2 3 -B- e b e1 D -Ac A2 A L A1 Document Number: 71154 06-Jul-01 INCHES Min Nom Max Min Nom Max 0.90 – 1.10 0.035 – 0.043 – – 0.10 – – 0.004 0.80 – 1.00 0.031 – 0.039 0.15 – 0.30 0.006 – 0.012 0.10 – 0.25 0.004 – 0.010 1.80 2.00 2.20 0.071 0.079 0.087 1.80 2.10 2.40 0.071 0.083 0.094 1.15 1.25 1.35 0.045 0.049 0.053 0.65BSC 0.026BSC 1.20 1.30 1.40 0.047 0.051 0.055 0.10 0.20 0.30 0.004 0.008 0.012 7_Nom 7_Nom ECN: S-03946—Rev. B, 09-Jul-01 DWG: 5550 www.vishay.com 1 AN816 Vishay Siliconix Dual-Channel LITTLE FOOTR 6-Pin SC-70 MOSFET Copper Leadframe Version Recommended Pad Pattern and Thermal Performance INTRODUCTION 87 (mil) 26 (mil) The new dual 6-pin SC-70 package with a copper leadframe enables improved on-resistance values and enhanced thermal performance as compared to the existing 3-pin and 6-pin packages with Alloy 42 leadframes. These devices are intended for small to medium load applications where a miniaturized package is required. Devices in this package come in a range of on-resistance values, in n-channel and p-channel versions. This technical note discusses pin-outs, package outlines, pad patterns, evaluation board layout, and thermal performance for the dual-channel version. 6 5 96 (mil) 71 (mil) 48 (mil) 23 (mil) 61 (mil) 1 PIN-OUT 4 2 3 0.0 (mil) Figure 1 shows the pin-out description and Pin 1 identification for the dual-channel SC-70 device in the 6-pin configuration. Both n-and p-channel devices are available in this package – the drawing example below illustrates the p-channel device. 26 (mil) 16 (mil) FIGURE 2. SOT-363 SC-70 (6-LEADS) S1 1 6 D1 G1 2 5 G2 D2 3 4 S2 Top View FIGURE 1. For package dimensions see outline drawing SC-70 (6-Leads) (http://www.vishay.com/doc?71154) BASIC PAD PATTERNS See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/doc?72286) for the SC-70 6-pin basic pad layout and dimensions. This pad pattern is sufficient for the low-power applications for which this package is intended. Increasing the drain pad pattern (Figure 2) yields a reduction in thermal resistance and is a preferred footprint. Document Number: 71405 12-Dec-03 8 (mil) SC-70 (6 leads) Dual EVALUATION BOARD FOR THE DUALCHANNEL SC70-6 The 6-pin SC-70 evaluation board (EVB) shown in Figure 3 measures 0.6 in. by 0.5 in. The copper pad traces are the same as described in the previous section, Basic Pad Patterns. The board allows for examination from the outer pins to the 6-pin DIP connections, permitting test sockets to be used in evaluation testing. The thermal performance of the dual 6-pin SC-70 has been measured on the EVB, comparing both the copper and Alloy 42 leadframes. This test was then repeated using the 1-inch2 PCB with dual-side copper coating. A helpful way of displaying the thermal performance of the 6-pin SC-70 dual copper leadframe is to compare it to the traditional Alloy 42 version. www.vishay.com 1 AN816 Vishay Siliconix Front of Board SC70-6 Back of Board SC70-6 S1 D1 G1 G2 D2 S2 vishay.com SC70−6 DUAL FIGURE 3. THERMAL PERFORMANCE Junction-to-Foot Thermal Resistance (the Package Performance) COOPER LEADFRAME Room Ambient 25 _C Thermal performance for the dual SC-70 6-pin package is measured as junction-to-foot thermal resistance, in which the “foot” is the drain lead of the device as it connects with the body. The junction-to-foot thermal resistance for this device is typically 80_C/W, with a maximum thermal resistance of approximately 100_C/W. This data compares favorably with another compact, dual-channel package – the dual TSOP-6 – which features a typical thermal resistance of 75_C/W and a maximum of 90_C/W. PD + Elevated Ambient 60 _C T J(max) * T A Rq JA PD + T J(max) * T A Rq JA o o P D + 150 Co* 25 C 224 CńW o o P D + 150 Co* 60 C 224 CńW P D + 558 mW P D + 402 mW Although they are intended for low-power applications, devices in the 6-pin SC-70 dual-channel configuration will handle power dissipation in excess of 0.5 W. TESTING Power Dissipation The typical RθJA for the dual-channel 6-pin SC-70 with a copper leadframe is 224_C/W steady-state, compared to 413_C/W for the Alloy 42 version. All figures are based on the 1-inch2 FR4 test board. The following example shows how the thermal resistance impacts power dissipation for the dual 6-pin SC-70 package at varying ambient temperatures. To further aid the comparison of copper and Alloy 42 leadframes, Figures 4 and 5 illustrate the dual-channel 6-pin SC-70 thermal performance on two different board sizes and pad patterns. The measured steady-state values of RθJA for the dual 6-pin SC-70 with varying leadframes are as follows: LITTLE FOOT 6-PIN SC-70 1) Minimum recommended pad pattern on the EVB board (see Figure 3). Alloy 42 Leadframe 1-inch2 2) Industry standard PCB with maximum copper both sides. ALLOY 42 LEADFRAME Room Ambient 25 _C PD + T J(max) * T A PD + T J(max) * T A Rq JA o o P D + 150 Co* 25 C 413 CńW o o P D + 150 Co* 60 C 413 CńW P D + 303 mW P D + 218 mW www.vishay.com 2 Rq JA Elevated Ambient 60 _C Alloy 42 Copper 518_C/W 344_C/W 413_C/W 224_C/W The results indicate that designers can reduce thermal resistance (θJA) by 34% simply by using the copper leadframe device as opposed to the Alloy 42 version. In this example, a 174_C/W reduction was achieved without an increase in board area. If an increase in board size is feasible, a further 120_C/W reduction can be obtained by utilizing a 1-inch2. PCB area. The Dual copper leadframe versions have the following suffix: Dual: Compl.: Si19xxEDH Si15xxEDH Document Number: 71405 12-Dec-03 AN816 500 500 400 400 Thermal Resistance (C/W) Thermal Resistance (C/W) Vishay Siliconix 300 Alloy 42 200 Copper 100 300 Alloy 42 200 100 Copper 0 0 10-5 10-4 10-3 10-2 10-1 1 10 100 1000 10-5 Dual SC70-6 Thermal Performance on EVB Document Number: 71405 12-Dec-03 10-3 10-2 10-1 1 10 100 1000 Time (Secs) Time (Secs) FIGURE 4. 10-4 FIGURE 5. Dual SC70-6 Comparison on 1-inch2 PCB www.vishay.com 3 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SC-70: 6-Lead 0.067 0.026 (0.648) 0.045 (1.143) 0.096 (2.438) (1.702) 0.016 0.026 0.010 (0.406) (0.648) (0.241) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.com 18 Document Number: 72602 Revision: 21-Jan-08 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Material Category Policy Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000