PCA9618
Single channel Fm+ I2C-bus repeater
Rev. 1 — 13 January 2016
Product data sheet
1. General description
The PCA9618 is a CMOS integrated circuit that provides Fast-mode Plus (Fm+) I2C-bus
or SMBus buffering of either the SCL or SDA line or can be used in any single bit
applications that require buffering. While retaining all the operating modes and features of
the I2C-bus system, it also permits extension of the I2C-bus by providing bidirectional
buffering, thus enabling buses of 540 pF at 1 MHz or up to 4000 pF at lower speeds.
Using the PCA9618 enables the system designer to isolate two halves of a bus for
capacitance. The DATAA and DATAB pins are overvoltage tolerant and are
high-impedance when the PCA9618 is unpowered.
The PCA9618 can be used to delay the SDA path by at least the minimum propagation
delay, thereby providing an effective data hold time for applications that require an SDA
hold time with respect to SCL. The PCA9618 includes an internal glitch filter, so that it will
ignore glitches rather than expand them, this also means that the minimum propagation
delay is on the order of 46 ns and is reasonably stable over temperature and supply
voltage. Although this is not sufficient to provide the SDA delay requirement of the SMBus
hold time specification of 300 ns, many parts that cannot be used with the 0 ns hold time
of the I2C-bus specification only require a few ns of hold time to work correctly in a
system. For these applications, the PCA9618 is an effective solution.
The PCA9618 can also be used as a buffer on a 1-wire bus similar to how the PCA9617A
is used for the I2C-bus or to buffer the master (microcontroller’s I/O) if the master’s output
is not strong enough to drive the 1-wire bus.
The 2.2 V to 5.5 V bus port B driver has the static level offset, while the port A driver
eliminates the static offset voltage. This results in a LOW on the port B translating into a
nearly 0 V LOW on the port A. This static offset voltage prevents the PCA9618 from
latching into a steady state LOW when driven LOW.
The static offset design of the port B PCA9618 I/O driver prevents it from being connected
to the static or incremented offset sides of other bus buffers. Port A of two or more
PCA9618s can be connected together, also, to allow a star topography with port A on the
common bus. Port A can be connected directly to any other buffer with static or
incremented offset outputs. Multiple PCA9618s can be connected in series, port A to
port B, with no build-up in offset voltage with only time of flight delays to consider.
The output pull-down on the port B internal buffer LOW is set for approximately 0.55 V,
while the input threshold of the internal buffer is set about 90 mV lower (0.45 V). When the
port B I/O is driven LOW internally, the LOW is not recognized as a LOW by the input.
This prevents a latching condition from occurring. The output pull-down on port A drives a
hard LOW and the input level is set at 0.35VCC.
PCA9618
NXP Semiconductors
Single channel Fm+ I2C-bus repeater
2. Features and benefits
1 channel, bidirectional buffer isolates capacitance and allows 540 pF on either side of
the device at 1 MHz and up to 4000 pF at lower speeds
Operating supply voltage range of 2.2 V to 5.5 V
Data pins are 5 V tolerant, allowing voltage translation applications
0 Hz to 1000 kHz clock frequency (the maximum system operating frequency may be
less than 1000 kHz because of the delays added by the repeater)
Open-drain input/outputs
Latching free operation
Accommodates Standard-mode, Fast-mode and Fast-mode Plus I2C-bus devices,
SMBus (standard and high power mode), PMBus and multiple masters
Powered-off high-impedance I2C-bus pins
ESD protection exceeds 5500 V HBM per JESD22-A114 and 1000 V CDM per
JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Packages offered: WLCSP4
3. Ordering information
Table 1.
Ordering information
Type number
Topside
marking
Package
Name
Description
Version
PCA9618UK
•8[1]
WLCSP4
wafer level chip-scale package; 4 bumps;
body 0.78 0.83 0.53 mm
PCA9618UK
[1]
Line A marking includes dot as pin 1 indication.
3.1 Ordering options
Table 2.
Ordering options
Type number
Orderable
part number
Package
Packing method
Minimum
order
quantity
Temperature range
PCA9618UK
PCA9618UKZ
WLCSP4
Reel 13” Q1/T1
*Special mark chips dry pack
10000
Tamb = 40 C to +85 C
PCA9618
Product data sheet
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Rev. 1 — 13 January 2016
© NXP B.V. 2016. All rights reserved.
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PCA9618
NXP Semiconductors
Single channel Fm+ I2C-bus repeater
4. Functional diagram
VCC
PCA9618
DATAA
DATAB
aaa-012020
GND
Fig 1.
Functional diagram
5. Pinning information
5.1 Pinning
ball A1
index area
PCA9618UK
DATAB
A1
A2
DATAA
GND
B1
B2
VCC
aaa-012021
Transparent top view
Fig 2.
Pin configuration for WLCSP4
5.2 Pin description
Table 3.
Symbol
Pin description
Pin
Description
WLCSP4
PCA9618
Product data sheet
DATAA
A2
data line, A port with normal voltage levels
n.c.
-
not connected
VCC
B2
port B supply voltage (2.2 V to 5.5 V)
GND
B1
supply ground (0 V)
DATAB
A1
data line, B port with offset voltage levels
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© NXP B.V. 2016. All rights reserved.
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PCA9618
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Single channel Fm+ I2C-bus repeater
6. Functional description
Refer to Figure 1 “Functional diagram”.
All inputs and I/Os are overvoltage tolerant to 5.5 V even when the device is unpowered
(VCC = 0 V). The PCA9618 includes a power-up circuit that keeps the output drivers
turned off until VCC is above 2.2 V and until after the internal reference circuits have
settled ~400 s. A LOW level on port A (below 0.3VCC) turns on the port B driver and
drives port B down to about 0.55 V. When port A rises above 0.3VCC, the port B pull-down
driver is turned off and the external pull-up resistor pulls the pin HIGH. When port B falls
first and goes below 0.4 V, the port A driver is turned on and port A pulls down to ~0 V.
The port A pull-down is not enabled unless the port B voltage goes below 0.4 V. If the
port B low voltage goes below 0.4 V, the port B pull-down driver is enabled and port B will
only be able to rise to 0.55 V until port A rises above 0.3VCC, then port B will continue to
rise being pulled up by the external pull-up resistor. The VCC supply is used to provide the
0.35VCC reference to the port A input comparators and for the power good detect circuit.
6.1 I2C-bus systems
As with the standard I2C-bus system, pull-up resistors are required to provide the logic
HIGH levels on the buffered bus (standard open-collector configuration of the I2C-bus).
The size of these pull-up resistors depends on the system, but each side of the repeater
must have a pull-up resistor. This part designed to work with Standard mode, Fast-mode
and Fast-mode Plus I2C-bus devices in addition to SMBus devices. Standard mode and
Fast-mode I2C-bus devices only specify 3 mA output drive; this limits the termination
current to 3 mA in a generic I2C-bus system where Standard-mode devices, Fast-mode
devices and multiple masters are possible. When only Fast-mode Plus devices are used
with 30 mA at 5 V drive strength, then lower value pull-up resistors can be used. The
B-side RC should not be less than 67.5 ns because shorter RCs increase the turnaround
bounce when the B-side transitions from being externally driven to pulled down by its
offset buffer.
Please see Application Note AN255, “I2C/SMBus Repeaters, Hubs and Expanders” for
additional information on sizing resistors and precautions when using more than one
PCA9618 in a system or using the PCA9618 in conjunction with other bus buffers.
PCA9618
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 January 2016
© NXP B.V. 2016. All rights reserved.
4 of 22
PCA9618
NXP Semiconductors
Single channel Fm+ I2C-bus repeater
7. Application design-in information
A typical application is shown in Figure 3. In this example, the system master and slave
are running on a 3.3 V I2C-bus. Both buses run at 1000 kHz. Master devices can be
placed on either bus.
VCC
1.4 kΩ
1.4 kΩ
VCC
DATAB
SDA
DATAA
SDA
SCL
SCL
PCA9618
BUS
MASTER
1000 kHz
SLAVE
1000 kHz
bus B
Fig 3.
bus A
aaa-012022
Typical application
When port A of the PCA9618 is pulled LOW by a driver on the I2C-bus, a comparator
detects the falling edge when it goes below 0.3VCC and causes the internal driver on
port B to turn on, causing port B to pull down to about 0.5 V. When port B of the PCA9618
falls, first comparator detects the falling edge when it goes below 0.4 V and causes the
internal driver on port A to turn on and pull the port A pin down to ground. In order to
illustrate what would be seen in a typical application, refer to Figure 7 and Figure 8. If the
bus master in Figure 3 were to write to the slave through the PCA9618, waveforms shown
in Figure 7 would be observed on the A bus. This looks like a normal I2C-bus transmission
except that the turn on and turn off of the acknowledge signals are slightly delayed.
On the B bus side of the PCA9618, the data line would have a positive offset from ground
equal to the VOL of the PCA9618. After the eighth clock pulse, the data line will be pulled
to the VOL of the slave device which is very close to ground in this example. At the end of
the acknowledge, the level rises only to the LOW level set by the driver in the PCA9618
for a short delay while the A bus side rises above 0.3VCC then it continues HIGH. It is
important to note that any arbitration or clock stretching events require that the LOW level
on the B bus side at the input of the PCA9618 (VIL) be at or below 0.4 V to be recognized
by the PCA9618 and then transmitted to the A bus side.
Multiple PCA9618 port A sides can be connected in a star configuration (Figure 4),
allowing all nodes to communicate with each other.
Multiple PCA9618s can be connected in series (Figure 5) as long as port A is connected
to port B. I2C-bus slave devices can be connected to any of the bus segments. The
number of devices that can be connected in series is limited by repeater
delay/time-of-flight considerations on the maximum bus speed requirements.
PCA9618
Product data sheet
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Rev. 1 — 13 January 2016
© NXP B.V. 2016. All rights reserved.
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PCA9618
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Single channel Fm+ I2C-bus repeater
VCC
1.4 kΩ
1.4 kΩ
1.4 kΩ
VCC
DATAA
SDA
SCL
DATAB
SDA
SCL
PCA9618
SLAVE
1000 kHz
BUS
MASTER
1.4 kΩ
VCC
DATAA
DATAB
SDA
SCL
PCA9618
SLAVE
1000 kHz
1.4 kΩ
VCC
DATAA
DATAB
SDA
SCL
PCA9618
SLAVE
1000 kHz
aaa-012023
Fig 4.
Typical star application
The PCA9618 provides two basic functions. It provides buffering and it provides a delay
that can be used to delay the SDA in order to create an artificial hold time bridge the gap
between the 0 ns I2C-bus hold time on SCL falling edge and the SMBus 300 ns hold time
specification for SMBus slaves that are clocked on the SCL falling edge and not sampled.
VCC
1.4 kΩ
SDA
SCL
1.4 kΩ
1.4 kΩ
DATAA
DATAB
PCA9618
1.4 kΩ
DATAA
DATAB
1.4 kΩ
DATAA
PCA9618
BUS
MASTER
DATAB
PCA9618
SDA
SCL
SLAVE
1000 kHz
aaa-012024
Decoupling capacitors not shown for simplicity, but they are required. It is especially important that the decoupling for the
PCA9618 VCC be close to the VCC pin.
Fig 5.
Typical series application
PCA9618
Product data sheet
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PCA9618
NXP Semiconductors
Single channel Fm+ I2C-bus repeater
CARD 1
VCC
CARD 2
RPU
RPU
10 kΩ
VCC
75 Ω
DATAA
75 Ω
DATAB
GND
SDA
SCL
MASTER
OR SLAVE
aaa-010655
Decoupling capacitors not shown for simplicity, but they are required. It is especially important that
the decoupling for the PCA9618 VCC be close to the VCC pin.
Fig 6.
Typical application of PCA9618 driving a short cable
9th clock pulse
acknowledge
SCL
SDA
002aac775
Fig 7.
Bus A (2.2 V to 5.5 V bus) waveform
9th clock pulse
acknowledge
SCL
SDA
VOL of PCA9618
aaa-012025
VOL of slave
Fig 8.
PCA9618
Product data sheet
Bus B (2.2 V to 5.5 V) waveform
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Single channel Fm+ I2C-bus repeater
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VCC
supply voltage
VI/O
voltage on an input/output pin
port A and port B
II/O
input/output current
II
input current
Ptot
total power dissipation
-
100
mW
Tstg
storage temperature
55
+125
C
Tamb
ambient temperature
40
+85
C
Tj
junction temperature
-
+125
C
PCA9618
Product data sheet
Conditions
Min
Max
Unit
0.5
+7
V
0.5
+7
V
port A; port B
-
50
mA
VCC, GND
-
50
mA
operating in free air
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PCA9618
NXP Semiconductors
Single channel Fm+ I2C-bus repeater
9. Static characteristics
Table 5.
Static characteristics
VCC = 2.2 V to 5.5 V; GND = 0 V; Tamb = 40 C to +85 C; unless otherwise specified.
Typical values measured with VCC = 2.5 V at 25 C, unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
2.2
-
5.5
V
Supplies
VCC
supply voltage
ICCH
HIGH-level supply current
VCC = 5.5 V; DATAn = VCC
-
1.5
2.5
mA
ICCL
LOW-level supply current
VCC = 5.5 V; one DATAn = GND;
other DATAn with pull-up resistors
-
1.7
2.9
mA
0.7VCC
-
5.5
V
Input and output DATAB
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
0.5
-
+0.4
V
VIK
input clamping voltage
II = 18 mA
1.2
-
0.3
V
ILI
input leakage current
VI = 5.5 V
-
-
1
A
IOL
LOW-level output current
VO = 0.2 V
LOW-level output voltage
VOL
10
-
+120
A
IOL = 150 A at VCC = 2.2 V
[1]
0.47
-
-
V
IOL = 13 mA at VCC = 2.2 V
[2]
-
0.54
0.61
V
VOLVIL
difference between
LOW-level output and
LOW-level input voltage
VOL at IOL = 1 mA;
guaranteed by design
60
90
160
mV
Cio
input/output capacitance
VI = 3 V or 0 V; VCC = 3.3 V
-
7
10
pF
VI = 3 V or 0 V; VCC = 0 V
-
7
10
pF
Input and output DATAA
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
0.7VCC
-
5.5
V
0.5
-
+0.25VCC
V
VIK
input clamping voltage
II = 18 mA
1.2
-
0.3
V
ILI
input leakage current
VI = 5.5 V
-
-
1
A
[3]
IIL
LOW-level input current
VI = 0.2 V
-
-
10
A
VOL
LOW-level output voltage
IOL = 13 mA; VCC = 2.2 V
-
0.1
0.2
V
Cio
input/output capacitance
VI = 3 V or 0 V; VCC = 3.3 V
-
7
10
pF
VI = 3 V or 0 V; VCC = 0 V
-
7
10
pF
[1]
Pull-up should result in IOL 150 A.
[2]
Guaranteed by design and characterization.
[3]
VIL for port A with envelope noise must be below 0.3VCC for stable performance.
[4]
Power supply decoupling capacitors need to be present for VCC and the 0.1 F decoupling for VCC needs to be located near the VCC pin.
PCA9618
Product data sheet
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PCA9618
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Single channel Fm+ I2C-bus repeater
aaa-010661
0.70
port A VOL
(V)
0.65
VCC = 2.2 V (Nom = 25 °C)
2.2 V (Hot = 85 °C)
0.3
VCC = 2.2 V (Nom = 25 °C)
2.2 V (Hot = 85 °C)
3.0 V (Hot = 85 °C)
0.60
0.2
0.55
0.1
0.50
0
0
Fig 9.
aaa-010662
0.4
port B VOL
(V)
10
20
30
port B IOL (mA)
0
Port B VOL versus IOL
10
20
30
port A IOL (mA)
Fig 10. Port A VOL versus IOL
002aag897
110
Port B
tPHL (ns)
100
maximum
typical
minimum
90
80
70
50
100
150
200
CL at constant RC (pF)
RC = 67.5 ns, VCC = 2.5 V, and Tamb = 25 C.
Fig 11. Nominal port B tPHL with load capacitance at constant RC
PCA9618
Product data sheet
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Single channel Fm+ I2C-bus repeater
10. Dynamic characteristics
Table 6.
Dynamic characteristics
VCC = 2.2 V to 5.5 V; GND = 0 V; Tamb = 40 C to +85 C; unless otherwise specified.[1][2]
Symbol
Parameter
Conditions
tPLH
LOW to HIGH propagation delay
port B to port A; Figure 14
tPLH2
LOW to HIGH propagation delay 2
port B to port A; Figure 14
tPHL
HIGH to LOW propagation delay
port B to port A; Figure 12
Typ[3]
Min
[4]
[5]
Max
Unit
-42
65
103
ns
67
94
130
ns
46
76
152
ns
-
60
-
ns
tTLH
LOW to HIGH output transition time
port A; Figure 12
SRf
falling slew rate
port A; 0.7VCC to 0.3VCC
0.022
0.037
0.11
V/ns
tPLH
LOW to HIGH propagation delay
port A to port B; Figure 13
[6]
40
60
102
ns
port A to port B; Figure 13
[6]
63
80
173
ns
[5]
-
60
-
ns
0.029
0.056
0.09
V/ns
HIGH to LOW propagation delay
tPHL
tTLH
LOW to HIGH output transition time
port B; Figure 13
SRf
falling slew rate
port B; 0.7VCC to 0.3 VCC
[1]
Times are specified with loads of 1.35 k pull-up resistance and 50 pF load capacitance on port A and port B, and a falling edge slew
rate of 0.05 V/ns input signals.
[2]
Pull-up voltages are VCC on port A and VCC on port B.
[3]
Typical values were measured with VCC = 2.5 V at Tamb = 25 C, unless otherwise noted.
[4]
The tPLH2 delay data from port B to port A is measured at 0.45 V on port B to 0.5VCC on port A.
[5]
The tTLH of the bus is determined by the pull-up resistance (1.35 k) and the total capacitance (50 pF).
[6]
The proportional delay data from port A to port B is measured at 0.5VCC on port A to 0.5VCC on port B.
10.1 AC waveforms
VCC
0.5VCC
0.5VCC
tPHL
tPLH
input
output
70 %
30 %
0.5VCC
0.5VCC
tTHL
VCC
input
VOL
0.5VCC
0.5VCC
tPLH
tPHL
VCC
70 %
30 %
VCC
output
70 %
30 %
VOL
tTLH
0.5VCC
tTHL
aaa-010657
0.5VCC
70 %
30 %
tTLH
aaa-010658
Fig 12. Propagation delay and transition times;
port B to port A
Fig 13. Propagation delay and transition times;
port A to port B
50 % of VCC
input
DATAB
0.45 V
tPLH
output
DATAA
50 % of VCC
tPLH2
aaa-010659
Fig 14. Propagation delay
PCA9618
Product data sheet
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Single channel Fm+ I2C-bus repeater
11. Test information
VCC
VCC
RL
PULSE
GENERATOR
VI
VO
DUT
CL
RT
aaa-010660
RL = load resistor; 1.35 k on port A and port B.
CL = load capacitance includes jig and probe capacitance; 50 pF
RT = termination resistance should be equal to Zo of pulse generators
Fig 15. Test circuit for open-drain outputs
PCA9618
Product data sheet
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Single channel Fm+ I2C-bus repeater
12. Package outline
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Fig 16. Package outline PCA9618UK (WLCSP4)
PCA9618
Product data sheet
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Rev. 1 — 13 January 2016
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Single channel Fm+ I2C-bus repeater
ball diameter: 260 μm ± 5 μm
ball height:
208 μm ± 31 μm
UBM size: 205 μm ± 4 μm
aaa-011177
Fig 17. Ball structure
13. Soldering of WLCSP packages
13.1 Introduction to soldering WLCSP packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note
AN10439 “Wafer Level Chip Scale Package” and in application note AN10365 “Surface
mount reflow soldering description”.
Wave soldering is not suitable for this package.
All NXP WLCSP packages are lead-free.
13.2 Board mounting
Board mounting of a WLCSP requires several steps:
1. Solder paste printing on the PCB
2. Component placement with a pick and place machine
3. The reflow soldering itself
13.3 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 18) than a SnPb process, thus
reducing the process window
• Solder paste printing issues, such as smearing, release, and adjusting the process
window for a mix of large and small components on one board
PCA9618
Product data sheet
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• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature), and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic) while being low enough that the packages and/or boards are not
damaged. The peak temperature of the package depends on package thickness and
volume and is classified in accordance with Table 7.
Table 7.
Lead-free process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 18.
temperature
maximum peak temperature
= MSL limit, damage level
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 18. Temperature profiles for large and small components
For further information on temperature profiles, refer to application note AN10365
“Surface mount reflow soldering description”.
13.3.1 Stand off
The stand off between the substrate and the chip is determined by:
• The amount of printed solder on the substrate
• The size of the solder land on the substrate
• The bump height on the chip
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The higher the stand off, the better the stresses are released due to TEC (Thermal
Expansion Coefficient) differences between substrate and chip.
13.3.2 Quality of solder joint
A flip-chip joint is considered to be a good joint when the entire solder land has been
wetted by the solder from the bump. The surface of the joint should be smooth and the
shape symmetrical. The soldered joints on a chip should be uniform. Voids in the bumps
after reflow can occur during the reflow process in bumps with high ratio of bump diameter
to bump height, i.e. low bumps with large diameter. No failures have been found to be
related to these voids. Solder joint inspection after reflow can be done with X-ray to
monitor defects such as bridging, open circuits and voids.
13.3.3 Rework
In general, rework is not recommended. By rework we mean the process of removing the
chip from the substrate and replacing it with a new chip. If a chip is removed from the
substrate, most solder balls of the chip will be damaged. In that case it is recommended
not to re-use the chip again.
Device removal can be done when the substrate is heated until it is certain that all solder
joints are molten. The chip can then be carefully removed from the substrate without
damaging the tracks and solder lands on the substrate. Removing the device must be
done using plastic tweezers, because metal tweezers can damage the silicon. The
surface of the substrate should be carefully cleaned and all solder and flux residues
and/or underfill removed. When a new chip is placed on the substrate, use the flux
process instead of solder on the solder lands. Apply flux on the bumps at the chip side as
well as on the solder pads on the substrate. Place and align the new chip while viewing
with a microscope. To reflow the solder, use the solder profile shown in application note
AN10365 “Surface mount reflow soldering description”.
13.3.4 Cleaning
Cleaning can be done after reflow soldering.
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14. Soldering: PCB footprints
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Fig 19. PCB footprint for PCA9618UK (WLCSP4); reflow soldering; Solder Mask Defined (SMD)
PCA9618
Product data sheet
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Rev. 1 — 13 January 2016
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Single channel Fm+ I2C-bus repeater
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Fig 20. PCB footprint for PCA9618UK (WLCSP4); reflow soldering; Non-Solder Mask Defined (NSMD)
PCA9618
Product data sheet
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15. Abbreviations
Table 8.
Abbreviations
Acronym
Description
CDM
Charged-Device Model
CMOS
Complementary Metal-Oxide Semiconductor
ESD
ElectroStatic Discharge
HBM
Human Body Model
I2C-bus
Inter-Integrated Circuit bus
I/O
Input/Output
PMBus
Power Management Bus
RC
Resistor-Capacitor network
SMBus
System Management Bus
16. Revision history
Table 9.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PCA9618 v.1
20160113
Product data sheet
-
-
PCA9618
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17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
17.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
PCA9618
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 January 2016
© NXP B.V. 2016. All rights reserved.
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Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
I2C-bus — logo is a trademark of NXP B.V.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
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19. Contents
1
2
3
3.1
4
5
5.1
5.2
6
6.1
7
8
9
10
10.1
11
12
13
13.1
13.2
13.3
13.3.1
13.3.2
13.3.3
13.3.4
14
15
16
17
17.1
17.2
17.3
17.4
18
19
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
I2C-bus systems . . . . . . . . . . . . . . . . . . . . . . . . 4
Application design-in information . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 8
Static characteristics. . . . . . . . . . . . . . . . . . . . . 9
Dynamic characteristics . . . . . . . . . . . . . . . . . 11
AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . 11
Test information . . . . . . . . . . . . . . . . . . . . . . . . 12
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
Soldering of WLCSP packages. . . . . . . . . . . . 15
Introduction to soldering WLCSP packages . . 15
Board mounting . . . . . . . . . . . . . . . . . . . . . . . 15
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 15
Stand off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Quality of solder joint . . . . . . . . . . . . . . . . . . . 16
Rework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Cleaning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Soldering: PCB footprints. . . . . . . . . . . . . . . . 18
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 20
Legal information. . . . . . . . . . . . . . . . . . . . . . . 21
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Contact information. . . . . . . . . . . . . . . . . . . . . 22
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2016.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 13 January 2016
Document identifier: PCA9618