SCH3223 LPC IO with HWM, Dual UARTs, Power Button and Reset Support - Product Br

SCH3223
LPC IO with HWM, Dual UARTs, Power Button
and Reset Support
Product Features
• General Features
-
3.3 Volt Operation (SIO Block is 5 Volt Tolerant)
Programmable Wake-up Event (PME) Interface
PC99, PC2001 Compliant
ACPI 2.0 Compliant
Serial IRQ Interface Compatible with Serialized
IRQ Support for PCI Systems
ISA Plug-and-Play Compatible Register Set
Four Address Options for Power On Configuration
Port
System Management Interrupt (SMI)
8 Dedicated General Purpose I/O pins
2 GPIOs with VID compatible inputs
Security Key Register (32 byte) for Device Authentication
• Low Pin Count Bus (LPC) Interface
- Supports Bus frequencies of 19MHz to 33MHz
• Watchdog Timer
• Resume and Main Power Good Generator
• 2 Full Function Serial Ports
- High Speed NS16C550A Compatible UARTs with
Send/Receive 16-Byte FIFOs
- Supports 230k, 460k, 921k and 1.5M Baud
- Programmable Baud Rate Generator
- Modem Control Circuitry
- 480 Address and 15 IRQ Options
- Support IRQ Sharing among serial ports
- RS485 Auto Direction Control Mode
• Hardware Monitor
- Monitor Power supplies (+2.5V, +5V, +12V, Vccp
processor voltage), VCC, Vbat and Vtr.
- Remote Thermal Diode Sensing for One External
Temperature Measurement accurate to 1.5°C
- Internal Ambient Temperature Measurement
- Limit Comparison of all Monitored Values
- Programmable Automatic FAN control based on
temperature
• IDE Reset Output and 3 PCI Reset Buffers with
Software Control Capability
• Power Button Control and AC Power Failure
Recovery
• Temperature Ranges Available
- Industrial (+85°C to -40°C)
- Commercial (+70°C to 0°C)
• 64-Ball WFBGA RoHS Compliant Package
 2016 Microchip Technology Inc.
DS00002107A-page 1
SCH3223
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To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
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The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
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DS00002107A-page 2
 2016 Microchip Technology Inc.
SCH3223
1.0
INTRODUCTION
1.1
General Description
The SCH3223 is a 3.3V (Super I/O Block is 5V tolerant) PC99/PC2001 compliant Super I/O controller with an LPC interface. The SCH3223 also includes Hardware Monitoring capabilities, enhanced Security features, Power Control logic
and Motherboard Glue logic.
The SCH3223 is ACPI 1.0/2.0 compatible and therefore supports multiple low power-down modes. It incorporates
sophisticated power control circuitry (PCC), which includes support for keyboard.
The SCH3223 supports the ISA Plug-and-Play Standard register set (Version 1.0a). The I/O Address and hardware IRQ
of each Logical Device may be reprogrammed through the internal configuration registers. There are up to 480 I/O
address location options, and a Serialized IRQ interface.
Super I/O functionality includes two serial ports. The serial ports are fully functional NS16550 compatible UARTs that
support data rates up to 1.5 Mbps. They both have the full 8 pin interface. The Serial Ports contain programmable direction control, which will automatically drive nRTS when the Output Buffer is loaded, then drive nRTS when the Output
Buffer is empty.
Hardware Monitoring (HWM) includes support for monitoring an external temperature via thermal diode inputs and an
internal sensor for measuring local ambient temperature.
Hardware Monitoring also includes programmable, automatic fan control, consisting of a fan tachometer input and a
pulse width modulator (PWM) fan control output, responding to temperature inputs and programmable via the LPC bus.
It has the ability to alert the system to out-of-limit conditions and automatically control the speed of a fan in response.
Hardware Monitoring capability also includes voltage monitoring, and it has the ability to alert the system to out-of-limit
conditions. There are four analog inputs for monitoring external voltages of +5V, +2.5V, +12V and Vccp (core processor
voltage), as well as internal monitoring of the device’s internal VCC, VTR, and VBAT power supplies. SMI and PME
Wake outputs are provided to indicate out-of-limit temperature, voltage, and fan speed conditions. Hardware Monitoring
features are accessible via the LPC bus.
The Motherboard Glue logic includes various power management and system logic including generation of nRSMRST,
and reset generation. The reset generation includes a watchdog timer which can be used to generate a reset pulse. The
width of this pulse is selectable via an external strapping option.
System related functionality, which offers flexibility to the system designer, includes General Purpose I/O control functions, and control of two LED's.
 2016 Microchip Technology Inc.
DS00002107A-page 3
SCH3223
1.2
Block Diagram
An internal block diagram of the SCH3223 is shown in Figure 1-1.
FIGURE 1-1:
ARCHITECTURAL OVERVIEW
Reset
Generation
Logic
Serial
Ports
LPC
Interface
GPIO
Device
Configuration
Power
Control
&
Wake
Events
DS00002107A-page 4
Hardware
Monitoring
and
Fan Control
Power
Management
System
Resets
 2016 Microchip Technology Inc.
SCH3223
2.0
PACKAGE OUTLINE
FIGURE 2-1:
SCH3223 64 WFBGA Package
 2016 Microchip Technology Inc.
DS00002107A-page 5
SCH3223
3.0
BALL LAYOUT
3.1
SCH3223 Ball Layout Summary
FIGURE 3-1:
DS00002107A-page 6
SCH3223 FOOTPRINT DIAGRAM, TOP VIEW
 2016 Microchip Technology Inc.
SCH3223
TABLE 3-1:
BALL#
B1
SCH3223 SUMMARY
FUNCTIONa
+12V_IN
C1
+5V_IN
C2
VTR
D2
TEST=VSS
E2
VSS
E1
CLOCKI
E4
LAD0
F4
LAD1
G4
LAD2
G2
LAD3
G1
LFRAME#
H6
PCI_RESET#
H5
PCI_CLK
H2
SER_IRQ
J2
VSS
K3
VCC
J1
nIDE_RSTDRV / GP44
K2
nPCIRST1 / GP45
K1
nPCIRST2 / GP46
L2
nPCIRST3 / GP47
L3
AVSS
K4
VBAT
K5
GP27 / nIO_SMI / P17
L5
VTR
L9
nRI1
L10
nDCD1
K11
RXD1
K7
TXD1 / SIOXNOROUT
K8
nDSR1
K9
nRTS1 / SYSOPT0
K10
nCTS1
J10
nDTR1 / SYSOPT1
J11
GP50 / nRI2
H10
VTR
L7
VSS
H7
GP51 / nDCD2
G11
GP52 / RXD2
G10
GP53 / TXD2
G8
GP54 / nDSR2
F8
GP55 / nRTS2 / RESGEN
E8
GP56 / nCTS2
D6
GP57 / nDTR2
D7
PB_OUT#
E10
PS_ON#
 2016 Microchip Technology Inc.
DS00002107A-page 7
SCH3223
TABLE 3-1:
BALL#
E11
SCH3223 SUMMARY (CONTINUED)
FUNCTIONa
PB_IN#
D10
SLP_SX#
C11
GP42 / nIO_PME
C10
GP61 / nLED2 / CLKO
B11
GP60 / nLED1 / WDT
A10
GP63
B10
CLKI32
A9
nRSMRST
B9
GP62
B8
PWRGD_OUT
B7
PWRGD_PS
A7
nFPRST / GP30
A5
PWM1
B5
FANTACH1
D5
HVSS
B4
HVTR
B3
REMOTE1-
A3
REMOTE1+
B2
VCCP_IN
A2
+2.5V_IN
a. Device ID register at Plug&Play Index 0x20 holds 0x7D.
DS00002107A-page 8
 2016 Microchip Technology Inc.
SCH3223
4.0
PRODUCT BRIEF REVISION HISTORY
TABLE 4-1:
REVISION HISTORY
Revision Level & Date
DS00002107A (02-16-16)
 2016 Microchip Technology Inc.
Section/Figure/Entry
Correction
Document Release
DS00002107A-page 9
SCH3223
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Technical support is available through the web site at: http://microchip.com/support
DS00002107A-page 10
 2016 Microchip Technology Inc.
SCH3223
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
[X]
Device
Temperature
Range
Device:
SCH3223
Temperature
Range:
Blank
I
Package:
7U
Tape and Reel
Option:
Blank
TR
=
0C to
= -40C to
=
-
XX
Package
+70C
+85C
-
[XX]
Tape and Reel
Option
Examples:
a)
SCH3223-7U
Commercial temperature, 64-pin WFBGA, Tray
b)
SCH3223I-7U-TR
Industrial temperature, 64-pin WFBGA, Tape &
Reel
(Commercial)
(Industrial)
64-pin WFBGA
= Standard packaging (tray)
= Tape and Reel (Note 1)
Note
 2016 Microchip Technology Inc.
1:
Tape and Reel identifier only appears in
the catalog part number description. This
identifier is used for ordering purposes and
is not printed on the device package.
Check with your Microchip Sales Office for
package availability with the Tape and Reel
option.
DS00002107A-page 11
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
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ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch,
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Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
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© 2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 9781522403012
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DS00002107A-page 12
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DS00002107A-page 13
 2016 Microchip Technology Inc.