SCH5407 Super I/O with Temperature Sensing, Auto Fan Control and Glue Logic - Pr

SCH5407
Super I/O with Temperature Sensing, Auto Fan Control and
Glue Logic
Product Features
• General Features
- 3.3 Volt Operation (Most I/O Pins are 5 Volt
Tolerant)
- LPC Interface
- PC99, PC2001 Compliant
- ACPI 2.0 Compliant
- Multiplexed Command, Address and Data
Bus
- Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems
- PME Interface
- ISA Plug-and-Play Compatible Register Set
- Programmable Wake-up Event (PME) Interface
- System Management Interrupt (SMI)
- 30 General Purpose Input/Output Pins
• AC Power Failure Recovery
• Watchdog Timer Capable to Pulse PWRGD Low
and Change GPO Polarity
• 2.88MB Super I/O Floppy Disk Controller
- Licensed CMOS 765B Floppy Disk Controller
- Software and Register Compatible with
Microchip's Proprietary 82077AA Compatible
Core
- Supports One Floppy Drive
- Configurable Open Drain/Push-Pull
Output Drivers
- Supports Vertical Recording Format
- 16-Byte Data FIFO
- 100% IBM® Compatibility
- Detects All Overrun and Underrun Conditions
- Sophisticated Power Control Circuitry (PCC)
Including Multiple Powerdown Modes for
Reduced Power Consumption
- DMA Enable Logic
- Data Rate and Drive Control Registers
- 480 Address, Up to Eight IRQ and Four DMA
Options
- Support 3 Mode FDD
• Enhanced Digital Data Separator
- 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250
Kbps Data Rates
- Programmable Precompensation Modes
• Serial Port
- Two Full Function Serial Ports
- High Speed NS16C550A Compatible UARTs
with Send/Receive 16-Byte FIFOs
 2014 Microchip Technology Inc.
- Supports 230k and 460k Baud
- Programmable Baud Rate Generator
- Modem Control Circuitry
- 480 Address and 15 IRQ Options
• Multi-Mode™ Parallel Port with ChiProtect™
- Standard Mode IBM PC/XT®, PC/AT®, and
PS/2™ Compatible Bi-directional Parallel
Port
- Enhanced Parallel Port (EPP) Compatible EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant)
- IEEE 1284 Compliant Enhanced Capabilities
Port (ECP)
- ChiProtect Circuitry for Protection
- 960 Address, Up to 15 IRQ and Four DMA
Options
• Keyboard Controller
- 8042 Software Compatible
- 8 Bit Microcomputer
- 2k Bytes of Program ROM
- 256 Bytes of Data RAM
- Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface
- Asynchronous Access to Two Data Registers
and One Status Register
- Supports Interrupt and Polling Access
- 8 Bit Counter Timer
- Port 92 Support
- Fast Gate A20 and KRESET Outputs
- Phoenix Keyboard BIOS ROM
• Motherboard GLUE Logic
- Resume Reset Signal Generation
- IDE Reset Output
- (4) Buffered PCI Reset Outputs with software
controlled reset capability
- Two 3VSB Gate signal generation for Suspend to RAM or S3/S5 Wake up dual power
plane control
- Front Panel Reset Debouncing and Main
3.3V Power Good Signal Generation
- Power Supply Turn On Circuitry with Support
for power button on PS/2 Keyboard
- Switches for SMBus Isolation or Voltage
Translation for DDC to VGA Monitor Circuitry
- LED Control (2)
- Speaker Input & Output Control
DS00001787A-page 1
SCH5407
• Fan Control
- LPC compliant interface for Hardware Monitoring
- 3 PWM (Pulse width Modulation) Outputs
with High Frequency PWM Support
- 3 Fan Tachometer Inputs
- Two Programmable automatic fan control
thermal zones based on Selectable Temperature Reading
- Fan Tachometer Event can generate PME,
SMI and/or Speaker Warning
• Temperature Monitor
- Monitoring of Two Remote Thermal Diodes
with ± 3°C TYP, ± 5°C MAX Accuracy
- Internal Ambient Temperature Measurement
- Beta Compensation for Accurate Temperature Sensing on Intel 65nm CPUs
- Limit Comparison of all Monitored Values
- Thermal Event can generate PME, SMI and/
or Speaker Warning
• Processor Hot and Thermal Trip Support
• Voltage Monitor
- Monitor Power supplies (V1_IN for +12V,
V2_IN for +5V, +2.5V, VCCP, VBAT,
+3.3VTR, +3.3VCC, +1.5VTRIP)
- Limit Comparison of all Monitored Values
- Voltage Event can generate PME, SMI and/or
Speaker Warning
• Intruder Detection Support
• 8 VID (Voltage Identification) Input/Output Pins
• VRD revision 10 or 11 Detection
• 128-Pin QFP (3.2mm footprint) RoHS Compliant
Package
The Motherboard Glue logic includes various power
management and system logic including generation of
nRSMRST, SMBus isolation buffers, and buffered PCI
reset outputs.
The SCH5407 incorporates complete legacy Super I/O
functionality including an 8042 based keyboard and
mouse controller, an IEEE 1284, EPP, and ECP compatible parallel port, one serial port that is 16C550A
UART compatible, one IrDA 1.0 infrared ports, and a
floppy disk controller with Microchip's true CMOS 765B
core and enhanced digital data separator. The true
CMOS 765B core provides 100% compatibility with
IBM PC/XT and PC/AT architectures and is software
and register compatible with Microchip's proprietary
82077AA core. System related functionality, which
offers flexibility to the system designer, is available via
General Purpose I/O control functions, control of two
LED's, and fan control using fan tachometer inputs and
pulse width modulator (PWM) outputs.
The SCH5407 is ACPI 1.0/2.0 compatible and therefore supports multiple low power-down modes. It incorporates sophisticated power control circuitry (PCC),
which includes support for keyboard and mouse wakeup events.
The SCH5407 supports the ISA Plug-and-Play Standard register set (Version 1.0a). The I/O Address, DMA
Channel and hardware IRQ of each logical device in
the SCH5407 may be reprogrammed through the internal configuration registers. There are up to 480 (960 Parallel Port) I/O address location options, a Serialized
IRQ interface, and three DMA channels.
Description
The SCH5407 is a 3.3V (Super I/O Block is 5V tolerant)
PC99/PC2001 compliant Super I/O controller with an
LPC interface. SCH5407 also includes Hardware Monitoring capabilities, enhanced Security features, Power
Control logic and Motherboard Glue logic.
The SCH5407's hardware monitoring capability
includes temperature, voltage and fan speed monitoring. It has the ability to alert the system to out-of-limit
conditions and automatically control the speeds of multiple fans. There are five analog inputs for monitoring
external voltages of +V1_IN (for scaled +12V), V2_IN
(for scaled +5V), VTRIP (1.5V), +2.5V and VCCP (core
processor voltage), as well as internal monitoring of the
SIO's VCC, VTR, and VBAT power supplies. The
SCH5407 includes support for monitoring two external
temperatures via thermal diode inputs and an internal
sensor for measuring ambient temperature. The hardware monitoring block of the SCH5407 is accessible
via the LPC Bus. The out-of -limit temperature, voltage
of fan tachometer events can be reported on the PME
and/or SMI output pin and speaker alarm annunciation.
DS00001787A-page 2
 2014 Microchip Technology Inc.
SCH5407
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DS00001787A-page 3
SCH5407
BLOCK DIAGRAM
14MHz
CLOCKI
SER_IRQ
PCI_CLK
LED2*
LED1*
WDT*
SPEAKER_IN*
nINTRD_IN
PD[7,0]
CLOCK GEN
Intruder
Detection
WDT
Speaker
WDT
LEDs
SERIAL
IRQ
LAD[3:0]
nLFRAME
SPEAKER_OUT*
SCH5407 BLOCK DIAGRAM
STRAP
OPTIONS
FIGURE 1:
High-Speed
16550A
UART
PORT 1
Internal Bus
(Data, Address, and Control lines)
LPC
Interface
Multi-Mode
Parallel Port
with
ChiProtectTM/
FDC MUX
nLDRQ
nPCI_RESET
IO_PME*
IO_SMI*
High-Speed
16550A
UART
PORT 2
Power Mgmt
GP1[0:3,5:7]*, GP2[1:2,7]*
nDIR, nSTEP
nDSKCHG, nDS0,
WDT
VCC
nRDATA, nWDATA
Proprietary
82077
Compatible
Floppy Disk
Controller with
Digital Data
Separator &
Write Precompensation
FCAP
VTR
VCC
VBAT
Power Control
and Recovery
14MHz
DRVDEN0*, nWRTPRT
HWM_INT
nWGATE, nHDSEL
PWRGD
nMTR0, nTRK0, nINDEX
Keyboard/Mouse
8042
controller
VBAT
GP5[0:7]*
PCI Reset
Outputs
General
Purpose
I/O
VTR
GP3[2,3,6,7]*, GP4[0,1,2,3]*
1.8V
Regulator
VCC POR
Circuit
Hardware
Monitor/
Fan Control
VID I/O
AMD Power
Sequencing
VBAT POR
Ckt
DS00001787A-page 4
VID0
VID1
VID2
VID3
VID4
VRD_DET*
VTRIP_IN
VCCP_IN
V1_IN
V2_IN
+2.5V_IN
Remote1Remote1+
Remote2Remote2+
PWM1
PWM2
PWM3
FANTACH1
FANTACH2
FANTACH3
HVTR
HVSS
AMD SI
BUSY, SLCT, PE,
nERROR, nACK
nSTROBE, nINIT,
nSLCTIN, nALF
TXD1*, RXD1
nCTS1, nRTS1*
nDSR1, nDTR1
nDCD1, nRI1
TXD2 (IRTX)*,
RXD2 (IRRX)*
CTS2*, RTS2 *
DSR2*, DTR2*
DCD2*, RI2*
nIDE_RSTDRV
nPCIRST_OUT[1:3]
A20M
nKBDRST
MCLK, MDAT
KCLK, KDAT
nFPRST
nPB_IN
`PWRGD_PS
nSLP_S3
nSLP_S5
PWRGD_CPU
PWRGD_3V
n3VSB_GATE1
n3VSB_GATE2*
nRSMRST
nPS_ON
VCORE_GD
VLDT
VDDA
VDIMM_EN
VCORE_EN
VDD_EN
VLDT_EN
nPSON_IN
AMDSI_CLK
AMDSI_DAT
Note 1: This diagram does not show all power and
ground connections.
Note 2: Signal names followed by an asterisk (*) are
located on multifunction pins. This diagram is
designed to show the various functions available on
the chip and should not be used as a pin layout .
 2014 Microchip Technology Inc.
SCH5407
PACKAGE OUTLINE
128 Pin QFP Package Outline, 14x20x2.7 Body, 3.2 mm Footprint
Min
Nominal
Max
Remarks
A
~
~
3.4
Overall Package Height
A1
0.05
~
0.5
Standoff
A2
2.55
~
3.05
Body Thickness
D
23.00
23.20
23.40
X Span
D1
19.90
20.00
20.10
X body Size
E
17.00
17.20
17.40
Y Span
E1
13.90
14.00
14.10
Y body Size
H
0.09
~
0.20
Lead Frame Thickness
L
0.73
0.88
1.03
Lead Foot Length
L1
~
1.60
~
Lead Length
e
0.50 Basic
q
0o
W
0.10
Lead Pitch
~
7o
Lead Foot Angle
~
0.30
Lead Width
R1
0.08
~
~
Lead Shoulder Radius
R2
0.08
~
0.30
Lead Foot Radius
ccc
~
~
0.08
Coplanarity
Note 1: Controlling Unit: millimeter.
2: Tolerance on the position of the leads is ± 0.04 mm maximum.
3: Package body dimensions D1 and E1 do not include the mold protrusion.
Maximum mold protrusion is 0.25 mm.
4: Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.
5: Details of pin 1 identifier are optional but must be located within the zone indicated.
 2014 Microchip Technology Inc.
DS00001787A-page 5
SCH5407
APPENDIX A:
TABLE A-1:
PRODUCT BRIEF REVISION HISTORY
REVISION HISTORY
Revision
DS00001787A (07-11-14)
DS00001787A-page 6
Section/Figure/Entry
Correction
Replaces previous SMSC version Rev. 0.43 (07-28-06)
 2014 Microchip Technology Inc.
SCH5407
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DS00001787A-page 7
SCH5407
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.(1)
-
Device
Device:
Package:
Tape and Reel
Option:
XXX(2)
Package
[X](3)
-
Tape and Reel
Option
Example:
SCH5407-NW = 128-pin QFP
SCH5407 (1)
128-pin QFP (2) RoHS Compliant package
NW
=
Blank
TR
= Tray packaging
= Tape and Reel (3)
DS00001787A-page 8
Note 1:
These products meet the halogen maximum
concentration values per IEC61249-2-21.
Note 2:
All package options are RoHS compliant.
For RoHS compliance and environmental
information, please visit http://www.microchip.com/pagehandler/en-us/aboutus/
ehs.html .
Note 3:
Tape and Reel identifier only appears in the
catalog part number description. This identifier is used for ordering purposes and is not
printed on the device package. Check with
your Microchip Sales Office for package
availability with the Tape and Reel option.
 2014 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
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The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck,
MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and
UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
The Embedded Control Solutions Company and mTouch are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, KleerNet, KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK,
MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, RightTouch logo, REAL ICE, SQI, Serial
Quad I/O, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
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All other trademarks mentioned herein are property of their respective companies.
© 2014, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 9781632763303
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 2014 Microchip Technology Inc.
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DS00001787A-page 9
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DS00001787A-page 10
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03/25/14
 2014 Microchip Technology Inc.