SCH3106 LPC IO with Multiple Serial Ports, 8042 KBC, Reset Generation and Hardwa

SCH3106
LPC IO with Multiple Serial Ports, 8042 KBC,
Reset Generation and Hardware Monitoring
Product Features
• General Features
- 3.3 Volt Operation (SIO Block is 5 Volt Tolerant)
- Programmable Wake-up Event (PME) Interface
- PC99, PC2001 Compliant
- ACPI 2.0 Compliant
- Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems
- ISA Plug-and-Play Compatible Register Set
- Four Address Options for Power On Configuration Port
- System Management Interrupt (SMI)
- 40 General Purpose I/O pins
- 6 GPIO with VID compatible inputs
- Support for power button on PS/2 Keyboard
- Security Key Register (32 byte) for Device
Authentication
• Low Pin Count Bus (LPC) Interface
- Supports LPC Bus frequencies of 19.2 MHz
to 33MHz
• Programmable Clock Output to 16 HZ.
• 2.88MB Super I/O Floppy Disk Controller
- Licensed CMOS 765B Floppy Disk Controller
- Supports Two Floppy Drives
- Configurable Open Drain/Push-Pull
- Supports Vertical Recording Format
- 16-Byte Data FIFO
- 100% IBM® Compatibility
- Detects All Overrun and Underrun Conditions
- Sophisticated Power Control Circuitry (PCC)
Including Multiple Powerdown Modes for
Reduced Power Consumption
- DMA Enable Logic
- Data Rate and Drive Control Registers
- 480 Address, Up to Eight IRQ and Four DMA
Options
- Support FDD Interface on Parallel Port Pins
• Enhanced Digital Data Separator
- 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250
Kbp Data Rates
- Programmable Precompensation Modes
• Keyboard Controller
- 8042 Software Compatible
- 8 Bit Microcomputer
- 2k Bytes of Program ROM
 2014 Microchip Technology Inc.
•
•
•
•
- 256 Bytes of Data RAM
- Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface
- Asynchronous Access to Two Data Registers
and One Status Register
- Supports Interrupt and Polling Access
- 8 Bit Counter Timer
- Port 92 Support
- Fast Gate A20 and KRESET Outputs
- Phoenix Keyboard BIOS ROM
Multiple Serial Ports
- 4 Full Function and 2 Four-Pin Serial Ports
- High Speed NS16C550A Compatible UARTs
with Send/Receive 16-Byte FIFOs
- Supports 230k, 460k, 921k and 1.5M Baud
- Programmable Baud Rate Generator
- Modem Control Circuitry
- 480 Address and 15 IRQ Options
- Supports IRQ Sharing among serial ports
- RS485 Auto Direction Control Mode
Infrared Port
- Multiprotocol Infrared Interface
- IrDA 1.0 Compliant
- SHARP ASK IR
- 480 Addresses, Up to 15 IRQ
Multi-Mode™ Parallel Port with ChiProtect™
- Standard Mode IBM PC/XT®, PC/AT®, and
PS/2™ Compatible Bi-directional Parallel
Port
- Enhanced Parallel Port (EPP) Compatible EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant)
- EEE 1284 Compliant Enhanced Capabilities
Port (ECP)
- ChiProtect Circuitry for Protection
- 960 Address, Up to 15 IRQ and Four DMA
Options
Hardware Monitor
- Monitor Power supplies (+2.5V, +5V, +12V,
Vccp (processor voltage), VCC, Vbat and Vtr.
- Remote Thermal Diode Sensing for Two
External Temperature Measurements accurate to 1.5oC
- Internal Ambient Temperature Measurement
- Limit Comparison of all Monitored Values
- Programmable Automatic FAN control based
on temperature
- nHWM_INT Pin for out-of-limit Temperature
or Voltage Indication
DS00001780A-page 1
SCH3106
•
•
•
•
- Configurable offset for internal or external
temperature channels
- Thermtrip signal for over temperature indication
Watchdog Timer
Resume and Main Power Good Generator
Commercial (+70°C to 0°C) Temperature Range
128-Pin VTQFP RoHS Compliant Package
Description
The SCH3106 is a 3.3V (Super I/O Block is 5V tolerant)
PC99/PC2001 compliant Super I/O controller with an
LPC interface. The SCH3106 also includes Hardware
Monitoring capabilities, enhanced Security features,
Power Control logic and Motherboard Glue logic.
The SCH3106's hardware monitoring capability
includes temperature, voltage and fan speed monitoring. It has the ability to alert the system of out-of-limit
conditions and automatically control the speeds of multiple fans. There are four analog inputs for monitoring
external voltages of +5V, +2.5V, +12V and Vccp (core
processor voltage), as well as internal monitoring of the
SIO's VCC, VTR, and Vbat power supplies. The
SCH3106 includes support for monitoring two external
temperatures via thermal diode inputs and an internal
sensor for measuring ambient temperature. The
nHWM_INT pin is implemented to indicate out-of-limit
temperature, voltage, and FANTACH conditions. The
hardware monitoring block of the SCH3106 is accessible via the LPC bus. The same interrupt event reported
on the nHWM_INT pin also creates PME wakeup
events. A separate THERMTRIP output is available,
which generates a pulse output on a programmed over
temperature condition. This can be used to generate an
reset or shutdown indicator to the system.
The hardware monitoring capability also has programmable automatic FAN control. Three fan tachometer
inputs and three pulse width modulator (PWM) outputs
are available.
DS00001780A-page 2
The Motherboard Glue logic includes various power
management and system logic including generation of
nRSMRST, a programmable Clock output, and reset
generation. The reset generation includes a watchdog
timer which can be used to generate a reset pulse. The
width of this pulse is selectable via an external strapping option.
The SCH3106 incorporates complete legacy Super I/O
functionality including an 8042 based keyboard and
mouse controller, an IEEE 1284, EPP, and ECP compatible parallel port, multiple serial ports, one IrDA 1.0
infrared ports, and a floppy disk controller with Microchip's true CMOS 765B core and enhanced digital data
separator, The true CMOS 765B core provides 100%
compatibility with IBM PC/XT and PC/AT architectures
and is software and register compatible with Microchip's proprietary 82077AA core. System related functionality, which offers flexibility to the system designer,
General Purpose I/O control functions, and control of
two LED's.
The serial ports are fully functional NS16550 compatible UARTs that support data rates up to 1.5 Mbps.
There are four, 8 pin Serial Ports and two, 4 pin Serial
Ports. The reduced pin serial ports have selectable
input and output controls. The Serial Ports contain programmable direction control, which will automatically
Drive nRTS when the Output Buffer is loaded, then
Drive nRTS when the Output Buffer is Empty.
The SCH3106 is ACPI 1.0/2.0 compatible and therefore supports multiple low power-down modes. It incorporates sophisticated power control circuitry (PCC),
which includes support for keyboard.
The SCH3106 supports the ISA Plug-and-Play Standard register set (Version 1.0a). The I/O Address, DMA
Channel and hardware IRQ of each logical device in
the SCH3106 may be reprogrammed through the internal configuration registers. There are up to 480 (960 Parallel Port) I/O address location options, a Serialized
IRQ interface, and three DMA channels.
 2014 Microchip Technology Inc.
SCH3106
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 2014 Microchip Technology Inc.
DS00001780A-page 3
SCH3106
BLOCK DIAGRAM
LED2*
SCH3106 BLOCK DIAGRAM
LED1*
FIGURE 1:
PD[7:0]
BUSY,nSCLTIN
SCLT, PE
nERROR, nACK
nSTROBE, nINIT, nALF
WDT*
SER_IRQ
PCICLK
LAD[3:0]
LFRAME#
LDRQ#
PCI_RESET#
nIO_PME
nIO_SMI
GP10-17
GP21,22,
GP27,
GP30-34,
GP36-37,
GP40, GP42,
GP44-47,
GP50-57,
GP60-67
nMTR0,
nTRK0,
nINDEX
nWGATE,
nHDSEL,
DRVDEN0*,
nWRTPRT,
nDIR, nSTEP,
nDSKCHG,
nDS0,
nRDATA,
nWDATA
LEDs
SERIAL
IRQ
Internal Bus
(Data, Address, and Control lines)
LPC
Bus Interface
Multi-Mode
Parallel Port
with
ChiProtectTM/
AND FDC MUX
High-Speed
16550A
UART
PORT 1 & 2
Power Mgmt
High-Speed
16550A
UART
PORT 3& 4
General
Purpose
I/O
32 byte
Security
Key
Register
Proprietary
82077
Compatible
Floppydisk
Controller with
Digital Data
Separator &
Write Precompensation
Reset
Generation
nThremtrip
Hardware
Monitor
Watchdog
Timer
Keyboard/Mouse
8042
controller
High-Speed
16550A
UART
PORT 5 & 6
TXD1, RXD1
nCTS1, nRTS1
nDSR1, nDTR1
nDCD1, nRI1
TXD2 (IRTX2)
RXD2 (IRRX2)
nCTS2, nRTS2
nDSR2, nDTR2
nDCD2, nRI2
TXD3, RXD3
nCTS3, nRTS3
nDSR3, nDTR3
nDCD3, nRI3
TXD4, RXD4,
nCTS4, nRTS4
nDSR4, nDTR4
nDCD4, nRI4
MCLK, MDAT
A20M,
nKBDRST,
KCLK,KDAT
TXD5, RXD5
nSCIN5
nSCOUT5
TXD6, RXD6
nSCIN6
nSCOUT6
+5VTR_IN
+12V_IN
+2.5V_IN
VCCP_IN
+5V_IN
HVTR
HVSS
Remote1Remote1+
Remote2Remote2+
FANTACH1
FANTACH2
FANTACH3
PWM1
PWM2
PWM3
nHWM_INT
nTHERMTRIP
nFPRST
PWRGD_PS
PWRGD_OUT
WDT
CLOCK
GEN
VCC
VTR
Vbat
HWN_INT
14.318Mhz
96 Mhz
PCI_RESET
#
CLKI32
CLOCKI
DS00001780A-page 4
 2014 Microchip Technology Inc.
SCH3106
PACKAGE OUTLINE
SCH3106 128-PIN VTQFP, 14MM X 14MM X 1.0MM BODY, 0.4MM PITCH
Note: For the most current package drawings,
see the Microchip Packaging Specification at
http://www.microchip.com/packaging
FIGURE 2:
 2014 Microchip Technology Inc.
DS00001780A-page 5
SCH3106
APPENDIX A:
TABLE A-1:
PRODUCT BRIEF REVISION HISTORY
REVISION HISTORY
Revision
DS00001780A (07-01-14)
DS00001780A-page 6
Section/Figure/Entry
Correction
Document Release
 2014 Microchip Technology Inc.
SCH3106
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 2014 Microchip Technology Inc.
DS00001780A-page 7
SCH3106
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.(1)
-
Device
Device:
Package:
Tape and Reel
Option:
XXX(2)
Package
[X](3)
-
Tape and Reel
Option
Example:
SCH3106-NU = 128-pin VTQFP
SCH3106 (1)
NU
=
128-pin VTQFP (2) (matte tin finish)
Blank
TR
=
=
Tray packaging
Tape and Reel (3)
DS00001780A-page 8
Note 1:
These products meet the halogen maximum
concentration values per IEC61249-2-21.
Note 2:
All package options are RoHS compliant.
For RoHS compliance and environmental
information, please visit http://www.microchip.com/pagehandler/en-us/aboutus/
ehs.html .
Note 3:
Tape and Reel identifier only appears in the
catalog part number description. This identifier is used for ordering purposes and is not
printed on the device package. Check with
your Microchip Sales Office for package
availability with the Tape and Reel option.
 2014 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
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Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
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Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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All other trademarks mentioned herein are property of their respective companies.
© 2014, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 9781632763099
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CERTIFIED BY DNV
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 2014 Microchip Technology Inc.
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DS00001780A-page 9
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DS00001780A-page 10
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