PMDPB95XNE2 30 V, dual N-channel Trench MOSFET 14 June 2016 Product data sheet 1. General description Dual N-channel enhancement mode Field-Effect Transistor (FET) in a small and leadless DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package using Trench MOSFET technology. 2. Features and benefits • • • • • Very fast switching Trench MOSFET technology Leadless medium power SMD plastic package: 2 × 2 × 0.65 mm Exposed drain pad for excellent thermal conduction EletroStatic Discharge (ESD) protection > 2 kV HBM 3. Applications • • • • • Charging switch for portable devices DC-to-DC converters Small brushless DC motor drive Power management in battery-driven portables Hard disk and computing power management 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj = 25 °C - - 30 V VGS gate-source voltage -12 - 12 V ID drain current - - 3 A - 77 99 mΩ Per transistor VGS = 4.5 V; Tamb = 25 °C; t ≤ 5 s [1] Static characteristics (per transistor) RDSon drain-source on-state resistance [1] VGS = 4.5 V; ID = 2.8 A; Tj = 25 °C Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for 2 drain 6 cm . Scan or click this QR code to view the latest information for this product PMDPB95XNE2 NXP Semiconductors 30 V, dual N-channel Trench MOSFET 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 S1 source TR1 2 G1 gate TR1 3 D2 drain TR2 4 S2 source TR2 5 G2 gate TR2 6 D1 drain TR1 7 D1 drain TR1 8 D2 drain TR2 Simplified outline 6 5 7 1 Graphic symbol 8 2 D1 4 D2 G1 G2 3 Transparent top view S1 S2 DFN2020-6 (SOT1118) 017aaa256 6. Ordering information Table 3. Ordering information Type number PMDPB95XNE2 Package Name Description Version DFN2020-6 DFN2020-6: plastic thermal enhanced ultra thin small SOT1118 outline package; no leads; 6 terminals; body 2 x 2 x 0.65 mm 7. Marking Table 4. Marking codes Type number Marking code PMDPB95XNE2 3B PMDPB95XNE2 Product data sheet All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 2 / 15 PMDPB95XNE2 NXP Semiconductors 30 V, dual N-channel Trench MOSFET 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj = 25 °C - 30 V VGS gate-source voltage -12 12 V ID drain current Per transistor VGS = 4.5 V; Tamb = 25 °C; t ≤ 5 s [1] - 3 A VGS = 4.5 V; Tamb = 25 °C [1] - 2.7 A VGS = 4.5 V; Tamb = 100 °C [1] - 1.7 A - 11 A [2] - 510 mW [1] - 1.165 W - 8.33 W IDM peak drain current Tamb = 25 °C; single pulse; tp ≤ 10 µs Ptot total power dissipation Tamb = 25 °C Tsp = 25 °C Per device Tj junction temperature -55 150 °C Tamb ambient temperature -55 150 °C Tstg storage temperature -65 150 °C - 1.1 A Source-drain diode IS source current PMDPB95XNE2 Product data sheet Tamb = 25 °C [1] [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for [2] drain 6 cm . Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. 2 All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 3 / 15 PMDPB95XNE2 NXP Semiconductors 30 V, dual N-channel Trench MOSFET 017aaa123 120 017aaa124 120 Pder (%) Ider (%) 80 80 40 40 0 - 75 Fig. 1. - 25 25 75 125 Tj (°C) 0 - 75 175 Normalized total power dissipation as a function of junction temperature Fig. 2. - 25 25 75 125 Tj (°C) 175 Normalized continuous drain current as a function of junction temperature aaa-022450 102 ID (A) 10 tp = 10 µs Limit RDSon = VDS/ID 100 µs 1 1 ms DC; Tsp = 25 °C 10-1 100 ms DC; Tamb = 25 °C; drain mounting pad 6 cm2 10-2 10-1 Fig. 3. 10 ms 1 10 102 VDS (V) Safe operating area; junction to ambient; continuous and peak drain currents as a function of drainsource voltage 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions thermal resistance from junction to ambient in free air Min Typ Max Unit [1] - 224 257 K/W [2] - 95 109 K/W [2] - 55 64 K/W Per transistor Rth(j-a) PMDPB95XNE2 Product data sheet in free air; t ≤ 5 s All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 4 / 15 PMDPB95XNE2 NXP Semiconductors 30 V, dual N-channel Trench MOSFET Symbol Parameter Rth(j-sp) thermal resistance from junction to solder point [1] [2] Conditions Min Typ Max Unit - 12 15 K/W Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. aaa-022451 103 Zth(j-a) (K/W) 2 Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 6 cm . duty cycle = 1 0.75 102 0.33 0.20 0.50 0.25 0.10 0.05 0.02 10 0.01 0 1 10-3 10-2 10-1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig. 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values aaa-022452 103 Zth(j-a) (K/W) 102 duty cycle = 1 0.75 0.33 0.20 10 0.50 0.25 0.10 0.05 0 1 10-3 0.02 0.01 10-2 10-1 FR4 PCB, mounting pad for drain 6 cm Fig. 5. 1 10 102 tp (s) 103 2 Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PMDPB95XNE2 Product data sheet All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 5 / 15 PMDPB95XNE2 NXP Semiconductors 30 V, dual N-channel Trench MOSFET 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics (per transistor) V(BR)DSS drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 30 - - V VGSth gate-source threshold voltage ID = 250 µA; VDS=VGS; Tj = 25 °C 0.75 1 1.25 V IDSS drain leakage current VDS = 30 V; VGS = 0 V; Tj = 25 °C - - 1 µA IGSS gate leakage current VGS = 12 V; VDS = 0 V; Tj = 25 °C - - 10 µA VGS = -12 V; VDS = 0 V; Tj = 25 °C - - -10 µA VGS = 4.5 V; VDS = 0 V; Tj = 25 °C - - 2 µA VGS = -4.5 V; VDS = 0 V; Tj = 25 °C - - -2 µA VGS = 4.5 V; ID = 2.8 A; Tj = 25 °C - 77 99 mΩ VGS = 4.5 V; ID = 2.8 A; Tj = 150 °C - 126 170 mΩ VGS = 2.5 V; ID = 2.5 A; Tj = 25 °C - 92 117 mΩ RDSon drain-source on-state resistance gfs forward transconductance VDS = 10 V; ID = 2.8 A; Tj = 25 °C - 8.6 - S RG gate resistance Tj = 25 °C; f = 1 MHz - 9.2 - Ω Dynamic characteristics (per transistor) QG(tot) total gate charge VDS = 15 V; ID = 3 A; VGS = 4.5 V; - 2.9 4.5 nC QGS gate-source charge Tj = 25 °C - 0.4 - nC QGD gate-drain charge - 0.8 - nC Ciss input capacitance VDS = 15 V; f = 1 MHz; VGS = 0 V; - 258 - pF Coss output capacitance Tj = 25 °C - 31 - pF Crss reverse transfer capacitance - 23 - pF td(on) turn-on delay time VDS = 15 V; ID = 3 A; VGS = 4.5 V; - 9 - ns tr rise time RG(ext) = 6 Ω; Tj = 25 °C - 10 - ns td(off) turn-off delay time - 20 - ns tf fall time - 8 - ns - 0.7 1.2 V Source-drain diode (per transistor) VSD source-drain voltage PMDPB95XNE2 Product data sheet IS = 1.1 A; VGS = 0 V; Tj = 25 °C All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 6 / 15 PMDPB95XNE2 NXP Semiconductors 30 V, dual N-channel Trench MOSFET aaa-022453 12 4.5 V ID (A) 3.0 V ID (A) 2.5 V 9 aaa-022454 10-3 10-4 2.2 V min typ max 6 2.0 V 3 0 Fig. 6. 10-5 VGS = 1.8 V 0 1 2 3 4 VDS (V) 10-6 5 0 0.5 1.0 1.5 Tj = 25 °C Tj = 25 °C; VDS = 5 V Output characteristics: drain current as a Fig. 7. function of drain-source voltage; typical values Subthreshold drain current as a function of gate-source voltage aaa-022455 0.4 1.6 V 2.2 V 2.4 V aaa-022456 0.4 1.8 V RDSon (Ω) RDSon (Ω) 2.5 V 0.3 0.3 0.2 0.2 3V 0.1 0.0 Tj = 150 °C 0.1 VGS = 4.5 V 0 3 6 9 ID (A) Tj = 25 °C 0.0 12 Tj = 25 °C Fig. 8. VGS (V) Product data sheet 3 6 9 VGS (V) 12 ID = 2.9 A Drain-source on-state resistance as a function of drain current; typical values PMDPB95XNE2 0 Fig. 9. Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 7 / 15 PMDPB95XNE2 NXP Semiconductors 30 V, dual N-channel Trench MOSFET aaa-022457 12 aaa-022458 2 ID (A) a 9 1.5 6 1.0 3 0.5 Tj = 150 °C 0 0 1 Tj = 25 °C 2 3 VGS (V) 0 -60 4 VDS > ID × RDSon Fig. 10. Transfer characteristics: drain current as a function of gate-source voltage; typical values VGS(th) (V) 60 120 180 aaa-022460 103 max Tj (°C) Fig. 11. Normalized drain-source on-state resistance as a function of junction temperature; typical values aaa-022459 1.5 0 C (pF) Ciss 1.0 typ 102 min 0.5 Coss Crss 0.0 -60 0 60 120 Tj (°C) 10 10-1 180 ID = 0.25 mA; VDS = VGS Product data sheet 10 VDS (V) 102 f = 1 MHz; VGS = 0 V Fig. 12. Gate-source threshold voltage as a function of junction temperature PMDPB95XNE2 1 Fig. 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 8 / 15 PMDPB95XNE2 NXP Semiconductors 30 V, dual N-channel Trench MOSFET aaa-022461 5 VDS VGS (V) ID 4 VGS(pl) 3 VGS(th) VGS 2 QGS1 QGS2 QGS 1 QGD QG(tot) 017aaa137 0 0 1 2 QG (nC) Fig. 15. Gate charge waveform definitions 3 ID = 2.8 A; VDS = 15 V; Tamb = 25 °C Fig. 14. Gate-source voltage as a function of gate charge; typical values aaa-022463 5 IS (A) 4 3 2 Tj = 150 °C Tj = 25 °C 1 0 0.0 0.4 0.8 VSD (V) 1.2 VGS = 0 V Fig. 16. Source current as a function of source-drain voltage; typical values 11. Test information P t2 duty cycle δ = t1 t2 t1 t 006aaa812 Fig. 17. Duty cycle definition PMDPB95XNE2 Product data sheet All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 9 / 15 PMDPB95XNE2 NXP Semiconductors 30 V, dual N-channel Trench MOSFET 12. Package outline HUSON6: plastic, thermal enhanced ultra thin small outline package; no leads; 6 terminals; body 2 x 2 x 0.65 mm bp (6x) v A B B D SOT1118 A A E A1 terminal 1 index area detail X C terminal 1 index area y1 C e 1 Lp (6x) y 3 (8x) E1 (2x) 6 X 4 D1 (2x) e1 0 1 Dimensions Unit A(1) A1 bp max 0.65 0.04 0.35 nom min 0.25 mm 2 mm scale D D1 E E1 2.1 0.77 2.1 1.1 1.9 0.57 1.9 0.9 e 0.65 e1 Lp 0.54 0.3 0.44 0.2 v 0.1 y y1 0.05 0.05 Note 1. Dimension including plating thickness. Outline version SOT1118 sot1118_po References IEC JEDEC JEITA European projection Issue date 10-08-16 13-06-06 --- Fig. 18. Package outline DFN2020-6 (SOT1118) PMDPB95XNE2 Product data sheet All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 10 / 15 PMDPB95XNE2 NXP Semiconductors 30 V, dual N-channel Trench MOSFET 13. Soldering 2.1 0.65 0.49 0.65 0.49 0.3 0.4 (6×) (6×) solder lands 0.875 1.05 1.15 (2×) (2×) 2.25 0.875 solder paste solder resist occupied area Dimensions in mm 0.35 (6×) 0.72 (2×) 0.45 (6×) 0.82 (2×) sot1118_fr Fig. 19. Reflow soldering footprint for DFN2020-6 (SOT1118) PMDPB95XNE2 Product data sheet All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 11 / 15 PMDPB95XNE2 NXP Semiconductors 30 V, dual N-channel Trench MOSFET 14. Revision history Table 8. Revision history Data sheet ID Release date Data sheet status Change notice Supersedes PMDPB95XNE2 v.2 20160614 Product data sheet - PMDPB95XNE2 v.1 Modifications: • PMDPB95XNE2 v.1 20160419 - - PMDPB95XNE2 Product data sheet Values of ID and RDSon corrected Product data sheet All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. 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Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. 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Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................3 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 6 11 Test information ..................................................... 9 12 Package outline ................................................... 10 13 Soldering .............................................................. 11 14 Revision history ................................................... 12 15 15.1 15.2 15.3 15.4 Legal information .................................................13 Data sheet status ............................................... 13 Definitions ...........................................................13 Disclaimers .........................................................13 Trademarks ........................................................ 14 © NXP Semiconductors N.V. 2016. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 14 June 2016 PMDPB95XNE2 Product data sheet All information provided in this document is subject to legal disclaimers. 14 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 15 / 15