Data Sheet

PSMN1R5-30YL
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
Rev. 01 — 9 April 2010
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in LFPAK package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
 Advanced TrenchMOS provides low
RDSon and low gate charge
 Improved mechanical and thermal
characteristics
 High efficiency gains in switching
power convertors
 LFPAK provides maximum power
density in a Power SO8 package
1.3 Applications
 DC-to-DC converters
 Motor control
 Lithium-ion battery protection
 Server power supplies
 Load switching
1.4 Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max Unit
VDS
drain-source
voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
30
V
ID
drain current
Tmb = 25 °C; VGS = 10 V; see
Figure 1
-
-
100
A
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
-
-
109
W
Tj
junction
temperature
-55
-
175
°C
VGS = 10 V; ID = 15 A;
Tj = 100 °C; see Figure 14
-
-
2.4
mΩ
VGS = 10 V; ID = 15 A;
Tj = 25 °C
-
1.3
1.5
mΩ
-
8.7
-
nC
[1]
Static characteristics
RDSon
drain-source
on-state
resistance
Dynamic characteristics
QGD
gate-drain charge VGS = 4.5 V; ID = 10 A;
VDS = 12 V; see Figure 15; see
Figure 16
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
Table 1.
Quick reference data …continued
Symbol
Parameter
Conditions
Min
Typ
QG(tot)
total gate charge
VGS = 4.5 V; ID = 10 A;
VDS = 12 V; see Figure 15
-
36.2 -
Max Unit
nC
non-repetitive
VGS = 10 V; Tj(init) = 25 °C;
drain-source
ID = 100 A; Vsup ≤ 30 V;
avalanche energy RGS = 50 Ω; unclamped
-
-
mJ
Avalanche ruggedness
EDS(AL)S
[1]
241
Continuous current is limited by package.
2. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
Simplified outline
1
S
source
2
S
source
3
S
source
4
G
gate
mb
D
mounting base; connected to
drain
Graphic symbol
mb
D
G
mbb076
S
1 2 3 4
SOT669 (LFPAK)
3. Ordering information
Table 3.
Ordering information
Type number
PSMN1R5-30YL
PSMN1R5-30YL
Product data sheet
Package
Name
Description
LFPAK
plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669
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Rev. 01 — 9 April 2010
Version
© NXP B.V. 2010. All rights reserved.
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N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
30
V
VDGR
drain-gate voltage
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
-
-
30
V
VGS
gate-source voltage
ID
drain current
-20
-
20
V
VGS = 10 V; Tmb = 100 °C; see Figure 1
[1]
-
-
100
A
VGS = 10 V; Tmb = 25 °C; see Figure 1
[1]
-
-
100
A
IDM
peak drain current
tp ≤ 10 µs; pulsed; Tmb = 25 °C;
see Figure 4
-
-
790
A
Ptot
total power dissipation
Tmb = 25 °C; see Figure 2
-
-
109
W
Tstg
storage temperature
-55
-
175
°C
Tj
junction temperature
-55
-
175
°C
-
-
100
A
-
-
790
A
-
-
-
J
-
-
241
mJ
Source-drain diode
IS
source current
Tmb = 25 °C
ISM
peak source current
tp ≤ 10 µs; pulsed; Tmb = 25 °C
[1]
Avalanche ruggedness
EDS(AL)R
repetitive drain-source
avalanche energy
see Figure 3
EDS(AL)S
non-repetitive
drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; ID = 100 A;
Vsup ≤ 30 V; RGS = 50 Ω; unclamped
[1]
Continuous current is limited by package.
[2]
Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
[3]
Repetitive avalanche rating limited by average junction temperature of 170 °C.
[4]
Refer to application note AN10273 for further information.
PSMN1R5-30YL
Product data sheet
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Rev. 01 — 9 April 2010
[2][3][4]
© NXP B.V. 2010. All rights reserved.
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PSMN1R5-30YL
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N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
003aac446
120
ID
(A)
100
03aa16
120
(1)
Pder
(%)
80
80
60
40
40
20
0
0
0
Fig 1.
50
100
150
0
200
Tmb (°C)
50
100
150
200
Tmb (°C)
Continuous drain current as a function of
mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
003aac266
103
IAL
(A)
102
(1)
(2)
10
(3)
1
10-1
10-3
Fig 3.
10-2
10-1
1 t (ms) 10
AL
Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time
PSMN1R5-30YL
Product data sheet
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N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
003aad111
104
ID
(A)
Limit RDSon = VDS / ID
103
10 μs
102
100 μs
(1)
1 ms
10
DC
10 ms
100 ms
1
10-1
Fig 4.
1
10
102
VDS (V)
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance
from junction to
mounting base
see Figure 5
-
0.5
1.1
K/W
003aac456
10
Zth(j-mb)
(K/W)
1
δ = 0.5
10-1
0.2
0.1
0.05
δ=
P
0.02
tp
T
10-2
single shot
t
tp
T
10-3
10-6
Fig 5.
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN1R5-30YL
Product data sheet
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Rev. 01 — 9 April 2010
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N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
6. Characteristics
Table 6.
Characteristics
Tested to JEDEC standards where applicable.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
ID = 20 A; VGS = 0 V; Tj = 25 °C; tav =
100 ns
35
-
-
V
ID = 250 µA; VGS = 0 V; Tj = 25 °C
30
-
-
V
ID = 250 µA; VGS = 0 V; Tj = -55 °C
27
-
-
V
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 12; see Figure 13
1.3
1.7
2.15
V
ID = 1 mA; VDS = VGS; Tj = 150 °C;
see Figure 13
0.65
-
-
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 13
-
-
2.45
V
VDS = 30 V; VGS = 0 V; Tj = 25 °C
-
-
1
µA
VDS = 30 V; VGS = 0 V; Tj = 150 °C
-
-
100
µA
VGS = 16 V; VDS = 0 V; Tj = 25 °C
-
-
100
nA
VGS = -16 V; VDS = 0 V; Tj = 25 °C
-
-
100
nA
VGS = 4.5 V; ID = 15 A; Tj = 25 °C
-
1.8
1.9
mΩ
VGS = 10 V; ID = 15 A; Tj = 150 °C;
see Figure 14
-
-
2.8
mΩ
VGS = 10 V; ID = 15 A; Tj = 100 °C;
see Figure 14
-
-
2.4
mΩ
VGS = 10 V; ID = 15 A; Tj = 25 °C
-
1.3
1.5
mΩ
f = 1 MHz
-
0.77
1.5
Ω
ID = 10 A; VDS = 12 V; VGS = 10 V;
see Figure 15; see Figure 16
-
77.9
-
nC
ID = 0 A; VDS = 0 V; VGS = 10 V
-
70
-
nC
ID = 10 A; VDS = 12 V; VGS = 4.5 V;
see Figure 15
-
36.2
-
nC
ID = 10 A; VDS = 12 V; VGS = 4.5 V;
see Figure 15; see Figure 16
-
11.6
-
nC
-
8
-
nC
Static characteristics
V(BR)DSS
VGS(th)
IDSS
drain-source
breakdown voltage
gate-source threshold
voltage
drain leakage current
IGSS
gate leakage current
RDSon
drain-source on-state
resistance
RG
gate resistance
Dynamic characteristics
QG(tot)
total gate charge
QGS
gate-source charge
QGS(th)
pre-threshold
gate-source charge
QGS(th-pl)
post-threshold
gate-source charge
-
3.6
-
nC
QGD
gate-drain charge
-
8.7
-
nC
VGS(pl)
gate-source plateau
voltage
VDS = 12 V; see Figure 15;
see Figure 16
-
2.34
-
V
Ciss
input capacitance
-
5057
-
pF
Coss
output capacitance
VDS = 12 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 17
-
1082
-
pF
Crss
reverse transfer
capacitance
-
398
-
pF
PSMN1R5-30YL
Product data sheet
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N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
Table 6.
Characteristics …continued
Tested to JEDEC standards where applicable.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
td(on)
turn-on delay time
-
46
-
ns
tr
rise time
VDS = 12 V; RL = 0.5 Ω; VGS = 4.5 V;
RG(ext) = 4.7 Ω
-
72
-
ns
td(off)
turn-off delay time
-
76
-
ns
tf
fall time
-
34
-
ns
-
0.78
1.2
V
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 18
trr
reverse recovery time
Qr
recovered charge
IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
VDS = 20 V
003aac449
300
ID
4
(A)
10 3.6
250
-
45
-
ns
-
56
-
nC
003aac450
5
RDSon
(mΩ)
VGS (V) = 3.2
3.4
4
VGS (V) = 3.4
200
3
150
3.6
3
4
2.8
100
2
2.6
7
50
2.4
2.2
0
0
Fig 6.
2
4
6
10
1
8
VDS (V)
10
Output characteristics: drain current as a
function of drain-source voltage; typical values
PSMN1R5-30YL
Product data sheet
0
Fig 7.
50
100
150
200
ID (A)
250
Drain-source on-state resistance as a function
of drain current; typical values
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PSMN1R5-30YL
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N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
003aac452
200
003aac455
8000
Ciss
gfs
(S)
C
(pF)
150
6000
100
4000
Crss
50
2000
0
0
Fig 8.
20
40
60
Forward transconductance as a function of
drain current; typical values
003aac451
3.0
0
ID (A) 80
2
Fig 9.
4
6
8
VGS (V)
10
Input and reverse transfer capacitances as a
function of gate-source voltage; typical values
003aad113
80
ID
(A)
RDSon
(mΩ)
2.5
60
2.0
40
Tj = 175 °C
Tj = 25 °C
1.5
20
1.0
0
2
4
6
8
VGS (V)
10
Fig 10. Drain-source on-state resistance as a function
of gate-source voltage; typical values
PSMN1R5-30YL
Product data sheet
0
1
2
3
VGS (V) 4
Fig 11. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
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PSMN1R5-30YL
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N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
003aab271
10-1
003a a c982
3
ID
(A)
10-2
VGS (th)
(V)
min
typ
max
max
2
10-3
typ
min
10-4
1
10-5
10-6
0
1
2
VGS (V)
3
Fig 12. Sub-threshold drain current as a function of
gate-source voltage
0
-60
0
60
120
Tj (°C)
180
Fig 13. Gate-source threshold voltage as a function of
junction temperature
03aa27
2
VDS
a
ID
1.5
VGS(pl)
VGS(th)
1
VGS
QGS1
0.5
QGS2
QGS
QGD
QG(tot)
003aaa508
0
−60
0
60
120
Tj (°C)
180
Fig 14. Normalized drain-source on-state resistance
factor as a function of junction temperature
PSMN1R5-30YL
Product data sheet
Fig 15. Gate charge waveform definitions
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Rev. 01 — 9 April 2010
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PSMN1R5-30YL
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N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
003aac448
10
VGS
(V)
003aac454
6000
Ciss
C
(pF)
8
Coss
4000
6
VDS = 12 (V)
VDS = 19 (V)
4
2000
Crss
2
0
10-1
0
0
20
40
60
QG (nC)
80
Fig 16. Gate-source voltage as a function of gate
charge; typical values
1
10
VDS (V)
102
Fig 17. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
003aac447
100
IS
(A)
80
60
40
Tj = 150 °C
20
25 °C
0
0.0
0.2
0.4
0.6
0.8
1.0
VSD (V)
Fig 18. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values
PSMN1R5-30YL
Product data sheet
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N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
7. Package outline
Plastic single-ended surface-mounted package (LFPAK); 4 leads
A2
A
E
SOT669
C
c2
b2
E1
b3
L1
mounting
base
b4
D1
D
H
L2
1
2
3
e
4
w M A
b
1/2
X
c
e
A
(A 3)
A1
C
θ
L
detail X
y C
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
A2
A3
b
b2
1.20 0.15 1.10
0.50 4.41
0.25
1.01 0.00 0.95
0.35 3.62
mm
b3
b4
2.2
2.0
0.9
0.7
c
D (1)
c2
D1(1)
E(1) E1(1)
max
0.25 0.30 4.10
4.20
0.19 0.24 3.80
5.0
4.8
3.3
3.1
e
H
L
L1
L2
w
y
θ
1.27
6.2
5.8
0.85
0.40
1.3
0.8
1.3
0.8
0.25
0.1
8°
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
SOT669
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
04-10-13
06-03-16
MO-235
Fig 19. Package outline SOT669 (LFPAK)
PSMN1R5-30YL
Product data sheet
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N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PSMN1R5-30YL_1
20100409
Product data sheet
-
-
PSMN1R5-30YL
Product data sheet
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9. Legal information
9.1
Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term 'short data sheet' is explained in section "Definitions".
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
9.3
Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
PSMN1R5-30YL
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on a weakness or default in the
customer application/use or the application/use of customer’s third party
customer(s) (hereinafter both referred to as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Application planned. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and the
product. NXP Semiconductors does not accept any liability in this respect.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in the
Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
All information provided in this document is subject to legal disclaimers.
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PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PSMN1R5-30YL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 9 April 2010
© NXP B.V. 2010. All rights reserved.
14 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
11. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits . . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
Ordering information . . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . .12
Legal information. . . . . . . . . . . . . . . . . . . . . . . .13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Contact information. . . . . . . . . . . . . . . . . . . . . .14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 9 April 2010
Document identifier: PSMN1R5-30YL