D2 PA K PSMNR90-30BL N-channel 30 V 1.0 mΩ logic level MOSFET in D2PAK 2 April 2014 Product data sheet 1. General description Logic level N-channel MOSFET in D2PAK package qualified to 175 °C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 2. Features and benefits • • High efficiency due to low switching and conduction losses Suitable for logic level gate drive sources 3. Applications • • • • DC-to-DC converters Load switiching Motor control Server power supplies 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 30 V ID drain current Tmb = 25 °C; VGS = 10 V; Fig. 2 - - 120 A Ptot total power dissipation Tmb = 25 °C; Fig. 1 - - 306 W Tj junction temperature -55 - 175 °C - 0.89 1 mΩ - 1.19 1.5 mΩ [1] Static characteristics RDSon drain-source on-state resistance VGS = 10 V; ID = 25 A; Tj = 25 °C; Fig. 12 VGS = 10 V; ID = 25 A; Tj = 100 °C; Fig. 13; Fig. 12 Dynamic characteristics QGD QG(tot) gate-drain charge VGS = 4.5 V; ID = 75 A; VDS = 15 V; - 37 - nC total gate charge Fig. 14; Fig. 15 - 118 - nC Scan or click this QR code to view the latest information for this product PSMNR90-30BL NXP Semiconductors N-channel 30 V 1.0 mΩ logic level MOSFET in D2PAK Symbol Parameter Conditions Min Typ Max Unit VGS = 10 V; Tj(init) = 25 °C; ID = 120 A; - - 1.9 J Avalanche ruggedness EDS(AL)S non-repetitive drainsource avalanche energy [1] Vsup ≤ 30 V; RGS = 50 Ω; unclamped Continuous current is limited by package. 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 G gate 2 D drain[1] 3 S source mb D mounting base; connected to drain Graphic symbol mb D G mbb076 2 1 S 3 D2PAK (SOT404) [1] It is not possible to make connection to pin 2 6. Ordering information Table 3. Ordering information Type number Package PSMNR90-30BL Name Description Version D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404 (one lead cropped) 7. Marking Table 4. Marking codes Type number Marking code PSMNR90-30BL PSMNR90-30BL 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 30 V VDGR drain-gate voltage Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ - 30 V PSMNR90-30BL Product data sheet All information provided in this document is subject to legal disclaimers. 2 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 2 / 13 PSMNR90-30BL NXP Semiconductors N-channel 30 V 1.0 mΩ logic level MOSFET in D2PAK Symbol Parameter Conditions VGS gate-source voltage Ptot total power dissipation Tmb = 25 °C; Fig. 1 ID drain current VGS = 10 V; Tmb = 100 °C; Fig. 2 VGS = 10 V; Tmb = 25 °C; Fig. 2 Min Max Unit -20 20 V - 306 W [1] - 120 A [1] - 120 A - 1573 A IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3 Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C - 120 A Source-drain diode IS source current Tmb = 25 °C ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 1573 A VGS = 10 V; Tj(init) = 25 °C; ID = 120 A; - 1.9 J [1] Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy [1] Vsup ≤ 30 V; RGS = 50 Ω; unclamped Continuous current is limited by package. 03aa16 120 003a a f774 5 00 ID (A) Pder (%) 4 00 80 3 00 2 00 40 (1) 1 00 0 Fig. 1. 0 50 100 150 Tmb (°C) Normalized total power dissipation as a function of mounting base temperature PSMNR90-30BL Product data sheet 0 200 Fig. 2. 0 10 0 150 200 Tmb ( C) Continuous drain current as a function of mounting base temperature. All information provided in this document is subject to legal disclaimers. 2 April 2014 50 © NXP Semiconductors N.V. 2014. All rights reserved 3 / 13 PSMNR90-30BL NXP Semiconductors N-channel 30 V 1.0 mΩ logic level MOSFET in D2PAK 003a a f773 104 ID (A) 103 tp =10 ms Limit R DS on = VDS / ID 100 ms 102 1 ms DC 10 10 ms 100 ms 1 10-1 10-1 Fig. 3. 1 10 102 V DS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Fig. 4 - 0.22 0.49 K/W Rth(j-a) thermal resistance from junction to ambient minimum footprint; mounted on a printed-circuit board - 50 - K/W 003aaf772 1 Zth(j-mb) (K/W) 10-1 δ = 0.5 0.2 0.1 0.05 10-2 P 0.02 single shot 10 tp -3 Fig. 4. 10-6 δ= 10-5 10-4 10-3 10-2 10-1 tp T t T tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration; typical values PSMNR90-30BL Product data sheet All information provided in this document is subject to legal disclaimers. 2 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 4 / 13 PSMNR90-30BL NXP Semiconductors N-channel 30 V 1.0 mΩ logic level MOSFET in D2PAK 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 30 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 27 - - V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; 1.3 1.7 2.2 V 0.65 - - V - - 2.5 V VDS = 30 V; VGS = 0 V; Tj = 25 °C - 0.02 10 µA VDS = 30 V; VGS = 0 V; Tj = 175 °C - - 500 µA VGS = 16 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = -16 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = 10 V; ID = 25 A; Tj = 25 °C; - 0.89 1 mΩ - 1.1 1.4 mΩ - 1.65 2 mΩ - 1.19 1.5 mΩ f = 1 MHz - 1.1 - Ω ID = 75 A; VDS = 15 V; VGS = 10 V; - 243 - nC ID = 0 A; VDS = 0 V; VGS = 10 V - 222 - nC ID = 75 A; VDS = 15 V; VGS = 4.5 V; - 118 - nC Fig. 14; Fig. 15 - 39 - nC Static characteristics V(BR)DSS VGS(th) Fig. 10; Fig. 11 ID = 1 mA; VDS = VGS; Tj = 175 °C; Fig. 11 ID = 1 mA; VDS = VGS; Tj = -55 °C; Fig. 11 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance Fig. 12 VGS = 4.5 V; ID = 25 A; Tj = 25 °C; Fig. 12 VGS = 10 V; ID = 25 A; Tj = 175 °C; Fig. 13; Fig. 12 VGS = 10 V; ID = 25 A; Tj = 100 °C; Fig. 13; Fig. 12 RG gate resistance Dynamic characteristics QG(tot) total gate charge Fig. 14; Fig. 15 QGS gate-source charge QGS(th) pre-threshold gatesource charge - 22 - nC QGS(th-pl) post-threshold gatesource charge - 17 - nC QGD gate-drain charge - 37 - nC VGS(pl) gate-source plateau voltage - 2.8 - V PSMNR90-30BL Product data sheet ID = 75 A; VDS = 15 V; Fig. 14; Fig. 15 All information provided in this document is subject to legal disclaimers. 2 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 5 / 13 PSMNR90-30BL NXP Semiconductors N-channel 30 V 1.0 mΩ logic level MOSFET in D2PAK Symbol Parameter Conditions Min Typ Ciss input capacitance VDS = 15 V; VGS = 0 V; f = 1 MHz; - 14850 - pF Coss output capacitance Tj = 25 °C; Fig. 16 - 2799 - pF Crss reverse transfer capacitance - 1215 - pF td(on) turn-on delay time - 95 - ns - 213 - ns VDS = 15 V; RL = 0.2 Ω; VGS = 5 V; Max Unit RG(ext) = 5 Ω; ID = 75 A; Tj = 25 °C tr rise time VDS = 15 V; RL = 0.2 Ω; VGS = 5 V; RG(ext) = 5 Ω; Tj = 25 °C; ID = 75 A td(off) tf turn-off delay time VDS = 15 V; RL = 0.2 Ω; VGS = 5 V; - 199 - ns fall time RG(ext) = 5 Ω; ID = 75 A; Tj = 25 °C - 115 - ns Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 17 - 0.8 1.2 V trr reverse recovery time IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; - 67 - ns recovered charge VDS = 15 V - 123 - nC Qr 003aaf762 300 003aaf766 105 gfs (S) C (pF) 240 C iss 180 Crss 104 120 60 0 Fig. 5. 0 20 40 60 ID (A) Forward transconductance as a function of drain current; typical values PSMNR90-30BL Product data sheet 103 10-1 80 Fig. 6. 10 VGS (V) 102 Input and reverse transfer capacitances as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. 2 April 2014 1 © NXP Semiconductors N.V. 2014. All rights reserved 6 / 13 PSMNR90-30BL NXP Semiconductors N-channel 30 V 1.0 mΩ logic level MOSFET in D2PAK 003aaf764 5 ID (A) RDSon (mΩ ) 4 60 3 45 2 30 1 15 0 Fig. 7. 003aaf763 75 0 4 8 12 VGS (V) 0 16 Drain-source on-state resistance as a function of gate-source voltage; typical values Fig. 8. 003aad011 300 ID (A) 250 10 0 0.6 1.2 Tj = 25 ° C 1.8 2.4 V GS (V) 3 Transfer characteristics: drain current as a function of gate-source voltage; typical values 003aab271 10-1 3 4.5 3.5 Tj = 175 ° C ID (A) 10-2 200 10-3 2.8 min typ 1 2 max 150 10-4 100 2.6 10-5 50 0 Fig. 9. VGS (V) = 2.4 0 2 4 6 8 VDS (V) 10-6 10 0 VGS (V) 3 Output characteristics: drain current as a Fig. 10. Sub-threshold drain current as a function of function of drain-source voltage; typical values gate-source voltage PSMNR90-30BL Product data sheet All information provided in this document is subject to legal disclaimers. 2 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 7 / 13 PSMNR90-30BL NXP Semiconductors N-channel 30 V 1.0 mΩ logic level MOSFET in D2PAK 003a a c982 3 VGS (th) (V) 003aag668 10 RDSon (mΩ) 8 max 2 2.8 2.6 VGS (V) = 3 6 typ min 4 1 4.5 2 0 -60 0 60 120 Tj (°C) 0 180 Fig. 11. Gate-source threshold voltage as a function of junction temperature 3.5 10 0 100 200 ID (A) 300 Fig. 12. Drain-source on-state resistance as a function of drain current; typical values 003a a f767 2 VDS a ID 1.5 VGS(pl) VGS(th) 1 VGS QGS1 0.5 QGS2 QGS QGD QG(tot) 003aaa508 0 -60 0 60 120 Tj ( C) Fig. 14. Gate charge waveform definitions 180 Fig. 13. Normalized drain-source on-state resistance factor as a function of junction temperature PSMNR90-30BL Product data sheet All information provided in this document is subject to legal disclaimers. 2 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 8 / 13 PSMNR90-30BL NXP Semiconductors N-channel 30 V 1.0 mΩ logic level MOSFET in D2PAK 003aaf768 10 003aaf769 105 V GS (V) 8 C (pF) 24V 15V 6 Ciss 104 VDS = 6V Coss 4 Crss 103 2 0 0 100 200 102 10-1 QG (nC) 300 Fig. 15. Gate-source voltage as a function of gate charge; typical values 1 10 V DS (V) 102 Fig. 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values 003aaf770 75 IS (A) 60 45 30 Tj = 175 ° C 15 0 0 0.2 0.4 Tj = 25 °C 0.6 0.8 VSD (V) 1 Fig. 17. Source current as a function of source-drain voltage; typical values PSMNR90-30BL Product data sheet All information provided in this document is subject to legal disclaimers. 2 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 9 / 13 PSMNR90-30BL NXP Semiconductors N-channel 30 V 1.0 mΩ logic level MOSFET in D2PAK 11. Package outline Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) SOT404 A A1 E mounting base D1 D HD 2 Lp 1 3 b2 c b e e Q 0 5 mm scale Dimensions (mm are the original dimensions) Unit max nom min mm A A1 b b2 c 4.5 1.40 0.85 1.45 0.64 4.1 1.27 0.60 1.05 0.46 D D1 E 11 1.6 10.3 1.2 9.7 e 2.54 HD Lp Q 15.8 2.9 2.6 14.8 2.1 2.2 sot404_po Outline version References IEC JEDEC JEITA European projection Issue date 06-03-16 13-02-25 SOT404 Fig. 18. Package outline D2PAK (SOT404) PSMNR90-30BL Product data sheet All information provided in this document is subject to legal disclaimers. 2 April 2014 © NXP Semiconductors N.V. 2014. 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Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the All information provided in this document is subject to legal disclaimers. 2 April 2014 © NXP Semiconductors N.V. 2014. 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Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................2 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 5 11 Package outline ................................................... 10 12 12.1 12.2 12.3 12.4 Legal information .................................................11 Data sheet status ............................................... 11 Definitions ...........................................................11 Disclaimers .........................................................11 Trademarks ........................................................ 12 © NXP Semiconductors N.V. 2014. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 2 April 2014 PSMNR90-30BL Product data sheet All information provided in this document is subject to legal disclaimers. 2 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 13 / 13