NVTFS4C05N D

NVTFS4C05N
Power MOSFET
30 V, 3.6 mW, 102 A, Single N−Channel,
m8FL
Features
•
•
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
NVTFS4C05NWF − Wettable Flanks Product
NVT Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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V(BR)DSS
RDS(on) MAX
3.6 mW @ 10 V
30 V
102 A
5.1 mW @ 4.5 V
N−Channel MOSFET
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol
D (5−8)
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
22
A
Continuous Drain
Current RqJA
(Notes 1, 2, 4)
Power Dissipation RqJA
(Notes 1, 2, 4)
Continuous Drain
Current RyJC
(Notes 1, 3, 4)
TA = 25°C
TA = 100°C
TA = 25°C
Steady
State
Pulsed Drain Current
PD
3.2
ID
102
TA = 100°C
TC = 25°C
Operating Junction and Storage Temperature
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
1
PD
68
IDM
433
W
A
TJ,
Tstg
−55 to
+175
°C
IS
65
A
EAS
88
mJ
TL
260
°C
34
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche Energy
(TJ = 25°C, VGS = 10 V, IL = 18.8 A, L = 0.5 mH)
MARKING DIAGRAM
A
72
TC = 100°C
TA = 25°C, tp = 10 ms
S (1,2,3)
W
1.6
TC = 100°C
Power Dissipation
RyJC (Notes 1, 3, 4)
4C05
A
Y
WW
G
1
S
S
S
G
XXXX
AYWWG
G
D
D
D
D
= Specific Device Code for
NVMTS4C05N
= Specific Device Code of
NVTFS4C05NWF
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
WDFN8
(m8FL)
CASE 511AB
05WF
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
Parameter
G (4)
15.7
TC = 25°C
ID MAX
Value
Unit
°C/W
Junction−to−Case (Drain) (Notes 1, 3)
RyJC
2.2
Junction−to−Ambient – Steady State
(Notes 1, 2)
RqJA
47
See detailed ordering, marking and shipping information on
page 5 of this data sheet.
1. The entire application environment impacts the thermal resistance values
shown; they are not constants and are valid for the specific conditions noted.
2. Surface−mounted on FR4 board using 650 mm2, 2 oz. Cu Pad.
3. Assumes heat−sink sufficiently large to maintain constant case temperature
independent of device power.
4. Continuous DC current rating. Maximum current for pulses as long as one
second is higher but dependent on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2014
July, 2014 − Rev. 2
1
Publication Order Number:
NVTFS4C05N/D
NVTFS4C05N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
V
11.7
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25°C
1.0
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
±100
mA
nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Threshold Temperature Coefficient
Drain−to−Source On Resistance
VGS(TH)/TJ
RDS(on)
1.3
2.2
−5.0
V
mV/°C
VGS = 10 V
ID = 30 A
2.9
3.6
VGS = 4.5 V
ID = 30 A
4.1
5.1
mW
Forward Transconductance
gFS
VDS = 1.5 V, ID = 15 A
68
S
Gate Resistance
RG
TA = 25°C
1.0
W
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
1988
VGS = 0 V, f = 1 MHz, VDS = 15 V
1224
VGS = 0 V, VDS = 15 V, f = 1 MHz
0.036
CRSS
pF
71
Capacitance Ratio
CRSS/CISS
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
5.5
Gate Plateau Voltage
VGP
3.1
V
31
nC
Total Gate Charge
14.5
2.9
VGS = 4.5 V, VDS = 15 V; ID = 30 A
QG(TOT)
VGS = 10 V, VDS = 15 V; ID = 30 A
nC
5.2
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
11
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
30
tf
8.0
td(ON)
8.0
tr
td(OFF)
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
ns
20
25
ns
26
5.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
VSD
VGS = 0 V,
IS = 10 A
TJ = 25°C
0.77
TJ = 125°C
0.62
tRR
ta
tb
1.1
V
42.4
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
QRR
21.1
21.3
34.4
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
ns
nC
NVTFS4C05N
0.028
0.026
0.024
0.022
0.020
0.018
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
3.0
TJ = 25°C
3.8 V
3.6 V
4 V to 6.5 V
ID, DRAIN CURRENT (A)
140
130 10 V
120
110
100
90
80
70
60
50
40
30
20
10
0
0
3.4 V
3.2 V
3.0 V
2.8 V
2.6 V
1
2
3
5
4
140
130 VDS = 5 V
120
110
100
90
80
70
60
50
40
30
20
10
0
0
0.5 1.0
2.0
2.5
3.0
3.5
4.0
Figure 2. Transfer Characteristics
ID = 30 A
TJ = 25°C
4.0
5.0
6.0
7.0
8.0
9.0
10
4.5
0.008
TJ = 25°C
0.007
0.006
0.005
VGS = 4.5 V
0.004
VGS = 10 V
0.003
0.002
10
20
30
40
50
60
70
ID, DRAIN CURRENT (A)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
10000
1.9
VGS = 0 V
ID = 30 A
VGS = 10 V
TJ = 150°C
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = −55°C
1.5
Figure 1. On−Region Characteristics
Figure 3. On−Resistance vs. VGS
1.7
1.6
1.5
TJ = 25°C
VGS, GATE−TO−SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
1.8
TJ = 125°C
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (A)
TYPICAL CHARACTERISTICS
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
−50 −25
1000
TJ = 125°C
100
TJ = 85°C
10
0
25
50
75
100
125
150
175
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
30
NVTFS4C05N
TYPICAL CHARACTERISTICS
VGS = 0 V
TJ = 25°C
2750
2500
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
3000
2250
Ciss
2000
1750
1500
1250
1000
Coss
750
500
250
0
Crss
0
5
10
15
20
25
30
QT
8
6
4
Qgd
Qgs
TJ = 25°C
VDD = 15 V
VGS = 10 V
ID = 30 A
2
0
0
4
8
12
16
20
24
28
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
32
20
1000
VDD = 15 V
ID = 15 A
VGS = 10 V
IS, SOURCE CURRENT (A)
18
td(off)
td(on)
100
tr
tf
10
VGS = 0 V
16
14
12
10
8
6
4
TJ = 125°C
TJ = 25°C
2
1
1
10
0
0.4
100
0.5
0.6
0.7
0.8
0.9
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
ID, DRAIN CURRENT (A)
t, TIME (ns)
10
100
0.01 ms
10
1
0.1 ms
VGS = 10 V
TC = 25°C
RDS(on) Limit
Thermal Limit
Package Limit
1 ms
dc
0.1
0.1
1
10 ms
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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4
100
1.0
NVTFS4C05N
TRANSIENT THERMAL RESISTANCE (°C/W)
TYPICAL CHARACTERISTICS
100
Duty Cycle = 50%
10 20%
10%
5%
1
2%
1%
RyJC Single Pulse
RqJA Single Pulse
yJC, Infinite Heat Sink Assumption
qJA, 650 mm2, 2 oz Cu Pad, Single
Layer on FR4
0.1
0.01
0.000001
0.00001
0.0001
0.001
0.1
0.01
1
10
100
1000
t, PULSE TIME (s)
Figure 12. Thermal Response
120
1000
IPEAK, DRAIN CURRENT (A)
100
GFS (S)
80
60
40
20
0
100
TJ(initial) = 25°C
TJ(initial) = 85°C
10
1
0
20
10
30
40
50
60
70
80
0.000001
0.00001
0.0001
ID (A)
TAV, TIME IN AVALANCHE (s)
Figure 13. GFS vs. ID
Figure 14. Avalanche Characteristics
0.001
ORDERING INFORMATION
Package
Shipping†
NVTFS4C05NTAG
WDFN8
(Pb−Free)
1500 / Tape & Reel
NVTFS4C05NWFTAG
WDFN8
(Pb−Free)
1500 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NVTFS4C05N
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511AB
ISSUE D
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
0.20 C
D
A
B
D1
2X
0.20 C
8 7 6 5
4X
q
E1 E
c
1 2 3 4
A1
TOP VIEW
0.10 C
A
0.10 C
SIDE VIEW
0.10
8X b
C A B
0.05
C
4X
DETAIL A
6X
C
e
SEATING
PLANE
DETAIL A
8X
e/2
L
0.42
4
INCHES
NOM
0.030
−−−
0.012
0.008
0.130 BSC
0.116
0.120
0.078
0.083
0.130 BSC
0.116
0.120
0.058
0.063
0.009
0.012
0.026 BSC
0.012
0.016
0.026
0.032
0.012
0.017
0.002
0.005
0.055
0.059
0_
−−−
MIN
0.028
0.000
0.009
0.006
0.65
PITCH
PACKAGE
OUTLINE
K
MAX
0.031
0.002
0.016
0.010
0.124
0.088
0.124
0.068
0.016
0.020
0.037
0.022
0.008
0.063
12 _
4X
0.66
M
E3
8
G
MILLIMETERS
MIN
NOM
MAX
0.80
0.70
0.75
0.00
−−−
0.05
0.23
0.30
0.40
0.15
0.20
0.25
3.30 BSC
2.95
3.05
3.15
1.98
2.11
2.24
3.30 BSC
2.95
3.05
3.15
1.47
1.60
1.73
0.23
0.30
0.40
0.65 BSC
0.30
0.41
0.51
0.65
0.80
0.95
0.30
0.43
0.56
0.06
0.13
0.20
1.40
1.50
1.60
0_
−−−
12 _
SOLDERING FOOTPRINT*
1
E2
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
E3
e
G
K
L
L1
M
q
5
D2
BOTTOM VIEW
3.60
L1
0.75
2.30
0.57
0.47
2.37
3.46
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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NVTFS4C05N/D