TFF1017HN/N1 Integrated mixer oscillator PLL for satellite LNB Rev. 1 — 12 September 2011 Product data sheet 1. General description The TFF1017HN/N1 is an integrated downconverter for use in Low Noise Block (LNB) convertors in a 10.7 GHz to 12.75 GHz Ku band satellite receiver system. 2. Features and benefits Low current consumption integrated pre-amplifier, mixer, buffer amplifier and PLL synthesizer Flat gain over frequency Single 5 V supply pin Low cost 25 MHz crystal Crystal controlled LO frequency generation Switched LO frequency (9.75 GHz and 10.6 GHz) Low phase noise Low spurious Low external component count Alignment-free concept ESD protection on all pins 3. Applications Ku band LNB converters for digital satellite reception (DVB-S / DVB-S2) 4. Quick reference data Table 1. Quick reference data VCC = 5 V; Tamb = 25 C; fLO = 9.75 GHz or 10.6 GHz; fxtal = 25 MHz; Z0 = 50 unless otherwise specified. Symbol Parameter Min Typ Max Unit 4.5 5 5.5 V RF input and IF output AC coupled - 52 - mA single sideband noise figure measured at low band fIF = 1450 MHz and high band fIF = 1625 MHz - 7 - dB RF input frequency low band 10.7 - 11.7 GHz high band 11.7 - 12.75 GHz measured at low band fIF = 1450 MHz and high band fIF = 1625 MHz - - VCC supply voltage ICC supply current NFSSB fi(RF) Gconv conversion gain Conditions 42 dB TFF1017HN/N1 NXP Semiconductors Integrated mixer oscillator PLL for satellite LNB Table 1. Quick reference data …continued VCC = 5 V; Tamb = 25 C; fLO = 9.75 GHz or 10.6 GHz; fxtal = 25 MHz; Z0 = 50 unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit s11 input reflection coefficient fRF = 10.7 GHz to 12.7 GHz - 10 - dB s22 output reflection coefficient fIF_OUT = 950 MHz to 2150 MHz; Z0 = 75 - 10 - dB IP3O output third-order intercept point carrier power is 10 dBm (measured at output) - 15 dBm - 5. Ordering information Table 2. Ordering information Type number TFF1017HN/N1 Package Name Description Version DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;16 terminals; body 2.5 3.5 0.85 mm SOT763-1 6. Block diagram RF_GND1 n.c. RF RF_GND2 RF_GND3 VCC GND1 n.c. VREG LF XO1 XO2 2 3 14 IF 4 15 IF_GND 13 5 GND2 1 16 internal supplies and bias ON-CHIP REGULATOR 6 7 9 8 12 11 PFD CHARGE PUMP DIVIDER 10 aaa-000007 HB Fig 1. TFF1017HN1_N1 Product data sheet TFF1017HN/N1 block diagram All information provided in this document is subject to legal disclaimers. Rev. 1 — 12 September 2011 © NXP B.V. 2011. All rights reserved. 2 of 12 TFF1017HN/N1 NXP Semiconductors Integrated mixer oscillator PLL for satellite LNB 7. Functional diagram VCC RF I XO1 PLL XO2 9.75 GHz/10.6 GHz HB Fig 2. aaa-00000 Functional diagram 8. Pinning information 1 terminal 1 index area 16 VCC RF_GND3 8.1 Pinning 3 14 IF RF 4 13 GND2 RF_GND2 5 12 XO1 GND1 6 11 XO2 n.c. 7 10 HB 9 n.c. VREG 15 IF_GND 8 2 LF RF_GND1 aaa-000009 Transparent top view Fig 3. Pin configuration 8.2 Pin description Table 3. Pin description Symbol Pin Description GND 0 ground (exposed die pad) RF_GND3 1 RF ground. Connect this pin to the exposed die pad landing. RF_GND1 2 RF ground. Connect this pin to the exposed die pad landing and the RF input CPW line. n.c. 3 not connected. Connect to RF on PCB. [1] RF 4 RF input. RF_GND2 5 RF ground. Connect this pin to the exposed die pad landing and the RF input CPW line. TFF1017HN1_N1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 12 September 2011 © NXP B.V. 2011. All rights reserved. 3 of 12 TFF1017HN/N1 NXP Semiconductors Integrated mixer oscillator PLL for satellite LNB Table 3. Pin description …continued Symbol Pin Description GND1 6 Ground. Connect this pin to the exposed die pad landing and the RF input CPW line. n.c. 7 not connected. Use this pin to route the ground layer on top of the PCB to the exposed die pad. LF 8 Loop filter PLL. Connect loop filter between this pin and VREG (pin 9). VREG 9 Regulated output voltage for VCO loop filter. Connect loop filter to this pin. Decouple against die pad via pin 7. HB 10 High band / low band selection. Connect this pin to the tone detector or to a logic signal. XO2 11 Crystal connection 2. Connect crystal between this pin and XO1 (pin 12). XO1 12 Crystal connection 1. Connect crystal between this pin and XO2 (pin 11). GND2 13 Ground. Connect this pin to the exposed die pad landing. IF 14 IF output IF_GND 15 IF output ground. Connect this pin to the exposed die pad landing and the output transmission line ground. VCC 16 Supply voltage [1] The distance between the outer edges of pin 2 and pin 3 is 740 m. This gives an optimum transition from a 1.1 mm wide, Z0 = 50 line on RO4223 Printed-Circuit Board (PCB) material of 0.5 mm height to the TFF1017HN/N1. 9. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VCC VI(HB) Tstg Conditions Min Max Unit supply voltage 0.5 +6 V input voltage on pin HB 0.5 +6 V storage temperature 40 +125 C 10. Recommended operating conditions Table 5. Operating conditions Symbol Parameter VCC supply voltage Conditions Min Typ Max Unit 4.5 5 5.5 V VI(HB) input voltage on pin HB 0 - 5.5 V Tamb ambient temperature 40 +25 +85 C Z0 characteristic impedance - 50 - fi(RF) RF input frequency low band 10.7 - 11.7 GHz high band 11.7 - 12.75 GHz fLO LO frequency low band - 9.75 - GHz - 10.6 - GHz 0.95 - 1.95 GHz high band low band [1] fo(IF) IF output frequency 1.1 - 2.15 GHz CL(xtal) crystal load capacitance - 10 - pF ESR equivalent series resistance - - 40 fxtal crystal frequency - 25 - MHz high band [1] For a 10.75 GHz LO frequency, select high band and use a crystal with frequency 10.75 GHz / 424 = 25.353774 MHz. TFF1017HN1_N1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 12 September 2011 © NXP B.V. 2011. All rights reserved. 4 of 12 TFF1017HN/N1 NXP Semiconductors Integrated mixer oscillator PLL for satellite LNB 11. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Rth(j-c) thermal resistance from junction to case Typ Unit 35 K/W 12. Characteristics Table 7. Characteristics VCC = 5 V; Tamb = 25 C; fLO = 9.75 GHz or 10.6 GHz; fxtal = 25 MHz; Z0 = 50 unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit ICC supply current RF input and IF output AC coupled - 52 - mA n(itg) integrated phase noise density integration offset frequency = 10 kHz to 13 MHz; loop bandwidth = crossover bandwidth - 1.5 - RMS NFSSB single sideband noise figure measured at low band fIF = 1450 MHz and high band fIF = 1625 MHz - 7 - dB Gconv conversion gain measured at low band fIF = 1450 MHz and high band fIF = 1625 MHz - 42 - dB Gconv conversion gain variation over whole IF band - 1.4 - dB in every 36 MHz band - 0.5 - dB s11 input reflection coefficient fRF = 10.7 GHz to 12.7 GHz - 10 - dB s22 output reflection coefficient fIF_OUT = 950 MHz to 2150 MHz; Z0 = 75 - 10 - dB IP3O output third-order intercept point carrier power is 10 dBm (measured at the output) - 15 - dBm PL(1dB) output power at 1 dB gain compression - 6 - dBm VIL(HB) low level input voltage on pin HB - - 0.8 V VIH(HB) high level input voltage on pin HB 2.0 - - V Rpd(HB) pull down resistance on pin HB 80 110 140 [1] k DC values. TFF1017HN1_N1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 12 September 2011 © NXP B.V. 2011. All rights reserved. 5 of 12 TFF1017HN/N1 NXP Semiconductors Integrated mixer oscillator PLL for satellite LNB 13. Application information 5V pHemt bias V/T detector DV DH GV D2 G2 GH LB DH RF_GND1 n.c. RF H RF_GND2 V GND1 G2 D2 1 μF n.c. VCC 1 16 2 15 3 14 4 13 5 12 6 11 7 10 IF_GND IF IF 100 pF GND2 XO1 XO2 25 MHz crystal HB 9 LF VREG 8 GV 9 V ~ 21 V HB RF_GND3 GH 5 V LINEAR REGULATOR DV 220 pF 100 nF 330 Ω 1 μF aaa-000010 Fig 4. Application diagram of TFF1017HN/N1 Table 8. List of netnames See Figure 4. TFF1017HN1_N1 Product data sheet Netname Description GH Gate voltage of 1st stage LNA. Horizontal polarization DH Drain voltage of 1st stage LNA. Horizontal polarization GV Gate voltage of 1st stage LNA. Vertical polarization DV Drain voltage of 1st stage LNA. Vertical polarization G2 Gate voltage of 2nd stage LNA D2 Drain voltage of 2nd stage LNA HB High band oscillator supply control LB Low band oscillator supply control All information provided in this document is subject to legal disclaimers. Rev. 1 — 12 September 2011 © NXP B.V. 2011. All rights reserved. 6 of 12 TFF1017HN/N1 NXP Semiconductors Integrated mixer oscillator PLL for satellite LNB SUPPLY AND BAND/POLARIZATION SWITCHING horizontal polarization 5V REGULATOR VCC HB 1st STAGE LNA image reject filter vertical polarization RF gain mixer lF gain 2nd STAGE LNA 1st STAGE LNA PLL 9.75 GHz/10.6 GHz aaa-000011 Fig 5. TFF1017HN1_N1 Product data sheet LNB system block diagram with TFF1017HN/N1 All information provided in this document is subject to legal disclaimers. Rev. 1 — 12 September 2011 © NXP B.V. 2011. All rights reserved. 7 of 12 TFF1017HN/N1 NXP Semiconductors Integrated mixer oscillator PLL for satellite LNB 14. Package outline DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 7 y y1 C v M C A B w M C b L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 3.6 3.4 2.15 1.85 2.6 2.4 1.15 0.85 0.5 2.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Fig 6. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT763-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Package outline SOT763-1 TFF1017HN1_N1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 12 September 2011 © NXP B.V. 2011. All rights reserved. 8 of 12 TFF1017HN/N1 NXP Semiconductors Integrated mixer oscillator PLL for satellite LNB 15. Abbreviations Table 9. Abbreviations Acronym Description CPW CoPlanar Waveguide DVB-S Digital Video Broadcasting by Satellite DVB-S2 Digital Video Broadcasting - Satellite - Second generation ESD ElectroStatic Discharge IF Intermediate Frequency Ku band K-under band LO Local Oscillator PFD Phase Frequency Detector pHemt pseudomorphic High electron mobility transistor PLL Phase-Locked Loop RF Radio Frequency VCO Voltage-Controlled Oscillator V/T Voltage / Tone 16. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes TFF1017HN_N1 v.1 20110912 Product data sheet - - TFF1017HN1_N1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 12 September 2011 © NXP B.V. 2011. All rights reserved. 9 of 12 TFF1017HN/N1 NXP Semiconductors Integrated mixer oscillator PLL for satellite LNB 17. Legal information 17.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 17.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 17.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. TFF1017HN1_N1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 12 September 2011 © NXP B.V. 2011. All rights reserved. 10 of 12 TFF1017HN/N1 NXP Semiconductors Integrated mixer oscillator PLL for satellite LNB Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 17.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 18. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] TFF1017HN1_N1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 12 September 2011 © NXP B.V. 2011. All rights reserved. 11 of 12 TFF1017HN/N1 NXP Semiconductors Integrated mixer oscillator PLL for satellite LNB 19. Contents 1 2 3 4 5 6 7 8 8.1 8.2 9 10 11 12 13 14 15 16 17 17.1 17.2 17.3 17.4 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Thermal characteristics . . . . . . . . . . . . . . . . . . 5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Application information. . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information. . . . . . . . . . . . . . . . . . . . . 11 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 12 September 2011 Document identifier: TFF1017HN1_N1