Data Sheet

Freescale Semiconductor
Technical Data
Document Number: A2T21H360--23N
Rev. 0, 3/2016
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 63 W asymmetrical Doherty RF power LDMOS transistor is designed
for cellular base station applications covering the frequency range of 2110 to
2200 MHz.
2100 MHz
 Typical Doherty Single--Carrier W--CDMA Characterization Performance:
VDD = 28 Vdc, IDQA = 500 mA, VGSB = 0.7 Vdc, Pout = 63 W Avg.,
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
ACPR
(dBc)
2110 MHz
16.6
49.2
7.9
–30.5
2140 MHz
16.8
49.7
7.9
–31.0
2170 MHz
16.7
49.0
7.9
–32.8
2200 MHz
16.3
47.2
7.9
–36.1
A2T21H360--23NR6
2110–2200 MHz, 63 W AVG., 28 V
AIRFAST RF POWER LDMOS
TRANSISTOR
OM--1230--4L2S
PLASTIC
Features
 Advanced High Performance In--Package Doherty
 Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
 Designed for Digital Predistortion Error Correction Systems
6 VBWA(1)
Carrier
RFinA/VGSA 1
5 RFoutA/VDSA
RFinB/VGSB 2
4 RFoutB/VDSB
Peaking
3 VBWB(1)
(Top View)
Note: Exposed backside of the package is
the source terminal for the transistors.
Figure 1. Pin Connections
1. Device cannot operate with VDD current
supplied through pin 3 and pin 6.
 Freescale Semiconductor, Inc., 2016. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
A2T21H360--23NR6
1
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
Drain--Source Voltage
VDSS
–0.5, +65
Vdc
Gate--Source Voltage
VGS
–6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
–65 to +150
C
Case Operating Temperature Range
TC
–40 to +150
C
Operating Junction Temperature Range (1,2)
TJ
–40 to +225
C
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 72C, 63 W Avg., W--CDMA, 28 Vdc, IDQA = 500 mA, VGSB = 0.7 Vdc,
2140 MHz
Symbol
Value (2,3)
Unit
RJC
0.19
C/W
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
2
Machine Model (per EIA/JESD22--A115)
B
Charge Device Model (per JESD22--C101)
IV
Table 4. Moisture Sensitivity Level
Test Methodology
Per JESD22--A113, IPC/JEDEC J--STD--020
Rating
Package Peak Temperature
Unit
3
260
C
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 140 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Gate Quiescent Voltage
(VDD = 28 Vdc, ID = 500 mAdc, Measured in Functional Test)
VGSA(Q)
1.4
1.9
2.2
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 1.4 Adc)
VDS(on)
0.1
0.2
0.3
Vdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 240 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 2.4 Adc)
VDS(on)
0.1
0.2
0.3
Vdc
Characteristic
Off Characteristics (4)
On Characteristics -- Side A, Carrier
On Characteristics -- Side B, Peaking
1.
2.
3.
4.
Continuous use at maximum temperature will affect MTTF.
MTTF calculator available at http://www.nxp.com/RF/calculators.
Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955.
Each side of device measured separately.
(continued)
A2T21H360--23NR6
2
RF Device Data
Freescale Semiconductor, Inc.
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
(1,2)
Functional Tests
(In Freescale Doherty Production Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 500 mA, VGSB = 0.5 Vdc,
Pout = 63 W Avg., f = 2140 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.
ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
16.2
16.8
19.2
dB
Drain Efficiency
D
45.4
48.0
—
%
PAR
7.1
7.6
—
dB
ACPR
—
–29.6
–26.0
dBc
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Load Mismatch
(2) (In
Freescale Doherty Production Test Fixture, 50 ohm system) IDQA = 500 mA, VGSB = 0.5 Vdc, f = 2140 MHz
VSWR 10:1 at 32 Vdc, 316 W CW Output Power
(3 dB Input Overdrive from 229 W CW Rated Power)
No Device Degradation
Typical Performance (2) (In Freescale Doherty Characterization Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 500 mA, VGSB = 0.7 Vdc,
2110–2200 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
229
—
W
Pout @ 3 dB Compression Point (3)
P3dB
—
373
—
W

—
–29
—

VBWres
—
140
—
MHz
Gain Flatness in 90 MHz Bandwidth @ Pout = 63 W Avg.
GF
—
0.5
—
dB
Gain Variation over Temperature
(–30C to +85C)
G
—
0.009
—
dB/C
P1dB
—
0.002
—
dB/C
AM/PM
(Maximum value measured at the P3dB compression point across
the 2110–2200 MHz bandwidth)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(–30C to +85C)
Table 6. Ordering Information
Device
A2T21H360--23NR6
Tape and Reel Information
R6 Suffix = 150 Units, 56 mm Tape Width, 13--inch Reel
Package
OM--1230--4L2S
1. Part internally matched both on input and output.
2. Measurements made with device in an asymmetrical Doherty configuration.
3. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
A2T21H360--23NR6
RF Device Data
Freescale Semiconductor, Inc.
3
VDDA
C19
VGGA
R2
C1
--
C2
C10
R4
C3
C4
Z1
C5
R1
C21 C7
AFT21H360--24N
Rev. 1
C6
R5
C8
CUT OUT AREA
D75885
C12
C13
C
C16 C22
C14
P
C11
C15
C17
C18
C9
VGGB
VDDB
R3
C20
Figure 2. A2T21H360--23NR6 Test Circuit Component Layout
Table 7. A2T21H360--23NR6 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C9, C10, C11, C12, C18
10 F Chip Capacitors
C5750X7S2A106M230KB
TDK
C2, C8, C13, C17
9.1 pF Chip Capacitors
ATC100B9R1CT500XT
ATC
C3, C5
9.1 pF Chip Capacitors
ATC600F9R1BT250XT
ATC
C4
1.8 pF Chip Capacitor
ATC600F1R8BT250XT
ATC
C6
0.8 pF Chip Capacitor
ATC600F0R8BT250XT
ATC
C7
1.1 pF Chip Capacitor
ATC600F1R1BT250XT
ATC
C14
4.7 pF Chip Capacitor
ATC600F4R7BT250XT
ATC
C15 (1)
C15 (2)
3.9 pF Chip Capacitor
9.1 pF Chip Capacitor
ATC600F3R9BT250XT
ATC600F9R1BT250XT
ATC
ATC
C16
1.0 pF Chip Capacitor
ATC600F1R0BT250XT
ATC
C19, C20
470 F, 63 V Electrolytic Capacitors
MCGPR63V477M13X26-RH
Multicomp
C21
0.5 pF Chip Capacitor
ATC600F0R5BT250XT
ATC
C22
0.3 pF Chip Capacitor
ATC600F0R3BT250XT
ATC
R1
50 , 4 W Chip Resistor
CW12010T0050GBK
ATC
R2, R3
5.6 k, 1/4 W Chip Resistors
CRCW12065K60FKEA
Vishay
R4, R5
6.2 , 1/4 W Chip Resistors
CRCW12066R20FKEA
Vishay
Z1
2000–2300 MHz Band, 5 dB Directional Coupler
X3C21P1-05S
Anaren
PCB
Rogers RO4350B, 0.020, r = 3.66
D75885
MTL
1. On characterization board only.
2. On production board only.
A2T21H360--23NR6
4
RF Device Data
Freescale Semiconductor, Inc.
TYPICAL CHARACTERISTICS — 2110–2200 MHz
48
46
Gps
16.6
16.4
44
ACPR
16.2
16
–28
–1.8
–30
–1.9
–32
PARC
15.8
15.6
15.4
2060
–34
–36
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
2080
2100
2120 2140 2160
f, FREQUENCY (MHz)
2180
2200
–38
2220
–2
–2.1
–2.2
PARC (dB)
16.8
50
ACPR (dBc)
Gps, POWER GAIN (dB)
VDD = 28 Vdc, Pout = 63 W (Avg.), IDQA = 500 mA, VGSB = 0.7 Vdc
17.2 Single--Carrier W--CDMA
D
17
D, DRAIN
EFFICIENCY (%)
52
17.4
–2.3
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 63 Watts Avg.
0
VDD = 28 Vdc, Pout = 10 W (PEP), IDQA = 500 mA
VGSB = 0.7 Vdc, Two--Tone Measurements
–15 (f1 + f2)/2 = Center Frequency of 2140 MHz
–30
IM3--U
–45
IM7--L
–60
IM3--L
IM5--L
IM5--U
IM7--U
–75
–90
1
10
500
100
TWO--TONE SPACING (MHz)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
16.6
16.4
16.2
16
VDD = 28 Vdc, IDQA = 500 mA, VGSB = 0.7 Vdc
f = 2140 MHz, Single--Carrier W--CDMA
0
D
ACPR
–1
–2
60
–26
50
–28
40
30
–1 dB = 40 W
–3
–2 dB = 60 W
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB
@ 0.01% Probability on CCDF
–4
–5
5
25
Gps
20
10
–3 dB = 80 W
45
65
85
Pout, OUTPUT POWER (WATTS)
PARC
105
0
125
–30
–32
ACPR (dBc)
16.8
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
17
1
D DRAIN EFFICIENCY (%)
17.2
–34
–36
–38
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2T21H360--23NR6
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS — 2110–2200 MHz
40
2110 MHz
2200 MHz
14
2170 MHz
12
2170 MHz
2200 MHz
10
8
2110 MHz
ACPR
2140 MHz
3.84 MHz Channel Bandwidth, Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF
D
20
Gps
10
0
400
100
10
Pout, OUTPUT POWER (WATTS) AVG.
1
30
–10
D, DRAIN EFFICIENCY (%)
Gps, POWER GAIN (dB)
16
0
–20
–30
–40
ACPR (dBc)
60
VDD = 28 Vdc, IDQA = 500 mA
2140 MHz 2170 MHz
VGSB = 0.7 Vdc, Single--Carrier W--CDMA
50
18
2200 MHz
2110 MHz
2140 MHz
20
–50
–60
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
18
Gain
16
GAIN (dB)
14
12
VDD = 28 Vdc
Pin = 0 dBm
IDQA = 500 mA
VGSB = 0.7 Vdc
10
8
6
1800
1900
2000
2100 2200 2300
f, FREQUENCY (MHz)
2400
2500
2600
Figure 7. Broadband Frequency Response
A2T21H360--23NR6
6
RF Device Data
Freescale Semiconductor, Inc.
Table 8. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQA = 806 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.69 – j3.90
20.2
51.7
148
56.0
–14
9.40 – j0.19
1.66 – j3.94
20.1
51.5
141
54.1
–13
7.39 – j2.67
1.69 – j3.81
20.5
51.5
141
55.7
–14
5.04 – j2.83
1.71 – j4.35
19.8
51.5
141
53.3
–14
f
(MHz)
Zsource
()
Zin
()
2110
8.29 – j3.71
9.64 + j2.95
2140
8.62 – j1.68
2170
7.88 + j1.11
2200
5.32 + j2.59
Zload
()
(1)
Max Output Power
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.66 – j3.99
18.0
52.5
180
58.2
–18
1.63 – j4.09
17.9
52.4
173
55.9
–18
7.26 – j3.17
1.71 – j4.01
18.2
52.3
171
57.5
–18
4.84 – j3.34
1.65 – j4.39
17.7
52.4
172
55.1
–18
f
(MHz)
Zsource
()
Zin
()
2110
8.29 – j3.71
10.7 + j2.72
2140
8.62 – j1.68
9.87 – j0.96
2170
7.88 + j1.11
2200
5.32 + j2.59
Zload
()
(2)
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 9. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, IDQA = 806 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
2110
8.29 – j3.71
10.9 + j0.05
3.52 – j1.49
23.2
48.5
71
64.7
–17
2140
8.62 – j1.68
8.38 – j2.17
3.42 – j1.87
22.9
48.7
74
63.7
–15
2170
7.88 + j1.11
6.26 – j3.26
2.74 – j2.46
22.5
49.7
93
62.9
–16
2200
5.32 + j2.59
4.07 – j3.23
2.48 – j2.44
22.6
49.6
91
63.1
–18
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
3.52 – j1.42
21.2
49.3
85
66.6
–26
3.42 – j1.74
20.9
49.5
89
65.9
–23
5.88 – j3.53
2.68 – j2.34
20.6
50.4
109
65.2
–24
3.29 – j3.01
2.43 – j1.57
21.3
49.1
80
65.4
–27
f
(MHz)
Zsource
()
Zin
()
2110
8.29 – j3.71
10.2 – j0.98
2140
8.62 – j1.68
7.62 – j2.68
2170
7.88 + j1.11
2200
5.32 + j2.59
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T21H360--23NR6
RF Device Data
Freescale Semiconductor, Inc.
7
Table 10. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, VGSB = 1.8 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.03 – j4.56
18.7
54.1
255
51.5
–15
2.01 + j5.45
2.08 – j4.54
18.9
54.0
251
51.2
–16
2.53 + j5.70
2.05 – j4.58
18.9
54.0
252
51.0
–17
3.28 + j5.86
2.07 – j4.68
18.9
54.0
252
51.5
–17
f
(MHz)
Zsource
()
Zin
()
2110
1.53 – j4.85
1.68 + j5.24
2140
1.72 – j5.10
2170
2.19 – j5.66
2200
2.59 – j5.85
Zload
()
(1)
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload
()
(2)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
1.53 – j4.85
1.70 + j5.31
1.86 – j4.74
16.3
54.9
309
53.5
–20
2140
1.72 – j5.10
2.07 + j5.52
1.88 – j4.85
16.5
54.8
304
52.9
–21
2170
2.19 – j5.66
2.62 + j5.80
1.95 – j4.84
16.5
54.8
305
53.0
–22
2200
2.59 – j5.85
3.45 + j6.01
2.04 – j4.88
16.7
54.9
306
54.0
–23
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 11. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, VGSB = 1.8 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
2110
1.53 – j4.85
1.75 + j5.40
3.28 – j4.94
20.0
53.3
214
56.9
–17
2140
1.72 – j5.10
2.16 + j5.70
3.72 – j4.61
20.4
53.1
203
56.9
–18
2170
2.19 – j5.66
2.78 + j5.99
3.92 – j4.22
20.7
52.9
197
57.6
–20
2200
2.59 – j5.85
3.68 + j6.13
3.90 – j3.96
20.7
52.9
194
58.4
–20
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
Max Drain Efficiency
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload
()
(2)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
1.53 – j4.85
1.82 + j5.42
3.28 – j5.22
18.0
54.0
251
59.8
–24
2140
1.72 – j5.10
2.26 + j5.71
3.65 – j4.90
18.2
53.9
243
59.8
–25
2170
2.19 – j5.66
2.90 + j5.98
3.78 – j4.48
18.5
53.8
240
60.3
–27
2200
2.59 – j5.85
3.94 + j6.10
4.03 – j4.10
18.7
53.6
228
61.3
–28
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T21H360--23NR6
8
RF Device Data
Freescale Semiconductor, Inc.
P1dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 2140 MHz
0
0
48
EE
--2
48.5
49
--3
49.5
50
P
P
--4
--5
--1
47.5
IMAGINARY ()
IMAGINARY ()
--1
1
2
3
E
--2
--3
62
4
--5
6
5
60
P
--4
50.5
51
52
1
58
2
56
3
54
52
4
50
5
6
REAL ()
REAL ()
Figure 8. P1dB Load Pull Output Power Contours (dBm)
Figure 9. P1dB Load Pull Ffficiency Contours (%)
0
0
--1
22.5
E
--2
--24
23
IMAGINARY ()
--1
IMAGINARY ()
23.5
24
22
--3
--22
--20
--2
E
--18
--16
--3
--14
21.5
--4
P
20
--5
1
2
3
P
--4
21
20.5
4
6
5
--5
--12
--10
2
1
3
4
5
REAL ()
REAL ()
Figure 10. P1dB Load Pull Gain Contours (dB)
Figure 11. P1dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
6
Gain
Drain Efficiency
Linearity
Output Power
A2T21H360--23NR6
RF Device Data
Freescale Semiconductor, Inc.
9
0
0
--1
--1
48.5
E
--2
51
50.5
50
IMAGINARY ()
IMAGINARY ()
P3dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 2140 MHz
49
49.5
--3
E
--2
64
--3
51.5
--4
--5
1
62
--4
P
P
52
2
3
4
5
--5
6
1
60
2
58
3
54
56
4
52
5
6
REAL ()
REAL ()
Figure 12. P3dB Load Pull Output Power Contours (dBm)
Figure 13. P3dB Load Pull Efficiency Contours (%)
0
0
21.5
22
21
--1
20.5
IMAGINARY ()
IMAGINARY ()
--1
E
--2
20
--3
--30
--28
--2
E
--26
--24
--22
--3
--20
--18
19.5
--4
P
18
--5
1
18.5
2
3
--16
--4
19
4
6
5
--5
P
1
--14
2
3
4
5
REAL ()
REAL ()
Figure 14. P3dB Load Pull Gain Contours (dB)
Figure 15. P3dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
6
Gain
Drain Efficiency
Linearity
Output Power
A2T21H360--23NR6
10
RF Device Data
Freescale Semiconductor, Inc.
P1dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 2140 MHz
--1
50
51
51.5
--4
P
E
--5
53.5
1
52.5
53
--6
52
3
50
52
--3
54
--4
P
56
--6
4
REAL ()
5
6
7
Figure 16. P1dB Load Pull Output Power Contours (dBm)
1
2
3
5
6
7
--1
22
--2
--26
--2
--3
IMAGINARY ()
IMAGINARY ()
4
REAL ()
Figure 17. P1dB Load Pull Ffficiency Contours (%)
--1
21.5
--4
P
E
--5
18
--6
--7
E
--5
--7
2
46
48
--2
--3
--7
44
42
40
IMAGINARY ()
IMAGINARY ()
--2
--1
50.5
20
18.5
1
2
21
3
--24
--3
--22
--4
P
E
--20
--5
--18
20.5
--6
19.5
19
--28
4
REAL ()
5
7
6
Figure 18. P1dB Load Pull Gain Contours (dB)
NOTE:
--7
1
--16
--14
--12
2
3
4
REAL ()
5
6
7
Figure 19. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T21H360--23NR6
RF Device Data
Freescale Semiconductor, Inc.
11
P3dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 2140 MHz
--1
--1
51
51.5
--3
--4
52
E
P
--5
54.5
54
1
53.5
2
4
REAL ()
5
6
7
--2
--2
--3
IMAGINARY ()
IMAGINARY ()
--1
19.5
--4
--5
15.5
--6
--7
18.5
17
17.5
16
1
19
16.5
2
3
5
E
54
52
1
2
3
7
6
Figure 22. P3dB Load Pull Gain Contours (dB)
NOTE:
4
REAL ()
5
6
7
--3
--32
--4
P
--5
--7
--28
E
--20
--6
18
4
REAL ()
58
P
Figure 21. P3dB Load Pull Ffficiency Contours (%)
--1
E
54
--5
--7
Figure 20. P3dB Load Pull Output Power Contours (dBm)
P
52
--4
--6
53
3
48
50
--3
46
56
52.5
--6
--7
44
--2
IMAGINARY ()
IMAGINARY ()
--2
--22
--24
--30
--26
--18
1
2
3
4
REAL ()
5
6
7
Figure 23. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T21H360--23NR6
12
RF Device Data
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
A2T21H360--23NR6
RF Device Data
Freescale Semiconductor, Inc.
13
A2T21H360--23NR6
14
RF Device Data
Freescale Semiconductor, Inc.
A2T21H360--23NR6
RF Device Data
Freescale Semiconductor, Inc.
15
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
 AN1907: Solder Reflow Attach Method for High Power RF Devices in Over--Molded Plastic Packages
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
 .s2p File
Development Tools
 Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.nxp.com/RF
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
Mar. 2016
Description
 Initial release of data sheet
A2T21H360--23NR6
16
RF Device Data
Freescale Semiconductor, Inc.
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A2T21H360--23NR6
Document
Number:
RF
Device
Data A2T21H360--23N
Rev. 0, 3/2016Semiconductor, Inc.
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