NTLJD3119C D

NTLJD3119C
Power MOSFET
20 V/−20 V, 4.6 A/−4.1 A, mCoolt
Complementary, 2x2 mm, WDFN Package
Features
• Complementary N−Channel and P−Channel MOSFET
• WDFN Package with Exposed Drain Pad for Excellent Thermal
•
•
•
•
•
Conduction
Footprint Same as SC−88 Package
Leading Edge Trench Technology for Low On Resistance
1.8 V Gate Threshold Voltage
Low Profile (< 0.8 mm) for Easy Fit in Thin Environments
This is a Pb−Free Device
RDS(on) MAX
ID MAX
65 mW @ 4.5 V
3.8 A
85 mW @ 2.5 V
2.0 A
120 mW @ 1.8 V
1.7 A
100 mW @ −4.5 V
−4.1 A
135 mW @ −2.5 V
−2.0 A
200 mW @ −1.8 V
−1.6 A
V(BR)DSS
N−Channel
20 V
Applications
• Synchronous DC−DC Conversion Circuits
• Load/Power Management of Portable Devices like PDA’s, Cellular
•
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P−Channel
−20 V
Phones and Hard Drives
Color Display and Camera Flash Regulators
D2
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
N−Channel
Continuous Drain
Current (Note 1)
Steady
State
P−Channel
Continuous Drain
Current (Note 1)
Steady
State
Power Dissipation
(Note 1)
t≤5s
t≤5s
Steady
State
t≤5s
N−Channel
Continuous Drain
Current (Note 2)
P−Channel
Continuous Drain
Current (Note 2)
Power Dissipation
(Note 2)
Steady
State
Steady
State
N−Ch
P−Ch
N−Ch
P−Ch
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 25°C
Symbol
Value
Unit
VDSS
20
−20
±8.0
V
A
PD
3.8
2.8
4.6
−3.3
−2.4
−4.1
1.5
W
ID
2.3
2.6
A
VGS
ID
ID
TA = 85°C
TA = 25°C
TA = 85°C
Steady
TA = 25°C
State
N−Ch
Pulsed Drain Current
tp = 10 ms
P−Ch
Operating Junction and Storage Temperature
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
December, 2009 − Rev. 4
JM = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
A
−2.3
D1
S1
1
6
D1
G1
2
5
G2
D2
3
4
S2
D2
A
−1.6
(Top View)
PD
0.71
W
IDM
18
−20
−55 to
150
260
A
TJ, TSTG
TL
1 JMMG
G
Pin 1
1
ORDERING INFORMATION
Device
Package
Shipping†
°C
NTLJD3119CTAG
WDFN6
(Pb−Free)
3000/Tape & Reel
°C
NTLJD3119CTBG
WDFN6
(Pb−Free)
3000/Tape & Reel
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
2. Surface Mounted on FR4 Board using the minimum recommended pad size
of 30 mm2, 2 oz Cu.
© Semiconductor Components Industries, LLC, 2009
WDFN6
CASE 506AN
V
1.9
ID
MARKING
DIAGRAM
D1
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTLJD3119C/D
NTLJD3119C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
Junction−to−Ambient – Steady State (Note 3)
RqJA
83
Junction−to−Ambient – Steady State Min Pad (Note 4)
RqJA
177
Junction−to−Ambient – t ≤ 5 s (Note 3)
RqJA
54
Unit
SINGLE OPERATION (SELF−HEATED)
°C/W
DUAL OPERATION (EQUALLY HEATED)
Junction−to−Ambient – Steady State (Note 3)
RqJA
58
Junction−to−Ambient – Steady State Min Pad (Note 4)
RqJA
133
Junction−to−Ambient – t ≤ 5 s (Note 3)
RqJA
40
3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm2, 2 oz Cu).
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2
°C/W
NTLJD3119C
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
N/P
V(BR)DSS
N
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
VGS = 0 V
P
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
V(BR)DSS/TJ
IDSS
IGSS
ID = 250 mA
20
ID = −250 mA
−20
V
N
10.4
P
9.95
N
VGS = 0 V, VDS = 16 V
P
VGS = 0 V, VDS = −16 V
N
VGS = 0 V, VDS = 16 V
P
VGS = 0 V, VDS = −16 V
mV/°C
1.0
TJ = 25 °C
mA
−1.0
10
TJ = 85 °C
−10
N
VDS = 0 V, VGS = ±8.0 V
±100
P
VDS = 0 V, VGS = ±8.0 V
±100
nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
VGS(TH)
N
VGS(TH)/TJ
N
−3.0
P
2.44
VGS = VDS
P
Gate Threshold Temperature
Coefficient
Drain−to−Source On Resistance
Forward Transconductance
RDS(on)
gFS
ID = 250 mA
0.4
0.7
1.0
ID = −250 mA
−0.4
−0.7
−1.0
V
mV/°C
N
VGS = 4.5 V , ID = 3.8 A
37
65
P
VGS = −4.5 V , ID = −4.1 A
75
100
N
VGS = 2.5 V , ID = 2.0 A
46
85
P
VGS = −2.5 V, ID = −2.0 A
101
135
N
VGS = 1.8 V , ID = 1.7 A
65
120
P
VGS = −1.8 V, ID = −1.6 A
150
200
N
VDS = 10 V, ID = 1.7 A
4.2
P
VDS = −5.0 V , ID = −2.0 A
3.1
mW
S
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
Output Capacitance
CISS
COSS
N
VDS = 10 V
271
P
VDS = −10 V
531
VDS = 10 V
72
VDS = −10 V
91
N
VDS = 10 V
43
P
VDS = −10 V
56
N
P
Reverse Transfer Capacitance
CRSS
f = 1.0 MHz, VGS = 0 V
Total Gate Charge
QG(TOT)
N
VGS = 4.5 V, VDS = 10 V, ID = 3.8 A
3.7
P
VGS = −4.5 V, VDS = −10 V, ID = −2.0 A
5.5
Threshold Gate Charge
QG(TH)
N
VGS = 4.5 V, VDS = 10 V, ID = 3.8 A
0.3
P
VGS = −4.5 V, VDS = −10 V, ID = −2.0 A
0.7
N
VGS = 4.5 V, VDS = 10 V, ID = 3.8 A
0.6
P
VGS = −4.5 V, VDS = −10 V, ID = −2.0 A
1.0
N
VGS = 4.5 V, VDS = 10 V, ID = 3.8 A
1.0
P
VGS = −4.5 V, VDS = −10 V, ID = −2.0 A
1.4
Gate−to−Source Charge
Gate−to−Drain Charge
QGS
QGD
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3
pF
nC
NTLJD3119C
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
N/P
Test Conditions
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
N
VGS = 4.5 V, VDD = 16 V,
ID = 1.0 A, RG = 2.0 W
td(OFF)
4.7
11.1
tf
5.8
td(ON)
5.2
tr
td(OFF)
ns
3.8
VGS = −4.5 V, VDD = −10 V,
ID = −2.0 A, RG = 2.0 W
P
tf
13.2
13.7
19.1
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
N
P
N
P
Reverse Recovery Time
Charge Time
tRR
ta
Reverse Recovery Charge
VGS = 0 V, TJ = 125 °C
IS = 1.0 A
0.69
1.0
IS = −1.0 A
−0.75
−1.0
IS = 1.0 A
0.52
IS = −1.0 A
−0.64
N
IS = 1.0 A
10.2
P
IS = −1.0 A
16.2
N
IS = 1.0 A
6.0
IS = −1.0 A
10.6
IS = 1.0 A
4.2
P
Discharge Time
VGS = 0 V, TJ = 25 °C
VGS = 0 V,
dIS / dt = 100 A/ms
tb
N
P
IS = −1.0 A
5.6
QRR
N
IS = 1.0 A
3.0
P
IS = −1.0 A
5.7
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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4
V
ns
nC
NTLJD3119C
TYPICAL PERFORMANCE CURVES − N−CHANNEL (TJ = 25°C unless otherwise noted)
10
VGS = 4 V to 2.2 V
8
2.0 V
TJ = 25°C
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
10
1.8 V
6
1.6 V
4
1.4 V
2
VDS ≥ 10 V
8
6
TJ = 25°C
4
TJ = 100°C
2
1.2 V
0
0.5
1
1.5
2
2.5
3
3.5
0
4
TJ = −55°C
2.5
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
TJ = 25°C
ID = 3.8 A
0.09
0.08
0.07
0.06
0.05
0.04
0.03
1.0
3.0
2.0
4.0
5.0
6.0
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.14
TJ = 25°C
0.12
VGS = 1.8 V
0.1
0.08
VGS = 2.5 V
0.06
0.04
VGS = 4.5 V
0.02
0
1
2
10000
ID = 3.8 A
VGS = 4.5 V
IDSS, LEAKAGE (nA)
1.2
1.1
1.0
0.9
4
5
6
7
8
9
10
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
1.5
1.3
3
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance versus Drain Current
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
2
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.1
1.4
1.5
1
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
VGS = 0 V
TJ = 150°C
1000
TJ = 100°C
0.8
0.7
−50
−25
0
25
50
75
100
125
150
100
2
4
6
8
10
12
14
16
18
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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5
20
NTLJD3119C
VDS = 0 V
TJ = 25°C
Ciss
500
C, CAPACITANCE (pF)
VGS = 0 V
400
300
200
Crss
Coss
100
0
10
5
VGS
0
VDS
5
10
15
20
QT
4
VDS
2
QGS
0
IS, SOURCE CURRENT (AMPS)
tf
10
tr
td(on)
1
10
RG, GATE RESISTANCE (W)
0
4
1
2
3
QG, TOTAL GATE CHARGE (nC)
0
VGS = 0 V
TJ = 25°C
1.5
1
0.5
0
0.4
100
4
ID = 3.8 A
TJ = 25°C
2
td(off)
8
QGD
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
100
VDD = 16 V
ID = 1.0 A
VGS = 4.5 V
12
VGS
1
Figure 7. Capacitance Variation
t, TIME (ns)
16
3
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
1
20
5
VDS , DRAIN-TO-SOURCE VOLTAGE (VOLTS)
600
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
TYPICAL PERFORMANCE CURVES − N−CHANNEL (TJ = 25°C unless otherwise noted)
0.5
0.6
0.7
0.8
0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
Figure 10. Diode Forward Voltage versus Current
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NTLJD3119C
TYPICAL PERFORMANCE CURVES − P−CHANNEL (TJ = 25°C unless otherwise noted)
5
TJ = 25°C
−ID, DRAIN CURRENT (AMPS)
4.5
−1.8 V
4
3.5
−1.7 V
3
2.5
−1.6 V
2
−1.5 V
1.5
1
−1.4 V
0.5
−1.3 V
−1.2 V
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VGS = −1.9 V to −6 V
0
0.5
1
2
1.5
3
2.5
3.5
4
VDS ≥ 10 V
4
3
2
TJ = 25°C
1
TJ = 125°C
0
4.5
0
TJ = 100°C
0.08
TJ = 25°C
0.07
0.06
TJ = −55°C
0.05
0.04
1.0
1.5
2.5
2.0
0.15
TJ = 25°C
VGS = −2.5 V
0.1
VGS = −4.5 V
0.05
0
1
10000
−IDSS, LEAKAGE (nA)
1.2
1.0
0.8
25
50
75
100
5
Figure 14. On−Resistance versus Drain
Current and Gate Voltage
ID = −2.2 A
VGS = −4.5 V
0
4
−ID, DRAIN CURRENT (A)
Figure 13. On−Resistance versus Drain
Current
−25
3
2
−ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
3
Figure 12. Transfer Characteristics
0.09
0.6
−50
2.5
Figure 11. On−Region Characteristics
VGS = −4.5 V
1.4
2
1.5
−VGS, GATE−TO−SOURCE VOLTAGE (V)
0.1
1.6
TJ = −55°C
1
0.5
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (AMPS)
5
125
150
VGS = 0 V
TJ = 150°C
1000
TJ = 100°C
100
10
2
4
6
8
10
12
14
16
18
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 15. On−Resistance Variation with
Temperature
Figure 16. Drain−to−Source Leakage Current
versus Voltage
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7
20
NTLJD3119C
VDS = 0 V VGS = 0 V
C, CAPACITANCE (pF)
1000
TJ = 25°C
Ciss
800
600
400
Crss
Coss
200
0
5
VGS
0
VDS
10
5
15
20
QT
4
0
tf
tr
td(off)
td(on)
10
RG, GATE RESISTANCE (W)
10
8
0
1
5
2
3
4
QG, TOTAL GATE CHARGE (nC)
2
1.5
1
0.5
TJ = 150°C
0.1
0.2
0.3
0.4
TJ = 25°C
0.5
0.6
0.7
0.8
0.9 1.0
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 20. Diode Forward Voltage versus Current
TC = 25°C
TJ = 150°C
SINGLE PULSE
10 ms
100 ms
10 ms
*See Note 2 on Page 1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
0
VGS = 0 V
1 ms
0.01
6
2.5
1
0.1
4
ID = −2.2 A
TJ = 25°C
0
0
100
Figure 19. Resistive Switching Time
Variation versus Gate Resistance
100
QGD
Figure 18. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
−Is, SOURCE CURRENT (AMPS)
100
−ID, DRAIN CURRENT (AMPS)
t, TIME (ns)
QGS
3
VDD = −15 V
ID = −2.2 A
VGS = −4.5 V
12
VGS
1
1000
1
VDS
2
Figure 17. Capacitance Variation
1
16
3
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
10
20
5
-V DS , DRAIN-TO-SOURCE VOLTAGE (VOLTS)
1200
-V GS, GATE-TO-SOURCE VOLTAGE (VOLTS)
TYPICAL PERFORMANCE CURVES − P−CHANNEL (TJ = 25°C unless otherwise noted)
dc
10
1
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 21. Maximum Rated Forward Biased
Safe Operating Area
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8
100
NTLJD3119C
EFFECTIVE TRANSIENT THERMAL RESISTANCE
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
1000
100
D = 0.5
0.2
0.1
10
*See Note 2 on Page 1
P(pk)
0.05
0.02
1 0.01
t1
t2
DUTY CYCLE, D = t1/t2
SINGLE PULSE
0.1
0.000001
0.00001
0.0001
0.001
0.01
t, TIME (s)
0.1
Figure 22. Thermal Response
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1
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TA = P(pk) RqJA(t)
10
100
1000
NTLJD3119C
PACKAGE DIMENSIONS
WDFN6, 2x2, 0.65P
CASE 506AN−01
ISSUE D
D
PLATING
ÍÍÍ
ÍÍÍ
ÍÍÍ
PIN ONE
REFERENCE
0.10 C
0.10 C
ÇÇÇ
ÇÇÇ
ÉÉÉ
ÉÉÉ
EXPOSED Cu
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
MOLD CMPD
DETAIL B
OPTIONAL
CONSTRUCTIONS
E
TOP VIEW
DIM
A
A1
A3
b
D
D2
E
E2
e
F
K
L
L1
L
L
L1
DETAIL A
A3
DETAIL B
0.10 C
ÇÇ
ÉÉ
A
B
OPTIONAL
CONSTRUCTIONS
A
0.08 C
NOTE 4
A1
C
SIDE VIEW
0.10 C A
SOLDERMASK DEFINED
MOUNTING FOOTPRINT
SEATING
PLANE
1.74
B
1
1.10
3
6X
DETAIL A
6
4
6X
0.47
2.30
E2
K
2X
0.77
D2
F
D2
L
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.25
0.35
2.00 BSC
0.57
0.67
2.00 BSC
0.90
1.10
0.65 BSC
0.15 BSC
0.25 REF
0.30
0.20
--0.10
0.10 C A
B
PACKAGE
OUTLINE
b
0.10 C A
e
0.05 C
1
B
NOTE 3
6X
0.35
BOTTOM VIEW
0.65
PITCH
DIMENSIONS: MILLIMETERS
mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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NTLJD3119C/D