® RT6575A/B Dual-Channel Synchronous DC/DC Step-Down Controller with 5V/3.3V LDOs General Description Features The RT6575A/B is a dual-channel step-down controller generating supply voltages for battery-powered systems. It includes two Pulse-Width Modulation (PWM) controllers adjustable from 2V to 5.5V, and two fixed 5V/3.3V linear regulators. Each linear regulator provides up to 100mA output current and 3.3V linear regulator provides 1% accuracy under 35mA. The RT6575A/B has an oscillator output to drive the external charge pump application. Other features include on-board power-up sequencing, a powergood output, internal soft-start, and soft-discharge output that prevents negative voltage during shutdown. A constant current ripple PWM control scheme operates without sense resistors and provides 100ns response to load transient. For maximizing power efficiency, the RT6575A/B automatically switches to the diode-emulation mode in light load applications. The RT6575A/B is available in the WQFN-20L 3x3 package. Support Connected Standby Mode for Ultrabook CCRCOT Control with 100ns Load Step Response PWM Maximum Duty Ratio > 98% 5V to 25V Input Voltage Range Dual Adjustable Output : CH1 : 2V to 5.5V CH2 : 2V to 4V 5V/3.3V LDOs with 100mA Output Current 1% Accuracy on 3.3V LDO Output Oscillator Driving Output for Charge Pump Application Internal Frequency Setting 300kHz/355kHz (CH1/CH2) Internal Soft-Start and Soft-Discharge 4700ppm/°°C RDS(ON) Current Sensing Independent Switcher Enable Control Built-in OVP/UVP/OCP/OTP Non-Latch UVLO Power Good Indicator RoHS Compliant and Halogen Free Simplified Application Circuit VIN UGATE2 RT6575A/B BOOT2 UGATE1 PHASE2 BOOT1 LGATE2 PHASE1 VIN VOUT1 LGATE1 VOUT2 FB2 CS1 CS2 BYP1 LDO5 5V FB1 Channel 1 Enable EN1 Channel 2 Enable EN2 VCLK Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS6575A/B-03 February 2016 PGOOD LDO3 PGOOD Indicator 3.3V GND is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT6575A/B Applications Marking Information Notebook and Sub-Notebook Computers System Power Supplies 2-Cell to 4-Cell Li+ Battery-Powered Devices RT6575AGQW 3G= : Product Code YMDNN : Date Code 3G=YM DNN Ordering Information RT6575A/B RT6575BGQW Package Type QW : WQFN-20L 3x3 (W-Type) Lead Plating System G : Green (Halogen Free and Pb Free) Pin Function With A : LDO3 Always On B : LDO3/LDO5 Always On 3F= : Product Code 3F=YM DNN YMDNN : Date Code Pin Configurations (TOP VIEW) EN1 VCLK PHASE1 BOOT1 UGATE1 Pin 1 Orientation*** (2) : Quadrant 2, Follow EIA-481-D Note : ***Empty means Pin1 orientation is Quadrant 1 Richtek products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 1 15 2 14 GND 3 4 21 5 13 12 11 6 7 8 LGATE1 BYP1 LDO5 VIN LGATE2 9 10 EN2 PGOOD PHASE2 BOOT2 UGATE2 20 19 18 17 16 CS1 FB1 LDO3 FB2 CS2 WQFN-20L 3x3 Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS6575A/B-03 February 2016 RT6575A/B Functional Pin Description Pin No. Pin Name Pin Function 1 CS1 Current Limit Setting. Connect a resistor to GND to set the threshold for Channel 1 synchronous RDS(ON) sense. The GND PHASE1 current limit threshold is 1/8th the voltage seen at CS1 over a 0.2V to 2V range. There is an internal 10A current source from LDO5 to CS1. 2 FB1 Feedback Voltage Input for Channel 1. Connect FB1 to a resistive voltage divider from VOUT1 to GND to adjust output from 2V to 5.5V. 3 LDO3 3.3V Linear Regulator Output. It is always on when VIN is higher than VINPOR threshold. 4 FB2 Feedback Voltage Input for Channel 2. Connect FB2 to a resistive voltage divider from VOUT2 to GND to adjust output from 2V to 4V. 5 CS2 Current Limit Setting. Connect a resistor to GND to set the threshold for Channel 2 synchronous RDS(ON) sense. The GND PHASE2 current limit threshold is 1/8th the voltage seen at CS2 over a 0.2V to 2V range. There is an internal 10A current source from LDO5 to CS2. 6 EN2 Enable Control Input for Channel 2. 7 PGOOD Power Good Indicator Output for Channel 1 and Channel 2. (Logical AND) 8 PHASE2 Switch Node of Channel 2 MOSFETs. PHASE2 is the internal lower supply rail for the UGATE2 high-side gate driver. PHASE2 is also the current-sense input for the Channel 2. 9 BOOT2 Bootstrap Supply for Channel 2 High-Side Gate Driver. Connect to an external capacitor according to the typical application circuits. 10 UGATE2 High-Side Gate Driver Output for Channel 2. UGATE2 swings between PHASE2 and BOOT2. 11 LGATE2 Low-Side Gate Driver Output for Channel 2. LGATE2 swings between GND and LDO5. 12 VIN Power Input for 5V and 3.3V LDO Regulators and Buck Controllers. 13 LDO5 5V Linear Regulator Output. LDO5 is also the supply voltage for the low-side MOSFET and analog supply voltage for the device. 14 BYP1 Switch-over Source Voltage Input for LDO5. 15 LGATE1 Low-Side Gate Driver Output for Channel 1. LGATE1 swings between GND and LDO5. 16 UGATE1 High-Side Gate Driver Output for Channel 1. UGATE1 swings between PHASE1 and BOOT1. 17 BOOT1 Bootstrap Supply for Channel 1 High-Side Gate Driver. Connect to an external capacitor according to the typical application circuits. 18 PHASE1 Switch Node of Channel 1 MOSFETs. PHASE1 is the internal lower supply rail for the UGATE1 high-side gate driver. PHASE1 is also the current sense input for the Channel 1. 19 VCLK Oscillator Output for Charge Pump. 20 EN1 Enable Control Input for Channel 1. 21 GND (Exposed Pad) Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS6575A/B-03 February 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT6575A/B Functional Block Diagram BOOT1 BOOT2 UGATE1 UGATE2 PHASE2 PHASE1 LDO5 Channel 1 Buck Controller LGATE1 LDO5 Channel 2 Buck Controller LGATE2 FB1 CS1 FB2 CS2 BYP1 PGOOD VCLK OSC GND SW5 Threshold BYP1 LDO5 Power-On Sequence Clear Fault Latch EN1 REF LDO3 LDO5 LDO3 EN2 BYP1 VIN Operation The RT6575A/B includes two constant on-time synchronous step-down controllers and two linear regulators. Buck Controller In normal operation, the high-side N-MOSFET is turned on when the output is lower than VREF, and is turned off after the internal one-shot timer expires. While the highside N-MOSFET is turned off, the low-side N-MOSFET is turned on to conduct the inductor current until next cycle begins. Soft-Start For internal soft-start function, an internal current source charges an internal capacitor to build the soft-start ramp voltage. The output voltage will track the internal ramp voltage during soft-start interval. Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 PGOOD The power good output is an open-drain architecture. When the two channels soft-start are both finished, the PGOOD open-drain output will be high impedance. Current Limit The current limit circuit employs a unique “valley” current sensing algorithm. If the magnitude of the current sense signal at PHASE is above the current limit threshold, the PWM is not allowed to initiate a new cycle. Thus, the current to the load exceeds the average output inductor current, the output voltage falls and eventually crosses the under-voltage protection threshold, inducing IC shutdown. is a registered trademark of Richtek Technology Corporation. DS6575A/B-03 February 2016 RT6575A/B Over-Voltage Protection (OVP) & Under-Voltage Protection (UVP) The two channel output voltages are continuously monitored for over-voltage and under-voltage conditions. When the output voltage exceeds over-voltage threshold (113% of VOUT), UGATE goes low and LGATE is forced high. When it is less than 52% of reference voltage, undervoltage protection is triggered and then both UGATE and LGATE gate drivers are forced low. The controller is latched until ENx is reset or LDO5 is re-supplied. LDO5 and LDO3 When the VIN voltage exceeds the POR rising threshold, LDO3 will default turn-on. The LDO5 can be power on by ENx. The linear regulator LDO5 and LDO3 provide 5V and 3.3V regulated output. Switching Over The BYP1 is connected to the Channel 1 output. After the Channel 1 output voltage exceeds the set threshold (4.66V), the output will be bypassed to the LDO5 output to maximize the efficiency. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS6575A/B-03 February 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT6575A/B Absolute Maximum Ratings (Note 1) VIN to GND ----------------------------------------------------------------------------------------------------------------BOOTx to GND DC ---------------------------------------------------------------------------------------------------------------------------<100ns ---------------------------------------------------------------------------------------------------------------------BOOTx to PHASEx DC ---------------------------------------------------------------------------------------------------------------------------<100ns ---------------------------------------------------------------------------------------------------------------------PHASEx to GND DC ---------------------------------------------------------------------------------------------------------------------------<100ns ---------------------------------------------------------------------------------------------------------------------UGATEx to GND DC ---------------------------------------------------------------------------------------------------------------------------<100ns ---------------------------------------------------------------------------------------------------------------------UGATEx to PHASEx DC ---------------------------------------------------------------------------------------------------------------------------<100ns ---------------------------------------------------------------------------------------------------------------------LGATEx to GND DC ---------------------------------------------------------------------------------------------------------------------------<100ns ---------------------------------------------------------------------------------------------------------------------Other Pins -----------------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C WQFN-20L 3x3 ----------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) WQFN-20L 3x3, θJA -----------------------------------------------------------------------------------------------------WQFN-20L 3x3, θJC ----------------------------------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) --------------------------------------------------------------------------------------------- Recommended Operating Conditions −0.3V to 30V −0.3V to 36V −5V to 42V −0.3V to 6V −5V to 7.5V −5V to 30V −10V to 42V −5V to 36V −10V to 42V −0.3V to 6V −5V to 7.5V −0.3V to 6V −5V to 7.5V −0.3V to 6.5V 3.33W 30°C/W 7.5°C/W 150°C 260°C −65°C to 150°C 2kV (Note 4) Supply Voltage, VIN ----------------------------------------------------------------------------------------------------- 5V to 25V Junction Temperature Range ------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------------------- −40°C to 85°C Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS6575A/B-03 February 2016 RT6575A/B Electrical Characteristics (VIN = 12V, VEN1 = VEN2 = 3.3V, VCS1 = VCS2 = 2V, No Load, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Rising Threshold -- 4.6 4.9 Falling Threshold 3.2 3.7 -- RT6575A Both Buck Controllers Off, VEN1 = VEN2 = GND -- 60 80 RT6575B Both Buck Controllers Off, VEN1 = VEN2 = GND -- 80 100 Unit Input Supply VIN Power-On Reset VIN Standby Supply Current VINPOR IVIN_SBY V A VIN Quiescent Current IVIN_nosw Both Buck Controllers On, VFBx = 2.05V, VBYP1 = 5.05V -- 15 25 A BYP1 Supply Current IBYP1_nosw Both Buck Controllers On, VFBx = 2.05V, VBYP1 = 5.05V -- 420 500 A 1.98 2 2.02 V VBYP1 = 0.5V 10 45 -- mA VPHASEx = 0.5V 5 8 -- mA VIN = 20V, VOUT1 = 5V 240 300 360 VIN = 20V, VOUT2 = 3.33V 280 355 430 Buck Controllers Output and FB Voltage FBx Valley Trip Voltage BYP1 Discharge Current PHASEx Discharge Current VFBx IDCHG_BYP 1 IDCHG_LX CCM Operation Switching Frequency Switching Frequency f SWx Minimum Off-Time tOFF(MIN) VFBx = 1.9V -- 200 275 ns tSSx VOUT Ramp-up Time -- 0.9 -- ms CSx Source Current ICSx VCSx = 1V, VFBx = 1.9V 9 10 11 A CSx Current Temperature Coefficient TCICSx In Comparison with 25°C -- 4700 -- ppm/C Zero-Current Threshold VZC VFBx = 2.05V, GND PHASEx -- 1 -- mV VIN = 12V, No Load 4.9 5 5.1 VIN > 7V, ILDO5 < 100mA 4.8 5 5.1 VIN > 5.5V, ILDO5 < 35mA 4.8 5 5.1 VIN > 5V, ILDO5 < 20mA 4.5 4.75 5.1 VIN = 12V, No Load 3.267 3.3 3.333 VIN > 7V, ILDO3 < 100mA 3.217 3.3 3.383 VIN > 5.5V, ILDO3 < 35mA 3.267 3.3 3.333 VIN > 5V, ILDO3 < 20mA 3.217 3.3 3.383 kHz Soft-Start Soft-Start Time Current Sense Internal Regulator LDO5 Output Voltage LDO3 Output Voltage VLDO5 VLDO3 Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS6575A/B-03 February 2016 V V is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT6575A/B Parameter Symbol Test Conditions Min Typ Max Unit LDO5 Output Current ILDO5 VLDO5 = 4.5V, VBYP1 = GND, VIN = 7.4V 100 175 -- mA LDO3 Output Current ILDO3 VLDO3 = 3V, VIN = 7.4V 100 175 -- mA LDO5 Switch-over Threshold to BYP1 VSWTH Rising Edge at BYP1 Regulation Point -- 4.66 -- V LDO5 Switch-over Equivalent Resistance RSW LDO5 to BYP1, 10mA -- 1.5 3 VCLK On-Resistance RVCLK Pull-up and Pull-down Resistance -- 10 -- VCLK Switching Frequency f VCLK -- 260 -- kHz Rising Edge -- 4.3 4.6 Falling Edge 3.7 3.9 4.1 Channel x Off -- 2.5 -- PGOOD Detect, VFBx Rising Edge 84 88 92 Hysteresis -- 8 -- High state, VPGOOD = 5.5V -- -- 1 A ISINK = 4mA -- -- 0.3 V 109 113 117 % -- 1 -- s VCLK Output UVLO LDO5 UVLO Threshold VUVLO5 LDO3 UVLO Threshold VUVLO3 V V Power Good Indicator PGOOD Threshold VPGxTH PGOOD Leakage Current PGOOD Output Low Voltage % Fault Detection OVP Trip Threshold VOVP FBx with Respect to Internal Reference OVP Propagation Delay UVP Trip Threshold VUVP UVP Detect, FBx Falling Edge 47 52 57 % UVP Shutdown Blanking Time tSHDN_UVP From ENx Enable -- 1.3 -- ms Thermal Shutdown Thermal Shutdown TSD -- 150 -- °C Thermal Shutdown Hysteresis TSD -- 10 -- °C Logic Inputs ENx Logic-High Threshold Logic-Low Voltage Internal Boost Switch Internal Boost Switch On-Resistance VENx_H SMPS On 1.6 -- -- VENx_L SMPS Off -- -- 0.4 RBST LDO5 to BOOTx -- 80 -- Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 V is a registered trademark of Richtek Technology Corporation. DS6575A/B-03 February 2016 RT6575A/B Parameter Symbol Test Conditions Min Typ Max High State, VBOOTx VUGATEx = 0.25V, VBOOTx VPHASEx = 5V -- 3 -- Low State, VUGATEx VPAHSEx = 0.25V, VBOOTx VPHASEx = 5V -- 2 -- High State, VLDO5 VLGATEx = 0.25V, VLDO5 = 5V -- 3 -- Low State, VLGATEx GND = 0.25V -- 1 -- LGATEx Rising -- 20 -- UGATEx Rising -- 30 -- Unit Power MOSFET Drivers UGATEx On-Resistance LGATEx On-Resistance Dead-Time RUGATEx RLGATEx tD ns Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS6575A/B-03 February 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT6575A/B Typical Application Circuit VIN 5V to 25V R8 0 C1 10µF C10 0.1µF R4 0 16 Q1 BSC0909 NS VOUT1 5V R3 0 L1 3.3µH C3 220µF R5* RT6575A 12 17 C2 0.1µF UGATE2 VIN BOOT2 Q3 BSC0909 NS 15 PHASE2 BOOT1 R9 0 C11 0.1µF 8 L2 2.2µH Q4 BSC0909 NS 11 C12 10µF C13 10µF VOUT2 3.3V C17 220µF R11* C14* R14 13k LGATE1 C21* FB2 4 14 C22 0.1µF R12 15k C6 0.1µF C5 0.1µF D2 19 C8 0.1µF 13 C9 1µF PGOOD 7 VCLK D4 CS1 20 6 Channel 2 Enable On CS2 3.3V Always On 1 R1 82.5k 5 R2 82.5k BAT254 CPO PGOOD Indicator 3 C7 0.1µF Channel 1 Enable 5V FB1 LDO3 D3 R15 20k BYP1 LDO5 2 D1 R13 10k Q2 BSC0909 NS PHASE1 C4* C18* 9 R10 0 UGATE1 LGATE2 18 10 C16 1µF EN1 EN2 GND 21 (Exposed Pad) Off * : Optional VIN 5V to 25V R8 0 C1 10µF C10 0.1µF R4 0 16 Q1 BSC0909 NS VOUT1 5V R3 0 L1 3.3µH C3 220µF R5* RT6575B 12 17 C2 0.1µF Q3 BSC0909 NS VIN BOOT2 BOOT1 15 14 C22 0.1µF C5 0.1µF D2 C12 10µF L2 2.2µH Q4 BSC0909 NS 11 VOUT2 3.3V C17 220µF R11* C14* R14 13k C21* 19 VCLK D4 C9 1µF PGOOD 7 CS1 20 6 Channel 2 Enable On 5V Always On FB1 CS2 PGOOD Indicator 3 C7 0.1µF Channel 1 Enable R15 20k 13 3.3V Always On 1 R1 82.5k 5 R2 82.5k BAT254 C16 1µF EN1 EN2 GND 21 (Exposed Pad) Off Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 C11 0.1µF 8 BYP1 CPO * : Optional R9 0 C13 10µF LGATE1 LDO3 D3 C8 0.1µF Q2 BSC0909 NS PHASE1 LDO5 2 D1 C6 0.1µF 9 R10 0 FB2 4 R12 15k R13 10k PHASE2 LGATE2 18 10 UGATE1 C4* C18* UGATE2 is a registered trademark of Richtek Technology Corporation. DS6575A/B-03 February 2016 RT6575A/B Typical Operating Characteristics Efficiency vs. Load Current Efficiency vs. Load Current 100 100 V OUT1 V OUT2 90 VIN VIN VIN VIN 80 = = = = 7.4V 11.1V 14.8V 20V Efficiency (%) Efficiency (%) 90 70 60 VIN VIN VIN VIN 80 70 60 EN1 = LDO3, EN2 = 0V, VCLK On 0.01 0.1 1 EN1 = EN2 = LDO3, VCLK On 40 0.001 10 0.01 0.1 Switching Frequency vs. Load Current 250 200 150 100 50 0.01 0.1 1 V OUT2 EN1 = 0V, EN2 = LDO3 VIN = 20V VIN = 12V VIN = 7.4V 0 0.001 Switching Frequency vs. Load Current V OUT1 EN1 = LDO3, EN2 = 0V 300 10 400 Switching Frequency (kHz)1 350 1 Load Current (A) Load Current (A) Switching Frequency (kHz)1 7.4V 11.1V 14.8V 20V 50 50 0.001 350 VIN = 20V VIN = 12V VIN = 7.4V 300 250 200 150 100 50 0 0.001 10 0.01 0.1 Load Current (A) 1 10 Load Current (A) Switching Frequency vs. Input Voltage Switching Frequency vs. Input Voltage 400 350 V OUT2 V OUT1 350 300 Frequency (kHz)1 Switching Frequency (kHz)1 = = = = 250 200 150 100 50 300 250 200 150 100 50 EN1 = 0V, EN2 = LDO3, ILOAD = 6A EN1 = LDO3, EN2 = 0V, ILOAD = 6A 0 0 5 7 9 11 13 15 17 19 21 23 Input Voltage (V) Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS6575A/B-03 February 2016 25 5 7 9 11 13 15 17 19 21 23 25 Input Voltage (V) is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT6575A/B Output Voltage vs. Load Current Output Voltage vs. Load Current 4.98 3.335 3.330 4.96 VIN VIN VIN VIN 4.95 = = = = Output Voltage (V) Output Voltage (V) 4.97 20V 14.8V 11.1V 7.4V 4.94 4.93 3.325 VIN VIN VIN VIN 3.320 3.315 = = = = 20V 14.8V 11.1V 7.4V 3.310 3.305 3.300 EN1 = LDO3, EN2 = 0V 4.92 0.0001 0.001 0.01 0.1 1 EN1 = 0V, EN2 = LDO3 3.295 0.0001 0.001 0.01 10 Load Current (A) 0.1 1 10 Load Current (A) LDO5 vs. Load Current LDO3 vs. Load Current 3.312 5.011 3.311 5.010 3.310 3.309 LDO3 (V) LDO5 (V) 5.009 5.008 5.007 3.308 3.307 3.306 3.305 5.006 3.304 5.005 3.303 VIN = 12V, EN1 = LDO3, EN2 = 0V, BYP1 Off VIN = 12V, EN1 = 0V, EN2 = LDO3 3.302 5.004 0 10 20 30 40 50 60 70 80 90 0 100 10 20 40 50 60 70 80 90 100 Load Current (mA) Load Current (mA) Quiescent Current vs. Input Voltage BYP1 Supply Current vs. Input Voltage 500 BYP1 Supply Current (µA) 30 Quiescent Current (µA) 30 25 20 15 10 5 490 480 470 460 450 440 430 420 410 EN1 = EN2 = LDO3, VCLK On, BYP On 0 EN1 = EN2 = LDO3, VCLK On, BYP On 400 5 7 9 11 13 15 17 19 21 23 Input Voltage (V) Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 25 5 7 9 11 13 15 17 19 21 23 25 Input Voltage (V) is a registered trademark of Richtek Technology Corporation. DS6575A/B-03 February 2016 RT6575A/B Power Off from EN Power On from EN EN (5V/Div) EN (5V/Div) VOUT2 (3V/Div) VOUT2 (3V/Div) VOUT1 (4V/Div) VOUT1 (4V/Div) LDO5 (5V/Div) LDO5 (5V/Div) VIN = 12V, EN1 = EN2 = LDO3, No Load VIN = 12V, EN1 = EN2 = LDO3, No Load Time (500μs/Div) Time (20ms/Div) VOUT1 Load Transient Response VOUT2 Load Transient Response VOUT1 (100mV/Div) VOUT2 (100mV/Div) UGATE1 (50V/Div) LGATE1 (6V/Div) UGATE2 (50V/Div) LGATE2 (6V/Div) IOUT1 (4A/Div) IOUT2 (4A/Div) VIN = 12V, EN1 = 0V, EN2 = LDO3, IOUT2 = 0A to 6A VIN = 12V, EN1 = LDO3, EN2 = 0V, IOUT1 = 0A to 6A Time (50μs/Div) Time (50μs/Div) OVP UVP VOUT1 (5V/Div) VOUT1 (2V/Div) UGATE1 (20V/Div) IL1 (4A/Div) PGOOD (4V/Div) LGATE1 (5V/Div) VIN = 12V, EN1 = EN2 = LDO3, No Load Time (100μs/Div) Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS6575A/B-03 February 2016 LGATE1 (10V/Div) UGATE1 IL1 VIN = 12V, EN1 = EN2 = LDO3 Time (200μs/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT6575A/B Application Information The RT6575A/B is a dual-channel, low quiescent, Mach ResponseTM DRVTM mode synchronous Buck controller targeted for Ultrabook system power supply solutions. Richtek's Mach ResponseTM technology provides fast response to load steps. The topology solves the poor load transient response timing problems of fixed frequency current mode PWMs, and avoids the problems caused by widely varying switching frequencies in CCR (constant current ripple) constant on-time and constant off-time PWM schemes. A special adaptive on-time control trades off the performance and efficiency over wide input voltage range. The RT6575A/B includes 5V (LDO5) and 3.3V (LDO3) linear regulators. The LDO5 linear regulator steps down the battery voltage to supply both internal circuitry and gate drivers. The synchronous switch gate drivers are directly powered by LDO5. When VOUT1 rises above 4.66V, an automatic circuit disconnects the linear regulator and allows the device to be powered by VOUT1 via the BYP1 pin. on-time is inversely proportional to the input voltage as measured by VIN and proportional to the output voltage. The inductor ripple current operating point remains relatively constant, resulting in easy design methodology and predictable output voltage ripple. The frequency of 3V output controller is set higher than the frequency of 5V output controller. This is done to prevent audio frequency “ beating” between the two sides, which switch asynchronously for each side. The RT6575A/B adaptively changes the operation frequency according to the input voltage. Higher input voltage usually comes from an external adapter, so the RT6575A/B operates with higher frequency to have better performance. Lower input voltage usually comes from a battery, so the RT6575A/B operates with lower switching frequency for lower switching losses. For a specific input voltage range, the switching cycle period is given by : For 5V VOUT, Period (sec.) = PWM Operation The Mach ResponseTM DRVTM mode controller relies on the output filter capacitor's Effective Series Resistance (ESR) to act as a current sense resistor, so that the output ripple voltage provides the PWM ramp signal. Referring to the RT6575A/B's Function Block Diagram, the synchronous high-side MOSFET is turned on at the beginning of each cycle. After the internal one-shot timer expires, the MOSFET will be turned off. The pulse width of this one-shot is determined by the converter's input output voltages to keep the frequency fairly constant over the entire input voltage range. Another one-shot sets a minimum off-time (200ns typ.). The on-time one-shot will be triggered if the error comparator is high, the low-side switch current is below the current limit threshold, and the minimum off-time one-shot has timed out. PWM Frequency and On-time Control For each specific input voltage range, the Mach ResponseTM control architecture runs with pseudo constant frequency by feed forwarding the input and output voltage into the on-time one-shot timer. The high-side switch Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 VIN 2.7 10-6 VIN 3.79 For 3.3V VOUT, Period (sec.) = VIN 2.45 10-6 VIN 2.59 where the VIN is in volt. The on-time guaranteed in the Electrical Characteristics table is influenced by switching delays in the external high-side power MOSFET. Diode Emulation Mode In diode emulation mode, the RT6575A/B automatically reduces switching frequency at light load conditions to maintain high efficiency. This reduction of frequency is achieved smoothly. As the output current decreases from heavy load condition, the inductor current is also reduced, and eventually comes to the point that its current valley touches zero, which is the boundary between continuous conduction and discontinuous conduction modes. To emulate the behavior of diodes, the low-side MOSFET allows only partial negative current to flow when the inductor free wheeling current becomes negative. As the load current is further decreased, it takes longer and longer is a registered trademark of Richtek Technology Corporation. DS6575A/B-03 February 2016 RT6575A/B time to discharge the output capacitor to the level that requires the next “ON” cycle. The on-time is kept the same as that in the heavy load condition. In reverse, when the output current increases from light load to heavy load, the switching frequency increases to the preset value as the inductor current reaches the continuous conduction. The transition load point to the light load operation is shown in Figure 1. and can be calculated as follows : IL Slope = (VIN - VOUT) / L IPEAK Current Limit Setting The RT6575A/B has cycle-by-cycle current limit control. The current limit circuit employs a unique “valley” current sensing algorithm. If the magnitude of the current sense signal at PHASEx is above the current limit threshold, the PWM is not allowed to initiate a new cycle (Figure 2). The actual peak current is greater than the current limit threshold by an amount equal to the inductor ripple current. Therefore, the exact current limit characteristic and maximum load capability are a function of the sense resistance, inductor value, battery and output voltage. IL ILOAD = IPEAK / 2 IPEAK ILOAD 0 t tON ILIMIT Figure 1. Boundary Condition of CCM/DEM (V VOUT ) ILOAD(SKIP) IN tON 2L where tON is the on-time. The switching waveforms may appear noisy and asynchronous when light load causes diode emulation operation. This is normal and results in high efficiency. Trade offs in PFM noise vs. light load efficiency is made by varying the inductor value. Generally, low inductor values produce a broader efficiency vs. load curve, while higher values result in higher full load efficiency (assuming that the coil resistance remains fixed) and less output voltage ripple. Penalties for using higher inductor values include larger physical size and degraded load transient response (especially at low input voltage levels). Linear Regulators (LDOx) The RT6575A/B includes 5V (LDO5) and 3.3V (LDO3) linear regulators. The regulators can supply up to 100mA for external loads. Bypass LDOx with a 1μF to 4.7μF, and recommended value is 1μF ceramic capacitor. When VOUT1 is higher than the switch over threshold (4.66V), an internal 1.5Ω P-MOSFET switch connects BYP1 to the LDO5 pin while simultaneously disconnects the internal linear regulator. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS6575A/B-03 February 2016 t Figure 2. “Valley” Current Limit The RT6575A/B uses the on resistance of the synchronous rectifier as the current sense element and supports temperature compensated MOSFET RDS(ON) sensing. The RILIM resistor between the CSx pin and GND sets the current limit threshold. The resistor RILIM is connected to a current source from CSx which is 10μA (typ.) at room temperature. The current source has a 4700ppm/°C temperature slope to compensate the temperature dependency of the RDS(ON). When the voltage drop across the sense resistor or low-side MOSFET equals 1/8 the voltage across the RILIM resistor, positive current limit will be activated. The high-side MOSFET will not be turned on until the voltage drop across the MOSFET falls below 1/8 the voltage across the RILIM resistor. Choose a current limit resistor according to the following equation : VLIMIT = (RLIMIT x 10μA) / 8 = ILIMIT x RDS(ON) RLIMIT = (ILIMIT x RDS(ON)) x 8 / 10μA Carefully observe the PC board layout guidelines to ensure that noise and DC errors do not corrupt the current sense signal at PHASEx and GND. Mount or place the IC close to the low-side MOSFET. is a registered trademark of Richtek Technology Corporation. www.richtek.com 15 RT6575A/B VCLK for Charge Pump A 260kHz VCLK signal can be used for the external charge pump circuit. The VCLK signal becomes available when EN1 enters ON state. VCLK driver circuit is driven by BYP1 voltage. The external 14V charge pump is driven by VCLK. As shown in Figure 3, when VCLK is low, C1 will be charged by VOUT1 through D1. C1 voltage is equal to VOUT1 minus the diode drop. When VCLK becomes high, C1 transfers the charge to C2 through D2 and charges C2 voltage to VVCLK plus C1 voltage. As VCLK transitions low on the next cycle, C3 is charged to C2 voltage minus a diode drop through D3. Finally, C3 charges C4 through D4 when VCLK switches high. Thus, the total charge pump voltage, VCP, is : where VVCLK is the peak voltage of the VCLK driver which is equal to LDO5 and VD is the forward voltage dropped across the Schottky diode. VCLK C3 VOUT1 Charge Pump D1 D2 D3 C2 For high current applications, some combinations of high and low-side MOSFETs may cause excessive gate drain coupling, which leads to efficiency killing, EMI producing, and shoot through currents. This is often remedied by adding a resistor in series with BOOTx, which increases the turn-on time of the high-side MOSFET without degrading the turn-off time. See Figure 4. VIN UGATEx BOOTx RBOOT PHASEx Figure 4. Increasing the UGATEx Rise Time VCP = VOUT1 + 2 x VVCLK − 4 x VD C1 supply. The instantaneous drive current is supplied by an input capacitor connected between LDO5 and GND. D4 C4 Figure 3. Charge Pump Circuit Connected to VCLK Soft-Start The RT6575A/B provides an internal soft-start function to prevent large inrush current and output voltage overshoot when the converter starts up. The soft-start (SS) automatically begins once the chip is enabled. During softstart, it clamps the ramping of internal reference voltage which is compared with FBx signal. The typical soft-start duration is 0.9ms. A unique PWM duty limit control that prevents output over-voltage during soft-start period is designed specifically for FBx floating. MOSFET Gate Driver (UGATEx, LGATEx) UVLO Protection The high-side driver is designed to drive high current, low RDS(ON) N-MOSFET(s). When configured as a floating driver, 5V bias voltage is delivered from the LDO5 supply. The average drive current is also calculated by the gate charge at VGS = 5V times switching frequency. The instantaneous drive current is supplied by the flying capacitor between the BOOTx and PHASEx pins. A dead-time to prevent shoot through is internally generated from high-side MOSFET off to low-side MOSFET on and low-side MOSFET off to high-side MOSFET on. The RT6575A/B has LDO5 under-voltage lock out protection (UVLO). When the LDO5 voltage is lower than 3.9V (typ.) and the LDO3 voltage is lower than 2.5V (typ.), both switch power supplies are shut off. This is a nonlatch protection. The low-side driver is designed to drive high current low RDS(ON) N-MOSFET(s). The internal pull down transistor that drives LGATEx low is robust, with a 1Ω typical onresistance. A 5V bias voltage is delivered from the LDO5 Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 16 Power Good Output (PGOOD) PGOOD is an open-drain output and requires a pull-up resistor. PGOOD is actively held low in soft-start, standby, and shutdown. For RT6575A/B, PGOOD is released when both output voltages are above 88% of nominal regulation point. The PGOOD signal goes low if either output turns off or is 20% below or 13% over its nominal regulation point. is a registered trademark of Richtek Technology Corporation. DS6575A/B-03 February 2016 RT6575A/B Output Over-Voltage Protection (OVP) Thermal Protection The output voltage can be continuously monitored for overvoltage condition. If the output voltage exceeds 13% of its set voltage threshold, the over-voltage protection is triggered and the LGATEx low-side gate drivers are forced high. This activates the low-side MOSFET switch, which rapidly discharges the output capacitor and pulls the output voltage downward. The RT6575A/B features thermal shutdown to prevent damage from excessive heat dissipation. Thermal shutdown occurs when the die temperature exceeds 150°C. All internal circuitries are turned off during thermal shutdown. The RT6575A/B triggers thermal shutdown if LDO5 is not supplied from VOUT1, while input voltage on VIN and drawing current from LDO5 are too high. Nevertheless, even if LDO5 is supplied from VOUT1, overloading LDO5 can cause large power dissipation on automatic switches, which may still result in thermal shutdown. The RT6575A/B is latched once OVP is triggered and can only be released by either toggling ENx or cycling VIN. There is a 1μs delay built into the over-voltage protection circuit to prevent false transition. Note that latching LGATEx high will cause the output voltage to dip slightly negative due to previously stored energy in the LC tank circuit. For loads that cannot tolerate a negative voltage, place a power Schottky diode across the output to act as a reverse polarity clamp. If the over-voltage condition is caused by a shorted in high-side switch, turning the low-side MOSFET on 100% will create an electrical shorted circuit between the battery and GND to blow the fuse and disconnecting the battery from the output. Output Under-Voltage Protection (UVP) The output voltage can be continuously monitored for undervoltage condition. If the output is less than 52% (typ.) of its set voltage threshold, the under-voltage protection will be triggered and then both UGATEx and LGATEx gate drivers will be forced low. The UVP is ignored for at least 1.3ms (typ.) after a start-up or a rising edge on ENx. Toggle ENx or cycle VIN to reset the UVP fault latch and restart the controller. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS6575A/B-03 February 2016 Discharge Mode (Soft Discharge) When ENx is low the output under-voltage fault latch is set, the output discharge mode will be triggered. During discharge mode, an internal switch creates a path for discharging the output capacitors' residual charge to GND. Standby Mode When VIN exceeds POR threshold and ENx < 0.4V, the RT6575A/B operate in standby mode, and CH1 and CH2 are OFF state. For the RT6575A, LDO5 is OFF and LDO3 is ON state and approximately consumes 15μA of input current. For the RT6575B, LDO5 and LDO3 are ON state and approximately consumes 25μA while in standby mode. Power-Up Sequencing and On/Off Controls (ENx) EN1 and EN2 control the power-up sequencing of the two channels of the Buck converter. The 0.4V falling edge threshold on ENx can be used to detect a specific analog voltage level and to shutdown the device. Once in shutdown, the 1.6V rising edge threshold activates, providing sufficient hysteresis for most applications. is a registered trademark of Richtek Technology Corporation. www.richtek.com 17 RT6575A/B Table 1. Operation Mode Truth Table Mode Condition Comment LDO Over Current Limit LDOx < UVLO threshold Transitions to discharge mode after VIN POR. LDO5 and LDO3 remain active. Run ENx = high, VOUT1 or VOUT2 are enabled Normal Operation. Over-Voltage Protection Either output >113% of the nominal level. LGATEx is forced high. LDO3 and LDO5 are active. Exit by VIN POR or by toggling ENx. Under-Voltage Protection Either output < 52% of the nominal level Both UGATEx and LGATEx are forced low and enter after 1.3ms time-out expires and output is discharge mode. LDO3 and LDO5 are active. Exit by VIN POR or by toggling ENx. enabled Discharge During discharge mode, there is one path to Either output is still high in standby mode discharge the output capacitors’ residual charge to GND via an internal switch. Standby VIN > POR ENx < 0.4V For RT6575A : LDO3 is active For RT6575B : LDO3, LDO5 are active Thermal Shutdown T J > 150°C All circuitries are off. Exit by VIN POR. Table 2. Enabling/PGOOD State (RT6575A) EN1 EN2 LDO5 LDO3 CH1 (5VOUT) CH2 (3.3VOUT) VCLK PGOOD OFF OFF OFF ON OFF OFF OFF Low ON OFF ON ON ON OFF ON Low OFF ON ON ON OFF ON OFF Low ON ON ON ON ON ON ON High Table 3. Enabling/PGOOD State (RT6575B) EN1 EN2 LDO5 LDO3 CH1 (5VOUT) CH2 (3.3VOUT) VCLK PGOOD OFF OFF ON ON OFF OFF OFF Low ON OFF ON ON ON OFF ON Low OFF ON ON ON OFF ON OFF Low ON ON ON ON ON ON ON High Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 18 is a registered trademark of Richtek Technology Corporation. DS6575A/B-03 February 2016 RT6575A/B VIN POR threshold VIN LDO3 EN threshold EN1 VREG5 UVLO threshold Start-Up Time LDO5 Soft-Start Time 5V VOUT EN threshold EN2 Start-Up Time 3.3V VOUT PGOOD Soft-Start Time PGOOD Delay Figure 5. RT6575A Timing VIN POR threshold VIN 2.5V LDO3 LDO5 EN threshold Start-Up Time EN1 Soft-Start Time 5V VOUT EN threshold EN2 Start-Up Time 3.3V VOUT PGOOD Soft-Start Time PGOOD Delay Figure 6. RT6575B Timing Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS6575A/B-03 February 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 19 RT6575A/B Output Voltage Setting (FBx) Output Capacitor Selection Connect a resistive voltage divider at the FBx pin between VOUTx and GND to adjust the output voltage from 2V to 5.5V for CH1 and 2V to 4V for CH2, as shown in Figure 7. The recommended R2 value is between 10kΩ to 20kΩ, and solve for R1 using the equation below : The capacitor value and ESR determine the amount of output voltage ripple and load transient response. Thus, the capacitor value must be greater than the largest value calculated from the equations below : R1 VOUT(Valley) VFBx 1 + R2 VSAG where VFBx is 2V (typ.). 2 COUT VIN tON VOUTx (tON + tOFF(MIN) ) VSOAR VIN UGATEx VOUTx PHASEx LGATEx (ILOAD )2 L (tON + tOFF(MIN) ) R1 FBx R2 (ILOAD )2 L 2 COUT VOUTx 1 VPP LIR ILOAD(MAX) ESR + 8 C f OUT where VSAG and VSOAR are the allowable amount of undershoot and overshoot voltage during load transient, Vp-p is the output ripple voltage, and tOFF(MIN) is the minimum off-time. GND Thermal Considerations Figure 7. Setting VOUTx with a resistive voltage divider Output Inductor Selection The switching frequency (on-time) and operating point (% ripple or LIR) determine the inductor value as shown below : t (VIN VOUTx ) L ON LIR ILOAD(MAX) where LIR is the ratio of the peak-to-peak ripple current to the average inductor current. Find a low-loss inductor having the lowest possible DC resistance that fits in the allotted dimensions. Ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200kHz. The core must be large enough not to saturate at the peak inductor current, IPEAK : IPEAK = ILOAD(MAX) + [ (LIR / 2) x ILOAD(MAX) ] The calculation above shall serve as a general reference. To further improve transient response, the output inductance can be further reduced. Of course, besides the inductor, the output capacitor should also be considered when improving transient response. Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 20 For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For WQFN-20L 3x3 package, the thermal resistance, θJA, is 30°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : P D(MAX) = (125°C − 25°C) / (30°C/W) = 3.33W for WQFN-20L 3x3 package is a registered trademark of Richtek Technology Corporation. DS6575A/B-03 February 2016 RT6575A/B Maximum Power Dissipation (W)1 The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 8 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. 4.0 Layout Considerations Layout is very important in high frequency switching converter design. Improper PCB layout can radiate excessive noise and contribute to the converter’s instability. Certain points must be considered before starting a layout with the RT6575A/B. Four-Layer PCB 3.5 Place the filter capacitor close to the IC, within 12mm (0.5 inch) if possible. Keep current limit setting network as close as possible to the IC. Routing of the network should avoid coupling to high-voltage switching node. Connections from the drivers to the respective gate of the high-side or the low-side MOSFET should be as short as possible to reduce stray inductance. Use 0.65mm (25 mils) or wider trace. All sensitive analog traces and components such as FBx, PGOOD, and should be placed away from high voltage switching nodes such as PHASEx, LGATEx, UGATEx, or BOOTx nodes to avoid coupling. Use internal layer(s) as ground plane(s) and shield the feedback trace from power traces and components. Place ground terminal of VIN capacitor(s), V OUTx capacitor(s), and Source of low-side MOSFETs as close to each other as possible. The PCB trace of PHASEx node, which connects to Source of high-side MOSFET, Drain of low-side MOSFET and high voltage side of the inductor, should be as short and wide as possible. 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 8. Derating Curve of Maximum Power Dissipation Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS6575A/B-03 February 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 21 RT6575A/B Outline Dimension 1 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 D 2.900 3.100 0.114 0.122 D2 1.650 1.750 0.065 0.069 E 2.900 3.100 0.114 0.122 E2 1.650 1.750 0.065 0.069 e L 0.400 0.350 0.016 0.450 0.014 0.018 W-Type 20L QFN 3x3 Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com 22 DS6575A/B-03 February 2016