NTMD4820N D

NTMD4820N
Power MOSFET
30 V, 8 A, Dual N−Channel, SOIC−8
Features
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
Dual SOIC−8 Surface Mount Package Saves Board Space
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RDS(on) Max
V(BR)DSS
Applications
20 mW @ 10 V
30 V
• Disk Drives
• DC−DC Converters
• Printers
8A
27 mW @ 4.5 V
N−Channel
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Symbol
Rating
D
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
6.4
A
Continuous Drain
Current RqJA (Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
1.28
W
Continuous Drain
Current RqJA (Note 2)
TA = 25°C
ID
4.9
A
Power Dissipation
RqJA (Note 2)
ID Max
TA = 70°C
Steady
State
TA = 70°C
TA = 25°C
Continuous Drain
Current RqJA t < 10 s
(Note 1)
TA = 25°C
Power Dissipation
RqJA t < 10 s (Note 1)
TA = 25°C
Pulsed Drain Current
Operating Junction and Storage Temperature
Source Current (Body Diode)
S
MARKING DIAGRAM
& PIN ASSIGNMENT
3.9
PD
0.75
ID
8.0
TA = 70°C
TA = 25°C,
tp = 10 ms
G
5.1
W
D1 D1 D2 D2
8
A
8
6.4
PD
2.0
W
IDM
32
A
TJ, TSTG
−55 to
+150
°C
IS
2.0
A
Single Pulse Drain−to−Source Avalanche
Energy TJ = 25C, VDD = 30 V, VGS = 10 V,
IL = 11 Apk, L = 1.0 mH, RG = 25 W
EAS
60.5
mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Rating
Symbol
Max
Unit
Junction−to−Ambient – Steady State (Note 1)
RqJA
97.5
Junction−to−Ambient – t ≤ 10 s (Note 1)
RqJA
62
Junction−to−FOOT (Drain)
RqJF
40
Junction−to−Ambient – Steady State (Note 2)
RqJA
167.5
1
SOIC−8
CASE 751
STYLE 11
4820N
AYWW
G
1
S1 G1 S2 G2
4820N
A
Y
WW
G
= Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
THERMAL RESISTANCE RATINGS
Device
NTMD4820NR2G
°C/W
Package
Shipping†
SOIC−8
(Pb−Free)
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
1. Surface−mounted on FR4 board using 1 inch sq pad size, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
© Semiconductor Components Industries, LLC, 2009
August, 2009 − Rev. 2
1
Publication Order Number:
NTMD4820N/D
NTMD4820N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)jk
Characteristic
Symbol
Test Condition
Min
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage Temperature Coefficient
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
V(BR)DSS/TJ
IDSS
V
26
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25°C
1.0
TJ = 100°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
3.0
V
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
Forward Transconductance
VGS(TH)/TJ
1.5
5.0
RDS(on)
gFS
mV/°C
VGS = 10 V
ID = 7.5 A
15
20
VGS = 4.5 V
ID = 6.5 A
20
27
VDS = 1.5 V, ID = 7.5 A
21
mW
S
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
125
Total Gate Charge
QG(TOT)
7.7
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
QG(TOT)
940
VGS = 0 V, f = 1.0 MHz, VDS = 15 V
VGS = 4.5 V, VDS = 15 V, ID = 7.5 A
225
pF
1.1
nC
3.3
3.2
VGS = 10 V, VDS = 15 V, ID = 7.5 A
15.2
nC
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
td(OFF)
9.4
VGS = 10 V, VDD = 15 V,
ID = 1.0 A, RG = 6.0 W
tf
4.0
ns
21
6.5
DRAIN−TO−SOURCE CHARACTERISTICS
Forward Diode Voltage
VSD
Reverse Recovery Time
tRR
Charge Time
Ta
Discharge Time
Reverse Recovery Time
Tb
VGS = 0 V
ID = 2.0 A
TJ = 25°C
0.75
TJ = 125°C
0.59
1.0
17.8
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 2.0 A
V
ns
8.3
9.5
QRR
8.0
nC
LS
0.66
nH
0.20
nH
PACKAGE PARASITIC VALUES
Source Inductance
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
TA = 25°C
1.50
1.5
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
nH
3.0
W
NTMD4820N
TYPICAL PERFORMANCE CURVES
6V
5V
4.5 V
7.5
3.4 V
5
3.2 V
2.5
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
4.2 V
4V
3.8 V
10
VDS ≥ 10 V
3.6 V
3.0 V
2.8 V
0
0.5
1.0
1.5
2.0
2.5
3.5
3.0
5
4.0
TJ = 25°C
1.5
1
TJ = −55°C
2.5
2
3.5
3
4
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
TJ = 25°C
ID = 7.5 A
0.085
0.075
0.065
0.055
0.045
0.035
0.025
0.015
3
4
5
6
7
8
9
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
10
TJ = 25°C
0.025
0.015
VGS = 10 V
0.010
0.005
0
2
6
4
10
8
14
12
ID, DRAIN CURRENT (AMPS)
100000
VGS = 0 V
ID = 7.5 A
VGS = 10 V
IDSS, LEAKAGE (nA)
1.4
VGS = 4.5 V
0.020
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.6
1.5
4.5
0.030
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = 125°C
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.095
0.005
10
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
12.5
15
TJ = 25°C
10V
ID, DRAIN CURRENT (AMPS)
15
1.3
1.2
1.1
1.0
0.9
10000
TJ = 150°C
1000
TJ = 100°C
0.8
0.7
0.6
−50
−25
0
25
50
75
100
125
150
100
3
6
9
12
15
18
21
24
27
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
30
NTMD4820N
C, CAPACITANCE (pF)
300
200
100
0
TJ = 25°C
VGS = 0 V
Ciss
Coss
Crss
0
5
10
15
20
25
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
30
10
9
VDS
8
12
6
5
8
3
4
2
ID = 7.5 A
TJ = 25°C
1
0
2
0
8
12
6
10
4
QG, TOTAL GATE CHARGE (nC)
14
0
16
Figure 8. Gate−To−Source and
Drain−To−Source Voltage vs. Total Charge
3
IS, SOURCE CURRENT (AMPS)
VDD = 10 V
ID = 1 A
VGS = 15 V
td(off)
100
t, TIME (ns)
QGD
QGS
4
1000
tf
tr
td(on)
10
1
10
1
0.4
0.5
0.6
0.7
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100 ms
1 ms
1
10 ms
VGS = 20 V
SINGLE PULSE
TC = 25°C
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
10
100
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
10
0.01
0.1
2
RG, GATE RESISTANCE (OHMS)
10 ms
0.1
VGS = 0 V
TJ = 25°C
0
0.3
100
100
ID, DRAIN CURRENT (AMPS)
16
VGS
7
Figure 7. Capacitance Variation
1
20
QT
VDS , DRAIN-TO-SOURCE VOLTAGE (VOLTS)
1300
1200
1100
1000
900
800
700
600
500
400
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
TYPICAL PERFORMANCE CURVES
75
ID = 11 A
50
25
0
25
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
50
75
100
125
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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4
0.8
150
NTMD4820N
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AJ
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
S
M
J
SOLDERING FOOTPRINT*
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
STYLE 11:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
1.52
0.060
7.0
0.275
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NTMD4820N/D