Semiconductor Qualification Test Report: BiCMOS-C (QTR: 2013-00241)

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Report Title:
Qualification Test Report
Report Type:
See Attached
Date:
See Attached
QTR: 2013- 00241
Wafer Process: BiCMOS-C
HMC675
HMC675
HMC676
HMC676
HMC678
HMC679
HMC706
HMC720
HMC720
HMC721
HMC721
HMC722
HMC722
HMC723
HMC723
HMC724
HMC725
HMC726
HMC727
HMC728
HMC729
HMC744
HMC745
HMC746
HMC747
HMC748
HMC749
HMC791
HMC813
HMC813
HMC841
HMC842
HMC843
HMC844
HMC847
HMC848
HMC850
HMC851
HMC853
HMC854
HMC855
HMC856
HMC865
HMC866
HMC874
HMC875
HMC876
HMC905
HMC910
HMC913
Rev: 05
HMC948
HMC954
HMC955
HMC974
HMC1020
HMC1027
HMC1094
QTR: 2013- 00241
Wafer Process: BiCMOS-C
Rev: 05
Introduction
The testing performed for this report is designed to accelerate the predominant failure mode, electro-migration
(EM), for the devices under test. The devices are stressed at high temperature and DC biased to simulate a lifetime
of use at typical operating temperatures. Using the Arrhenius equation, the acceleration factor (AF) is calculated for
the stress testing based on the stress temperature and the typical use operating temperature.
This report is intended to summarize all of the High Temperature Operating Life Test (HTOL) data for the
BiCMOS-C process. The FIT/MTTF data contained in this report includes all the stress testing performed on this
process to date and will be updated periodically as additional data becomes available. Data sheets for the tested
devices can be found at www.hittite.com.
Glossary of Terms & Definitions:
1. HTOL: High Temperature Operating Life. This test is used to determine the effects of bias conditions and
temperature on semiconductor devices over time. It simulates the devices’ operating condition in an accelerated
way, through high temperature and/or bias voltage, and is primarily for device qualification and reliability
monitoring. This test was performed in accordance with JEDEC JESD22-A108.
2. Operating Junction Temp (Toj): Temperature of the die active circuitry during typical operation.
3. Stress Junction Temp (Tsj): Temperature of the die active circuitry during stress testing.
QTR: 2013- 00241
Wafer Process: BiCMOS-C
Rev: 05
Qualification Sample Selection:
All qualification devices used were manufactured and tested on standard production processes and met pre-stress
acceptance test requirements.
Summary of Qualification Tests:
HMC613 (QTR2009-00001)
TEST
QTY IN
QTY OUT
PASS/FAIL
Initial Electrical
57
57
Complete
HTOL, 1000 hours
57
57
Complete
Post HTOL Electrical Test
57
57
Pass
Bond Pull
10
10
Pass
SEM Inspection
5
5
Pass
Metal and Dielectric Thickness
5
5
Pass
QTY IN
QTY OUT
PASS / FAIL
Initial Electrical
80
80
Complete
HTOL, 1000 hours
80
80
Complete
Post HTOL Electrical Test
80
80
Pass
NOTES
30 wires from 10
devices.
HMC913 (QTR2009-00001)
TEST
NOTES
QTR: 2013- 00241
Wafer Process: BiCMOS-C
Rev: 05
HMC913 (QTR2012-00053)
TEST
QTY IN
QTY OUT
PASS / FAIL
Initial Electrical
72
72
Complete
HTOL, 1000 hours
72
72
Complete
Post HTOL Electrical Test
72
72
Pass
NOTES
HMC913 (QTR2012-00358)
TEST
QTY IN QTY OUT
PASS / FAIL
Initial Electrical
78
78
Complete
HTOL, 1000 hours
78
78
Complete
Post HTOL Electrical Test
78
78
Pass
NOTES
HMC910 (QTR2012-00304)
TEST
QTY IN QTY OUT
PASS / FAIL
Initial Electrical
78
78
Complete
HTOL, 1000 hours
78
78
Complete
Post HTOL Electrical Test
78
78
Pass
NOTES
QTR: 2013- 00241
Wafer Process: BiCMOS-C
Rev: 05
HMC6XXX (QTR2013-00340)
TEST
QTY IN QTY OUT
PASS / FAIL
Initial Electrical
6
6
Complete
HTOL, 5039 hours
6
6
Complete
Post HTOL Electrical Test
6
6
Pass
NOTES
HMC6XXX (QTR2013-00340)
TEST
QTY IN QTY OUT
PASS / FAIL
Initial Electrical
14
14
Complete
HTOL, 2000 hours
14
14
Complete
Post HTOL Electrical Test
14
14
Pass
NOTES
HMC1027 (QTR2013-00415)
TEST
QTY IN QTY OUT
PASS / FAIL
Initial Electrical
79
79
Complete
HTOL, 1000 hours
79
79
Complete
Post HTOL Electrical Test
79
79
Pass
NOTES
QTR: 2013- 00241
Wafer Process: BiCMOS-C
Rev: 05
HMC1020 (QTR2014-00405)
TEST
QTY IN QTY OUT
PASS / FAIL
Initial Electrical
81
81
Complete
HTOL, 1000 hours, Tj=150°C
81
81
Complete
Post HTOL Electrical Test
81
81
Pass
NOTES
BiCMOS-C Failure Rate Estimate
Based on the HTOL test results, a failure rate estimation was determined using the following
parameters:
With device case temp, Tc = 60°C
HMC613 (QTR2009-00001)
Operating Junction Temp (Toj) =83°C(356°K)
Stress Junction Temp (Tsj) = 150°C(423°K)
HMC913 (QTR2009-00001)
Operating Junction Temp (Toj) =83°C(356°K)
Stress Junction Temp (Tsj) = 150°C(423°K)
HMC913 (QTR2012-00053)
Operating Junction Temp (Toj) =83°C(356°K)
Stress Junction Temp (Tsj) = 175°C(448°K)
HMC913 (QTR2012-00358)
Operating Junction Temp (Toj) =83°C(356°K)
Stress Junction Temp (Tsj) = 175°C(448°K)
HMC910 (QTR2012-00304)
Operating Junction Temp (Toj) =88.5°C(361.5°K)
Stress Junction Temp (Tsj) = 150°C(423°K)
QTR: 2013- 00241
Wafer Process: BiCMOS-C
HMC6XXX (QTR2013-00340)
Operating Junction Temp (Toj) =87°C(360°K)
Stress Junction Temp (Tsj) = 122°C(395°K)
HMC1027 (QTR2013-00415)
Operating Junction Temp (Toj) =84°C(357°K)
Stress Junction Temp (Tsj) = 125°C(398°K)
HMC1020 (QTR2014-00405)
Operating Junction Temp (Toj) =67°C(340°K)
Stress Junction Temp (Tsj) = 150°C(423°K)
Device hours:
HMC613 (QTR2009-00001) = (57 X 1000hrs) = 57,000 hours
HMC913 (QTR2009-00001) = (80 X 1000hrs) = 80,000 hours
HMC913 (QTR2012-00053) = (72 X 1033hrs) = 72,000 hours
HMC913 (QTR2012-00358) = (78 X 1000hrs) = 78,000 hours
HMC910 (QTR2012-00304) = (78 X 1000hrs) = 78,000 hours
HMC6XXX (QTR2013-00340) = (6 X 5039hrs) = 30,234 hours
HMC6XXX (QTR2013-00340) = (14 X 2000hrs) = 28,000 hours
HMC1027 (QTR2013-00415) = (79 X 1000hrs) = 79,000 hours
HMC1020 (QTR2014-00405) = (81 X 1000hrs) = 81,000 hours
Rev: 05
QTR: 2013- 00241
Wafer Process: BiCMOS-C
Rev: 05
For BiCMOS-C MMIC, Activation Energy = 0.7 eV
Acceleration Factor (AF):
HMC613 (QTR2009-00001) Acceleration Factor = exp[0.7/8.6x10-5(1/356-1/423)] = 37.4
HMC913 (QTR2009-00001) Acceleration Factor = exp[0.7/8.6x10-5(1/356-1/423)] = 37.4
HMC913 (QTR2012-00053) Acceleration Factor = exp[0.7/8.6x10-5(1/356-1/448)] = 109.4
HMC913 (QTR2012-00358) Acceleration Factor = exp[0.7/8.6x10-5(1/356-1/448)] = 109.4
HMC910 (QTR2012-00304) Acceleration Factor = exp[0.7/8.6x10-5(1/361.5-1/423)] = 26.4
HMC6XXX (QTR2013-00340) Acceleration Factor = exp[0.7/8.6x10-5(1/360-1/395)] = 7.4
HMC1027 (QTR2013-00415) Acceleration Factor = exp[0.7/8.6x10-5(1/357-1/398)] = 10.5
HMC1020 (QTR2014-00405) Acceleration Factor = exp[0.7/8.6x10-5(1/340-1/423)] = 109.7
Equivalent hours = Device hours x Acceleration Factor
Equivalent hours = (57,000x37.4)+(80,000x37.4)+(72,000x109.4)+(78,000x109.4)+(78,000x26.4)+
(30,234x7.4)+(28,000x7.4)+(79,000x10.5)+(81,000x109.7) = 4.17x107 hours
Since there were no failures and we used a time terminated test, F=0, and R = 2F+2 = 2
The failure rate was calculated using Chi Square Statistic:
at 60% and 90% Confidence Level (CL), with 0 units out of spec
and a 60°C package backside temp;
Failure Rate
60 = [(2)60,2]/(2X 4.17x107 )] = 1.8/ 8.33x107 = 2.20x10-8 failures/hour or 22.0 FIT or MTTF = 4.55x107 hours
90 = [(2)90,2]/(2X 4.17x107 )] = 4.6/ 8.33x107 = 5.53x10-8 failures/hour or 55.3 FIT or MTTF = 1.81x107 hours