PD - 94769 IRFZ46Z IRFZ46ZS IRFZ46ZL AUTOMOTIVE MOSFET Features O O O O O O Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Description HEXFET® Power MOSFET D VDSS = 55V RDS(on) = 13.6mΩ G Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. ID = 51A S TO-220AB IRFZ46Z D2Pak IRFZ46ZS TO-262 IRFZ46ZL Absolute Maximum Ratings Max. Units ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) Parameter 51 A ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig. 9) 36 IDM Pulsed Drain Current 200 PD @TC = 25°C Maximum Power Dissipation c Linear Derating Factor VGS Gate-to-Source Voltage EAS Single Pulse Avalanche Energy (Thermally Limited) EAS (tested) Single Pulse Avalanche Energy Tested Value IAR Avalanche Current EAR Repetitive Avalanche Energy TJ Operating Junction and TSTG Storage Temperature Range c i d 82 W 0.54 ± 20 W/°C V 63 mJ 97 See Fig.12a,12b,15,16 h A mJ °C -55 to + 175 Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m) Thermal Resistance Typ. Max. Units Junction-to-Case Parameter ––– 1.84 °C/W RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– RθJA Junction-to-Ambient RθJA Junction-to-Ambient (PCB Mount, steady state) RθJC j ––– 62 ––– 40 HEXFET® is a registered trademark of International Rectifier. www.irf.com 1 09/12/03 IRFZ46Z/S/L Static @ TJ = 25°C (unless otherwise specified) Parameter V(BR)DSS ∆ΒVDSS/∆TJ RDS(on) VGS(th) Min. Typ. Max. Units Qg Qgs Qgd td(on) tr td(off) tf LD Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance 55 ––– ––– 2.0 45 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– LS Internal Source Inductance ––– 7.5 ––– Ciss Coss Crss Coss Coss Coss eff. Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance ––– ––– ––– ––– ––– ––– 1460 250 130 860 190 310 ––– ––– ––– ––– ––– ––– gfs IDSS IGSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current ––– ––– 0.053 ––– 10.9 13.6 ––– 4.0 ––– ––– ––– 20 ––– 250 ––– 200 ––– -200 31 46 7.6 11 12 18 13 ––– 63 ––– 37 ––– 39 ––– 4.5 ––– V V/°C mΩ V S µA nA nC Conditions VGS = 0V, ID = 250µA Reference to 25°C, ID = 1mA VGS = 10V, ID = 31A VDS = VGS, ID = 250µA VDS = 25V, ID = 31A VDS = 55V, VGS = 0V VDS = 55V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V ID = 31A VDS = 44V VGS = 10V VDD = 28V ID = 31A RG = 15Ω VGS = 10V D Between lead, f f ns f nH 6mm (0.25in.) from package pF G S and center of die contact VGS = 0V VDS = 25V ƒ = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz VGS = 0V, VDS = 44V, ƒ = 1.0MHz VGS = 0V, VDS = 0V to 44V Diode Characteristics Parameter Min. Typ. Max. Units Conditions IS Continuous Source Current ––– ––– 51 ISM (Body Diode) Pulsed Source Current ––– ––– 200 showing the integral reverse VSD trr Qrr ton (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time 1.3 31 24 p-n junction diode. TJ = 25°C, IS = 31A, VGS = 0V TJ = 25°C, IF = 31A, VDD = 28V di/dt = 100A/µs c Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25°C, L =0.13mH, RG = 25Ω, IAS = 31A, VGS =10V. Part not recommended for use above this value. ISD ≤ 31A, di/dt ≤ 1070A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. Pulse width ≤ 1.0ms; duty cycle ≤ 2%. 2 MOSFET symbol A ––– ––– ––– ––– 21 16 V ns nC D G S f f Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population. 100% tested to this value in production. This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. www.irf.com IRFZ46Z/S/L 1000 1000 100 BOTTOM TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 100 10 4.5V 0.1 1 10 4.5V 10 20µs PULSE WIDTH Tj = 175°C 20µs PULSE WIDTH Tj = 25°C 1 BOTTOM 1 100 0.1 V DS, Drain-to-Source Voltage (V) 1 10 100 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 60 Gfs, Forward Transconductance (S) ID, Drain-to-Source Current (Α) VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V T J = 175°C 100 T J = 25°C 10 VDS = 15V 20µs PULSE WIDTH 1.0 50 T J = 25°C 40 30 T J = 175°C 20 10 V DS = 10V 0 4 5 6 7 8 9 VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 10 0 10 20 30 40 50 60 ID,Drain-to-Source Current (A) Fig 4. Typical Forward Transconductance vs. Drain Current 3 IRFZ46Z/S/L 10000 12.0 VGS = 0V, f = 1 MHZ Ciss = C gs + C gd, C ds SHORTED Crss = C gd VGS, Gate-to-Source Voltage (V) ID= 31A C, Capacitance(pF) Coss = C ds + C gd Ciss 1000 Coss Crss VDS= 44V VDS= 28V 10.0 VDS= 11V 8.0 6.0 4.0 2.0 0.0 100 1 10 100 0 VDS, Drain-to-Source Voltage (V) 5 10 15 20 25 30 35 QG Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 1000 1000.00 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY R DS(on) 100 100.00 T J = 175°C 10.00 1.00 T J = 25°C 100µsec 10 1msec 1 Tc = 25°C Tj = 175°C Single Pulse VGS = 0V 0.1 0.10 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VSD, Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 10msec 1 10 100 1000 VDS, Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFZ46Z/S/L 55 RDS(on) , Drain-to-Source On Resistance (Normalized) 2.5 50 ID, Drain Current (A) 45 40 35 30 25 20 15 10 5 0 ID = 31A VGS = 10V 2.0 1.5 1.0 0.5 25 50 75 100 125 150 -60 -40 -20 0 175 T C , Case Temperature (°C) 20 40 60 80 100 120 140 160 180 T J , Junction Temperature (°C) Fig 10. Normalized On-Resistance vs. Temperature Fig 9. Maximum Drain Current vs. Case Temperature Thermal Response ( Z thJC ) 10 1 D = 0.50 0.20 0.10 0.05 0.1 τJ 0.02 0.01 R1 R1 τJ τ1 τ1 R2 R2 τ2 τ2 Ci= τi/Ri Ci i/Ri 0.01 SINGLE PULSE ( THERMAL RESPONSE ) R3 R3 τ3 τC τ τ3 Ri (°C/W) τi (sec) 0.9322 0.000357 0.5533 0.001133 0.3545 0.004091 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFZ46Z/S/L DRIVER L VDS D.U.T RG + V - DD IAS 20V VGS tp A 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp EAS , Single Pulse Avalanche Energy (mJ) 300 15V ID 3.5A 5.0A BOTTOM 31A TOP 250 200 150 100 50 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) I AS Fig 12c. Maximum Avalanche Energy vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG 10 V QGD 4.0 VG Charge Fig 13a. Basic Gate Charge Waveform L DUT 0 VCC VGS(th) Gate threshold Voltage (V) QGS 3.0 ID = 250µA 2.0 1.0 1K -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( °C ) Fig 13b. Gate Charge Test Circuit 6 Fig 14. Threshold Voltage vs. Temperature www.irf.com IRFZ46Z/S/L 1000 Avalanche Current (A) Duty Cycle = Single Pulse 100 Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses 0.01 10 0.05 0.10 1 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current vs.Pulsewidth 70 TOP Single Pulse BOTTOM 1% Duty Cycle ID = 31A EAR , Avalanche Energy (mJ) 60 50 40 30 20 10 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 16. Maximum Avalanche Energy vs. Temperature www.irf.com 175 Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav 7 IRFZ46Z/S/L D.U.T Driver Gate Drive + + • • • • D.U.T. ISD Waveform Reverse Recovery Current + dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test P.W. Period * RG D= VGS=10V Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer - - Period P.W. VDD + Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage - Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V DS VGS RG RD D.U.T. + -VDD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 18a. Switching Time Test Circuit VDS 90% 10% VGS td(on) tr t d(off) tf Fig 18b. Switching Time Waveforms 8 www.irf.com IRFZ46Z/S/L TO-220AB Package Outline Dimensions are shown in millimeters (inches) 10.54 (.415) 10.29 (.405) 2.87 (.113) 2.62 (.103) -B- 3.78 (.149) 3.54 (.139) 4.69 (.185) 4.20 (.165) -A- 1.32 (.052) 1.22 (.048) 6.47 (.255) 6.10 (.240) 4 15.24 (.600) 14.84 (.584) 1.15 (.045) MIN 1 2 LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN 3 14.09 (.555) 13.47 (.530) 4.06 (.160) 3.55 (.140) 3X 1.40 (.055) 3X 1.15 (.045) 0.93 (.037) 0.69 (.027) 0.36 (.014) 3X M B A M 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information EXAMPLE: THIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN THE AS S EMBLY LINE "C" INTERNATIONAL RECTIFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C For GB Production EXAMPLE: THIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN THE AS S E MBLY LINE "C" INTERNATIONAL RECTIFIER LOGO LOT CODE www.irf.com PART NUMBER DATE CODE 9 IRFZ46Z/S/L D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information T HIS IS AN IRF530S WIT H LOT CODE 8024 ASS EMBLED ON WW 02, 2000 IN T HE ASS EMBLY LINE "L" INT ERNAT IONAL RECT IFIER LOGO PART NUMBER F 530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L ASS EMBLY LOT CODE For GB Production T HIS IS AN IRF530S WIT H LOT CODE 8024 ASS EMBLED ON WW 02, 2000 IN T HE ASS EMBLY LINE "L" INT ERNAT IONAL RECT IFIER LOGO LOT CODE 10 PART NUMBER F 530S DAT E CODE www.irf.com IRFZ46Z/S/L TO-262 Package Outline Dimensions are shown in millimeters (inches) IGBT 1- GATE 2- COLLECTOR 3- EMITTER TO-262 Part Marking Information EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 ASS EMBLED ON WW 19, 1997 IN THE ASS EMBLY LINE "C" INT ERNATIONAL RECTIFIER LOGO AS SEMBLY LOT CODE www.irf.com PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C 11 IRFZ46Z/S/L D2Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 11.60 (.457) 11.40 (.449) 0.368 (.0145) 0.342 (.0135) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 60.00 (2.362) MIN. 30.40 (1.197) MAX. 26.40 (1.039) 24.40 (.961) 3 4 TO-220AB package is not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 09/03 12 www.irf.com