TrilithIC 1 BTS 780 GP Overview Features • • • • • • • • • • • • • • • • • • Quad switch driver Free configureable as bridge or quad-switch Optimized for DC motor management applications Ultra low RDS ON @ 25 °C: High-side switch: typ. 34 mΩ, P-TO263-15-1 Low-side switch: typ. 15 mΩ High peak current capability of typ. 44 A @ 25 °C Low quiescent current of typ. 15 µA @ 25 °C SMD-Power-Package, optimized for small size and thermal performance Load and GND-short-circuit-protected Operates up to 36 V 2-Bit status flag diagnosis Overtemperature shut down with hysteresis Short-circuit detection and diagnosis Open-load detection and diagnosis C-MOS compatible inputs Internal clamp diodes Isolated sources for external current sensing Over- and under-voltage detection with hysteresis Fast low-side switches for PWM Type Ordering Code Package BTS 780 GP Q67006-A9320 P-TO263-15-1 Description The BTS 780 GP is part of the TrilithIC family containing one double high-side switch and two low-side switches in one P-TO263-15-1 package. “Silicon instead of heatsink” becomes true The ultra low RDS ON of this device avoids power dissipation. It saves costs in mechanical construction and mounting and increases the efficiency. Data Sheet 1 1999-06-22 BTS 780 GP The high-side switches are produced in the SMART SIPMOS® technology. They are fully protected and contain the signal conditioning circuitry for diagnosis (the comparable standard high-side product is the BTS 734L1). For minimized RDS ON the two low-side switches are produced in S-FET logic level technology (the comparable standard product is the BUZ 100SL). Each drain of these three chips is mounted on separated leadframes (see Figure 1). The sources of all four power transistors are connected to separate pins. So the BTS 780 GP can be used in H-Bridge configuration as well as in any other switch configuration. Moreover, it is possible to add current sense resistors. All these features open a broad range of automotive and industrial applications. Data Sheet 2 1999-06-22 BTS 780 GP Molding Compound SL1 1 SL1 2 GL1 3 GND 4 GH1 5 ST1 6 SH1 7 DHVS 8 GND 9 GH2 10 ST2 11 SH2 12 SL2 13 SL2 14 GL2 15 Heat-Slug 1 18 DL1 Heat-Slug 2 17 DHVS Heat-Slug 3 16 DL2 AEP02224 Figure 1 Data Sheet Pin Configuration (top view) 3 1999-06-22 BTS 780 GP Pin Definitions and Functions Pin No. Symbol Function 1, 2 SL1 Source of low-side switch 1 3 GL1 Gate of low-side switch 1 4, 9 GND Ground 5 GH1 Gate of high-side switch 1 6 ST1 Status of high-side switch 1; open Drain output 7 SH1 Source of high-side switch 1 8, 17 DHVS Drain of high-side switches and power supply voltage Heat-Slug 2 or Heat-Dissipator 10 GH2 Gate of high-side switch 2 11 ST2 Status of high-side switch 2; open Drain output 12 SH2 Source of high-side switch 2 13, 14 SL2 Source of low-side switch 2 15 GL2 Gate of low-side switch 2 16 DL2 Drain of low-side switch 2 Heat-Slug 3 or Heat-Dissipator 18 DL1 Drain of low-side switch 1 Heat-Slug 1 or Heat-Dissipator Bold type: Pin needs power wiring. Data Sheet 4 1999-06-22 BTS 780 GP ST1 ST2 GH1 GH2 DHVS 8, 17 6 11 5 10 Diagnosis Driver RΙ1 IN RI2 Biasing and Protection OUT 0 0 L L 0 1 L H 1 0 H L 1 1 H H RO1 RO2 12 16 GND 7 4, 9 18 GL1 GL2 SH2 DL2 SH1 DL1 3 15 1, 2 SL1 13, 14 SL2 AEB02225 Figure 2 Data Sheet Block Diagram 5 1999-06-22 BTS 780 GP 2 Circuit Description 2.1 Input Circuit The control inputs GH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the form necessary for driving the power output stages. The inputs are protected by ESD clamp-diodes. The inputs GL1 and GL2 are connected to a standard N-channel logic level power-MOS gate. 2.2 Output Stages The output stages consist of an ultra low RDS ON Power-MOS H-Bridge. Protective circuits make the outputs short-circuit proof to ground and load short-circuit proof. In Hbridge configuration, the D-MOS body-diodes can be used for freewheeling when commutating inductive loads. If the high-side switches are used as single switches, positive and negative voltage spikes which occur when driving inductive loads are limited by integrated power clamp diodes (c.f. BTS 734L1 datasheet for a detailed description). 2.3 Short-Circuit Protection (valid only for the high-side switches) The outputs are protected against – output short circuit to ground, and – overload (load short circuit). An internal OP-Amp controls the Drain-Source-Voltage of the HS-Switches by comparing the DS-Voltage-drop with an internal reference voltage. Above this trippoint the OP-Amp reduces the output current depending on the junction temperature and the drop voltage. In the case of an overloaded high-side switch the corresponding status output is set to low. If the HS-Switches are in OFF-state-Condition internal resistors RO1,2 from SH1,2 to GND pull the voltage at SH1,2 to low values. On each output pin SH1 and SH2 an output examiner circuit compares the output voltages with the internal reference voltage VEO. This results in switching the corresponding status output to low if the source voltage in OFF-Condition is higher then VEO. In H-Bridge condition this feature can be used to protect the low-side switches against short circuit to VS during the OFF-period. 2.4 Overtemperature Protection (valid only for the high-side-switches) The chip also incorporates an overtemperature protection circuit with hysteresis which switches off the output transistors and sets the status output to low. Data Sheet 6 1999-06-22 BTS 780 GP 2.5 Under-Voltage-Lockout (UVLO) When VS reaches the switch-on voltage VUV ON the IC becomes active with a hysteresis. The High-Side output transistors are switched off if the supply voltage VS drops below the switch off value VUV OFF. 2.6 Over-Voltage-Lockout (OVLO) When VS reaches the switch-off voltage VOV OFF the High-Side output transistors are switched off with a hysteresis. The IC becomes active if the supply voltage VS drops below the switch-on value VOV ON. 2.7 Open Load Detection Open load is detected by current measurement in the High-Side switches during ONcondition. If the output current drops below an internally fixed level (open circuit detection current) the error flag is set with a delay. 2.8 Status Flag The status flag outputs are open drain outputs with Zener-diodes which require pull-up resistors, c.f. the application circuit on Page 16. Various errors as listed in the table “Diagnosis” are detected by switching the open drain outputs ST1 or ST2 to low. Data Sheet 7 1999-06-22 BTS 780 GP 3 Truthtable and Diagnosis (valid only for the High-Side-Switches) Flag GH1 GH2 SH1 Inputs SH2 ST1 ST2 Remarks Outputs 0 0 1 1 0 1 0 1 L L H H L H L H 1 1 1 1 1 1 1 1 0 0 1 0 1 X 0 1 X 0 0 1 Z Z H L H X L H X Z Z H 1 1 0 1 1 1 1 1 1 1 1 0 0 0 1 0 1 X 0 1 X 0 0 1 H H H L H X L H X H H H 0 1 1 1 1 1 1 1 1 0 1 1 Overtemperature high-side switch1 0 1 X X L L X X 1 0 1 1 detected Overtemperature high-side switch2 X X 0 1 X X L L 1 1 1 0 detected Overtemperature both high-side switch 0 X 1 0 1 X L L L L L L 1 0 0 1 0 0 detected detected Over- and Under-Voltage X X L L 1 1 not detected Normal operation; identical with functional truth table Open load at high-side switch1 Open load at high-side switch2 Short circuit to DHVS at high-side switch1 Short circuit to DHVS at high-side switch2 Inputs: Outputs: Status: 0 = Logic LOW Z = Output in tristate condition 1 = No error 1 = Logic HIGH L = Output in sink condition 0 = Error X = don’t care H = Output in source condition stand-by mode switch1 active switch2 active both switches active detected detected detected detected X = Voltage level undefined Data Sheet 8 1999-06-22 BTS 780 GP 4 Characteristics 4.1 Absolute Maximum Ratings – 40 °C < Tj < 150 °C Parameter Symbol Limit Values min. Unit Remarks max. High-Side-Switches (Pins DHVS, GH1,2 and SH1,2) Supply voltage HS-drain current HS-input current HS-input voltage VS IDHS IGH VGH – 0.3 43 V – – 30 * A * internally limited –2 2 mA Pin GH1 and GH2 – 10 16 V Pin GH1 and GH2 IST –5 5 mA Pin ST1 and ST2 Status Output ST Status Output current Low-Side-Switches (Pins DL1,2, GL1,2 and SL1,2) Break-down voltage LS-drain current LS-drain current LS-input voltage V(BR)DSS IDLS IDLS VGL 50 – V VGS = 0 V; ID ≤ 1 mA – 30 A – – 50 A t < 1 ms; ν < 0.1 – 10 14 V Pin GL1 and GL2 Tj Tstg – 40 150 °C – – 50 150 °C – Temperatures Junction temperature Storage temperature Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Data Sheet 9 1999-06-22 BTS 780 GP 4.2 Operating Range Parameter Symbol Limit Values min. Unit Remarks max. Supply voltage VS VUV OFF 36 V After VS rising above VUV ON Input voltages VGH VGL IST TjHS TjLS – 0.3 15 V – –9 13 V – 0 2 mA Pin ST1 or ST2 – 40 150 °C – – 40 150 °C – Input voltages Status output current HS-junction temperature LS-junction temperature Note: In the operating range the functions given in the circuit description are fulfilled. 4.3 Thermal Resistances (one HS-LS-Path active) Parameter Symbol Limit Values min. max. Unit Remarks LS-junction case RthjCLS – 0.5 K/W measured to pin 16 or 18 HS-junction case RthjCHS Rthja – 0.5 K/W measured to pin 17 – 21 K/W measured on test PCB1) Junction ambient 1) Device on 50 mm × 33 mm epoxy PCB with 6 cm2 cooling-area in free air. C.f. PCB description on Page 17 Data Sheet 10 1999-06-22 BTS 780 GP 4.4 Electrical Characteristics ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V < VS < 18 V unless otherwise specified Parameter Symbol Limit Values min. typ. max. – 15 30 Unit Test Condition Current Consumption Quiescent current IS µA GH1 = GH2 = L VS = 13.2 V Tj = 25 °C Quiescent current IS – – 42 µA GH1 = GH2 = L VS = 13.2 V Supply current IS IS – 2 4 mA GH1 or GH2 = H – 4 8 mA GH1 and GH2 = H – 5.2 7 V 3.5 4.2 5.0 V – 1 – V VS increasing VS decreasing VUV ON – VUV OFF 36 – 43 V 35 – – V – 0.5 – V Supply current Under-Voltage-Lockout (UVLO) VUV ON VUV OFF Switch-OFF voltage Switch ON/OFF hysteresis VUV HY Switch-ON voltage Over-Voltage-Lockout (OVLO) VOV OFF VOV ON Switch-ON voltage Switch OFF/ON hysteresis VOV HY Switch-OFF voltage Data Sheet 11 VS increasing VS decreasing VOV OFF – VOV ON 1999-06-22 BTS 780 GP 4.4 Electrical Characteristics (cont’d) ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V < VS < 18 V unless otherwise specified Parameter Symbol Limit Values min. typ. max. Unit Test Condition High-Side-Switches 1, 2 Static drain-source on-resistance RDS ON H – 34 40 mΩ Static drain-source on-resistance RDS ON H – – 75 mΩ – – 10 µA – 0.8 1.2 V – 0.7 1.1 V – 0.5 0.8 V – – 10 mA ISCP ISCP ISCP ISCP 47 55 66 A 35 44 54 A 29 36 45 A 21 27 34 A Tj = – 40 °C Tj = 25 °C Tj = 85 °C Tj = 150 °C OFF-state examinervoltage VEO 2 3 4 V VGH = 0 V Output pull-down-resistor RO 4 10 30 kΩ – IOCD 0.05 – 1.2 A – IHSLK Body-diode forward-voltage VFH @ IFH = 2 A VFH VFH ILKCL Clamp-diode leakagecurrent (IFH + ISH) Leakage current ISH = 2 A Tj = 25 °C ISH = 2 A VGH = VSH = 0 V Tj = – 40 °C Tj = 25 °C Tj = 150 °C IFH = 2 A Short Circuit to GND Initial peak SC current Initial peak SC current Initial peak SC current Initial peak SC current Short Circuit to VS Open Circuit Detection current Data Sheet 12 1999-06-22 BTS 780 GP 4.4 Electrical Characteristics (cont’d) ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V < VS < 18 V unless otherwise specified Parameter Symbol Limit Values min. typ. max. – 130 300 Unit Test Condition Switching Times µs 12 Ω resistive load Switch-ON-time; to 90% VSH tON Switch-OFF-time; to 10% VSH tOFF – 260 450 µs 12 Ω resistive load VS = 13.2 V VGHH VGHL VGHHY IGHH IGHL RI VGHZ – 2.8 3.3 V – 1.5 2.3 – V – – 0.5 – V – 20 50 90 µA 4 25 50 µA VGH = 5 V VGH = 0.4 V 2.5 4.2 6 kΩ – 5.4 6.1 – V IGH = 1.6 mA ISL = 2 A VGL = 5 V Tj = 25 °C ISH = 2 A VS = 13.2 V Control Inputs GH 1, 2 H-input voltage threshold L-input voltage threshold Input voltage hysteresis H-input current L-input current Input series resistance Zener limit voltage Low-Side-Switches 1, 2 Static drain-source on-resistance RDS ON L – 15 20 mΩ Static drain-source on-resistance RDS ON L – – 35 mΩ Leakage current ILKL – <1 100 µA Body-diode forward-voltage VFL @ IFL = 2 A V – 0.8 1.2 V FL – 0.7 1.1 V VFL – 0.5 0.8 V Data Sheet 13 VGL = 0 V VDS = 18 V Tj = – 40 °C Tj = 25 °C Tj = 150 °C 1999-06-22 BTS 780 GP 4.4 Electrical Characteristics (cont’d) ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V < VS < 18 V unless otherwise specified Parameter Symbol Limit Values min. typ. max. Unit Test Condition Control Inputs GL1, 2 Gate-threshold-voltage VGL(th) 0.6 1.6 2.4 V VGL = VDSL IDL = 130 µA VDSL = 20 V; IDL = 20 A Transconductance gfs – 5 – S VSTL ISTLK VSTZ – 0.3 0.6 V – 0.4 2 µA 5.4 6.1 – V IST = 1.6 mA VST = 5 V IST = 1.6 mA Thermal shutdown junction TjSD temperature 160 – 190 °C – Thermal switch-on junction TjSO temperature 150 – 180 °C – – 10 – °C ∆T = TjSD – TjSO Status Flag Output ST Low output voltage Leakage current Zener-limit-voltage Thermal Shutdown Temperature hysteresis ∆T Note: Shutdown temperatures are guaranteed by design Data Sheet 14 1999-06-22 BTS 780 GP IS IFH1, 2 DHVS 8, 17 ST1 6 VST1 VSTL1 VSTZ1 ST2 11 VDSH2 -VFH2 Driver RΙ1 IN VGH1 GH2 10 Biasing and Protection Diagnosis VST2 VSTL2 VSTZ2 GH1 5 VS=12 V CL 100 µF CS 470 nF RI2 VDSH1 -VFH1 OUT 0 0 L 0 1 L H L 1 0 H L 1 1 H H RO1 RO2 12 SH2 ISH2 VUVON VUVOFF 16 DL2 VGH2 7 SH1 GND 4, 9 18 DL1 IDL2, ILKL ISH1 IDL1, ILKL GL1 3 VGL1 VGL(th)1 GL2 15 VGL2 VGL(th)2 ISL1 1, 2 SL1 ISL2 13, 14 SL2 VEO1 VDSL1 -VFL1 VEO2 VDSL2 -VFL2 AES0226 Figure 3 Test Circuit HS-Source-Current Named during Short Circuit Named during Open Circuit Named during Leakage-Cond. ISH1,2 IOCD IHSLK Data Sheet ISCP 15 1999-06-22 BTS 780 GP Watchdog Resest TLE 4278G Ι VS=12 V Q RQ 100 kΩ WD R VCC RS RQ 100 kΩ DO1 1N4001 D CQ 22 µF GND CD 47 nF CS 10 µF D1 Z39 DHVS 8, 17 ST1 6 10 kΩ RS ST2 11 Diagnosis 10 kΩ GH1 5 GH2 10 Driver RΙ1 IN µP RI2 Biasing and Protection OUT 0 0 L 0 1 L H L 1 0 H L 1 1 H H RO1 RO2 12 SH2 16 DL2 M 7 SH1 GND 4, 9 18 DL1 GL1 3 GL2 15 1, 2 SL1 GND Figure 4 Data Sheet 13, 14 SL2 AES02227 Application Circuit 16 1999-06-22 BTS 780 GP 5 Test-PCB The Printed Circuit Board is made of 1.5 mm thick standard FR4 material with double sided copper plating of 35 µm thickness. The 28 mm × 21 mm cooling area is throughconnected by a 1.1 mm × 1.1 mm pattern of vias with 0.5 mm diameter. TOP (component side) BTS78XLPMini1.1 50 Str BTS780 HL LH TM3 Application Board for High-Current-Motorbridge 21 BOTTOM DL1 SL1 DHVs SL1 DL2 28 34 AEA02732 Dimensions in mm Figure 5 6 Test-PCB Outline Solder Pad for Reflow Soldering P-TO263-15-1 (Plastic Transistor Single Outline Package) 21.6 8.4 0.4 1 Dimensions in mm Data Sheet 17 HLG09223 4 16 9.5 0.8 1999-06-22 BTS 780 GP 7 Package Outlines P-TO263-15-1 (Plastic Transistor Single Outline Package) 21.6 ±0.2 8.3 1) 4.4 5.56 ±0.15 1.27 ±0.1 B 4.8 1) 0.1 4.7 ±0.5 14x1.4 0.05 2.4 8.41) 8.21) A 9.25 ±0.2 (15) 1±0.3 8.18 ±0.15 2.7 ±0.3 1±0.2 0...0.15 0.5 ±0.1 0.8 ±0.1 8˚ max. 1) M A B 0.1 Typical All metal surfaces tin plated, except area of cut. Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Data Sheet 18 GPT09151 0.25 Dimensions in mm 1999-06-22