INFINEON PTF210901E

PTF210901
LDMOS RF Power Field Effect Transistor
90 W, 2110–2170 MHz
Description
Features
The PTF210901 is an internally matched 90 W GOLDMOS FET
intended for WCDMA applications from 2110 to 2170 MHz. Full gold
metallization ensures excellent device lifetime and reliability.
•
Internal matching for wideband performance
•
Typical two–carrier 3GPP WCDMA
performance
- Average output power = 19 W at –37 dBc
- Efficiency = 25%
•
Typical CW performance
- Output power at P–1dB = 105 W
- Gain = 15 dB
- Efficiency = 53%
•
Integrated ESD protection: Human Body Model,
Class 1 (minimum)
•
Excellent thermal stability, low HCI drift
•
Capable of handling 10:1 VSWR at 28 V,
90 W (CW) output power
Two–Carrier WCDMA Drive–Up
VDD = 28 V, IDQ = 1050 mA, f1 = 2140 MHz, f2 = 2150 MHz,
3GPP WCDMA signal, P/A R = 8.0 dB, 3.84 MHz BW
30
Drain Efficiency
-30
25
IM3
-35
20
-40
15
-45
Gain
-50
10
ACPR
-55
Efficiency (%), Gain (dB)
IMD (dBc), ACPR (dBc)
-25
5
39
40
41
42
43
44
PTF210901E
Package 30248
Output Power, Avg. (dBm)
ESD: Electrostatic discharge sensitive device — observe handling precautions!
RF Performance at TCASE = 25°C unless otherwise indicated
WCDMA Measurements (not subject to production test—verified by design/characterization in Infineon test fixture)
VDD = 28 V, IDQ = 1050 mA, P OUT = 19 W AVG
f1 = 2140 MHz, f2 = 2150 MHz, 3GPP signal, channel bandwidth 3.84 MHz, 8.0 dB peak/average @ 0.01% CCDF
Characteristic
Symbol
Min
Typ
Max
Units
Intermodulation Distortion
IMD
—
Gain
Gps
—
–37
—
dBc
15
—
dB
Drain Efficiency
ηD
—
25
—
%
Symbol
Min
Typ
Max
Units
Gain
Gps
13.5
15
—
dB
Drain Efficiency
ηD
36
38
—
%
Intermodulation Distortion
IMD
—
–30
–28
dBc
Two–Tone Measurements (tested in Infineon test fixture)
VDD = 28 V, IDQ = 1050 mA, POUT = 90 W PEP, f = 2170 MHz, tone spacing = 1 MHz
Characteristic
Data Sheet
1
2004-01-16
PTF210901
Electrical Characteristics at TCASE = 25°C unless otherwise indicated
Characteristic
Conditions
Symbol
Min
Typ
Max
Units
Drain–Source Breakdown Voltage
VGS = 0 V, ID = 10 µA
V(BR)DSS
65
—
—
V
Drain Leakage Current
VDS = 28 V, V GS = 0 V
IDSS
—
—
1.0
µA
On–State Resistance
VGS = 10 V, V DS = 0.1 V
RDS(on)
—
0.1
—
Ω
Operating Gate Voltage
VDS = 28 V, IDQ = 1050 mA
VGS
2.5
3.2
4.0
V
Gate Leakage Current
VGS = 10 V, V DS = 0 V
IGSS
—
0.01
1.0
µA
Maximum Ratings
Parameter
Symbol
Value
Unit
Drain–Source Voltage
VDSS
65
V
Gate–Source Voltage
VGS
–0.5 to +12
V
Junction Temperature
TJ
200
°C
Total Device Dissipation
PD
389
W
2.22
W/°C
Above 25°C derate by
Storage Temperature Range
TSTG
–40 to +150
°C
Thermal Resistance (TCASE = 70°C, 90 W CW)
RθJC
0.45
°C/W
Broadband Circuit Performance
Power Sweep, Pulsed Conditions
VDD = 28 V, IDQ = 1050 mA, POUT = 20 W CW
VDD = 28 V, IDQ = 1050 mA, f = 2140 MHz,
pulse period = 1 ms, 0.8% duty cycle
0
35
-5
30
-10
Efficiency
25
20
-15
-20
Gain
-25
15
10
5
2080
Input Return Loss
2120
2160
-30
55
54
Output Power (dBm)
40
Input Return Loss (dB)
Gain (dB), Efficiency (%)
Typical Performance in broadband test fixture
Ideal
52
51
P-1dB = 50.6 dBm
50
49
Actual
48
47
46
-35
2200
45
30 31 32 33 34 35 36 37 38 39
Frequency (MHz)
Data Sheet
P-3dB = 51.3 dBm
53
40
Input Power (dBm)
2
2004-01-16
PTF210901
Typical Performance (cont.)
Intermodulation Distortion vs. Output Power
for selected currents
Intermodulation Distortion Products
vs. Tone Spacing
VDD = 28 V, f = 2140 MHz, tone spacing = 1 MHz
VDD = 28 V, IDQ = 1050 mA, POUT = 90 W PEP,
f = 2140 MHz
-20
-20
-25
-25
0.75 A
-35
-30
0.85 A
IMD (dBc)
1.15 A
-40
-45
-50
3rd Order
-35
-40
5th Order
-45
-50
-55
0.95 A
-60
-55
1.05 A
-65
7th Order
-60
37
39
41
43
45
47
49
51
0
10
Output Power (dBm), PEP
Two–Tone Drive–Up
Single–Carrier WCDMA Drive–Up
VDD = 28 V, IDQ = 1050 mA, f = 2140 MHz,
tone spacing = 1 MHz
VDD = 28 V, IDQ = 1050 mA, f = 2140 MHz,
3GPP WCDMA signal, Test Model 1 w/ 16 DPCH 67%
clipping, P/A R = 8.7 dB, 3.84 MHz BW
-20
30
-30
Drain Efficiency (%),
Gain (dB)
-25
35
-30
IM3
-35
30
Efficiency
-40
IM5
20
15
-45
-50
10
IM7
5
IMD (dBc)
Drain Efficiency (%)
40
-55
-60
0
41
43
45
47
49
-35
20
-40
15
-45
Gain
10
-50
ACPR Up
5
-55
0
51
-60
34 35 36 37 38 39 40 41 42 43 44
Output Power (dBm), PEP
Data Sheet
Drain Efficiency
25
ACPR Low
-65
39
30
Tone Spacing (MHz)
45
25
20
ACPR (dB)
IMD (dBc)
-30
Output Power (dBm), Avg.
3
2004-01-16
PTF210901
Typical Performance (cont.)
IM3, Drain Efficiency and Gain
vs. Supply Voltage
Bias Voltage vs. Temperature
IDQ = 1050 mA, f = 2140 MHz, POUT = 90 W PEP,
tone spacing = 1 MHz
Series show current.
-5
45
-15
30
-20
25
-25
IM3
20
-30
15
-35
Gain
10
-40
-45
5
9.00 A
1.01
22
24
26
28
30
32
6.00 A
1.00
4.50 A
3.00 A
0.99
1.50 A
0.98
0.97
-50
0
7.50 A
1.02
Normalized Bias Voltage
35
1.03
-10
Drain Efficiency
IM3 (dBc)
40
Efficiency (%),
Gain (dB)
Voltage normalized to typical gate voltage.
0.96
34
-20
5
30
55
80
105
Drain Voltage (V)
Case Temperature (ºC)
Broadband Circuit Impedance Data
Z0 = 50 Ω
D
0.1
Z Source
Z Load
Z Load
R
jX
R
jX
2070
5.11
–7.00
2.14
0.62
2110
4.78
–6.74
2.03
0.97
2140
4.57
–6.50
1.99
1.21
2170
4.35
–6.30
1.92
1.45
2200
4.12
–6.11
1.88
1.67
0 .0
0.1
2070 MHz
Z Source
0.1
2200 MHz
2070 MHz
W
<---
MHz
Z Load Ω
DT OW ARD L OA
GT HS
Z Source Ω
Frequency
L EN
A VE
S
0.2
2200 MHz
G
0. 2
Data Sheet
4
2004-01-16
PTF210901
Test Circuit
Reference Circuit Schematic for f = 2140 MHz
Circuit Information
DUT
PTF210901E
PCB
0.76 mm [0.030"] thick, εr = 4.5
Microstrip
l1
l2
l3
l4
l5
l6
l7, l8
l9
l10
l11
l12
Data Sheet
LDMOS Transistor
2 oz. copper
Value at 2140 MHz
0.375 λ, 50 Ω
0.199 λ, 39.2 Ω
0.015 λ, 11.5 Ω
0.037 λ, 60.4 Ω
0.195 λ, 60.4 Ω
0.073 λ, 7.5 Ω
0.199 λ, 55.4 Ω
0.049 λ, 4.98 Ω
0.089 λ, 4.98 Ω
0.151 λ, 41.9 Ω
0.381 λ, 50 Ω
Dimensions: L x W (mm.)
28.45 x 1.40
14.83 x 2.06
1.07 x 10.06
2.90 x 0.97
15.11 x 0.97
4.98 x 17.73
15.32 x 1.14
3.30 x 25.17
5.99 x 25.17
11.30 x 1.85
29.13 x 1.40
5
TMM4
Dimensions: L x W (in.)
1.120 x 0.055
0.584 x 0.081
0.042 x 0.396
0.114 x 0.038
0.595 x 0.038
0.196 x 0.698
0.603 x 0.045
0.130 x 0.991
0.236 x 0.991
0.445 x 0.073
1.147 x 0.055
2004-01-16
PTF210901
Test Circuit (cont.)
C15 C16
R7
R9
+28V
R6
C14
R8
QQ1
LM
R5
R4
VDD
Q1
C4
R10
C1 C2
C3
C5 C6
C7
R3
RF_IN
RF_OUT
C9
C8
C11
C10
C13
C12
VDD
TMM4
ERA210901-2
Reference Circuit1 (not to scale)
Component
C1, C6, C12
C2, C3, C4, C9,
C10
C5, C11
C7, C13
C8
C14, C15, C16
QQ1
Q1
R1, R2
R3
R4
R5
R6
R7
R8
R9
R10
Description
Capacitor, 0.01 µF
Capacitor, 8.2 pF
Manufacturer
Digi-Key
ATC
P/N or Comment
PCC1772CT-ND
100B 8R2
Capacitor, 1 µF, ceramic, 50 V
Capacitor, 100 µF, 50 V, electrolytic
Capacitor, 1.1 pF
Capacitor, 0.01 µF
Voltage regulator
Transistor
Resistor, 12K ohm, 1/4 W, 1206
Resistor, 10 ohm, 1/4 W, 1206
Resistor, 1.2K ohm, 1/10 W, 0603
Resistor, 1.3K ohm, 1/10 W, 0603
Resistor, variable 2K ohm, 4 W
Resistor, 10 ohm, 1/4 W, 1206
Resistor, 24K ohm, 1/4 W, 1206
Resistor, 1K ohm, 1/4 W, 1206
Resistor, 3K ohm, 1/4 W, 1206
ATC
Digi-Key
ATC
Digi-Key
Digi-Key
Infineon
Digi-Key
Digi-Key
Digi-Key
Digi-Key
Digi-Key
Digi-Key
Digi-Key
Digi-Key
Digi-Key
920DC105KW100
P5182-ND
100B OR6
PCC1772CT-ND
LM 7805
BCP56
P12KECT-ND
P10ECT-ND
P1.2KGCT-ND
P1.3KGCT-ND
3224 W-202ETR-ND
P10ECT-ND
P24KECT-ND
P1.0KECT-ND
P3.0KECT-ND
1Gerber Files for this circuit available on request.
Data Sheet
6
2004-01-16
PTF210901
Ordering Information
Type
Package Outline
Package Description
Marking
PTF210901E
30248
Thermally enhanced, with flange
PTF210901E
Package Outline Specifications
Package 30248
(45° X 2.72
[.107])
C
L
2X 4.83±0.51
[.190±.020]
D
S
9.78
[.385]
19.43 ±0.51
[.765±.020]
+0.10
LID 9.40 -0.15
[.370+.004
-.006
C
L
]
G
2X 12.70
[.500]
2X R1.63
[.064]
4X R1.52
[.060]
27.94
[1.100]
1.02
[.040]
19.81±0.20
[.780±.008]
SPH 1.57
[.062]
3.76±0.38
[.142±.015]
0.0381 [.0015] -A-
34.04
[1.340]
0.51
[.020]
ERA-H-30248-2-1-2301
Notes: Unless otherwise specified
1. Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. Pins: D = drain, S = source, G = gate
4. Lead thickness: 0.10± +0.051/–0.025 [.004 +.002/–.001 ]
Find the latest and most complete information about products and packaging at the Infineon Internet page
http://www.infineon.com/products
Data Sheet
7
2004-01-16
PTF210901
Revision History:
Previous Version:
Page
5
2004-01-16
2003-12-22, Data Sheet
Subjects (major changes since last revision)
Circuit schematic adjusted
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Edition 2004-01-16
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München, Germany
© Infineon Technologies AG 2003.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee of
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon
Technologies Office (www.infineon.com/rfpower).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of
Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support
device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are
intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it
is reasonable to assume that the health of the user or other persons may be endangered.
Data Sheet
8
2004-01-16