INFINEON TLE6251G

Final Data Sheet, Re v. 3.2, Apr. 2006
TLE 6251 G
H ig h S p e ed C A N - T ra n s c ei v er w it h W ak e
Detection
A u to m o t iv e P o w e r
N e v e r
s t o p
t h i n k i n g .
Edition 2006-04-05
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München, Germany
© Infineon Technologies AG 2005.
All Rights Reserved.
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High Speed CAN-Transceiver with Wake Detection
TLE 6251 G
Features
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CAN data transmission rate up to 1 Mbaud
Compatible to ISO/DIS 11898
Supports 12 V and 24 V automotive applications
Low power modes with local wake-up input and
remote wake-up via CAN bus
Very low power consumption in sleep mode
Wake-up input
Wake-up source recognition
Inhibit output to control an external power supply
Diagnosis output
RxD only mode for node failure analysis
Split termination to stabilize the recessive level
TxD time-out function with diagnosis
RxD recessive clamping handler with diagnosis
TxD to RxD short circuit handler with diagnosis
Bus line short circuit diagnosis
Bus dominant clamping diagnosis
Undervoltage detection at VCC, VI/O and VBAT
Cold start diagnosis (first battery connection)
Adaptive to host logic supply levels (3.3 and 5 V)
Wide common mode range for electromagnetic immunity (EMI)
Low electromagnetic emission (EME)
Short circuit proof to ground, battery and VCC
Overtemperature protection
Protected against automotive transients
+/- 6kV ESD Robustness according to IEC 61000-4-2
P-DSO-14-13
Type
Ordering Code
Package
TLE 6251 G
SP000069400
P-DSO-14-13
Final Data Sheet
3
Rev. 3.2, 2006-04-05
TLE 6251 G
Description
The CAN-transceiver TLE 6251 G is a monolithic integrated circuit in a P-DSO-14-13 package
for high speed differential mode data transmission (up to 1 Mbaud) and reception in automotive
and industrial applications. It works as an interface between the CAN protocol controller and the
physical bus lines compatible to ISO/DIS 11898.
As a successor to the first generation of HS CAN, the TLE 6251 G is designed to provide an
excellent passive behavior when the transceiver is switched off (mixed networks, clamp15/30
applications). The current consumption can be reduced, due to the low power modes.. This
supports networks with partially powered down nodes.
The TLE 6251 G offers two low power modes as well as a receive-only mode to support software
diagnosis functions. A wake-up from the low power mode is possible via a message on the bus or
via the bi-level sensitive wake input. An external voltage supply IC can be controlled by the
inhibit output. So, the µC can be powered down and the TLE 6251 G still reacts to wake-up
activities on the CAN bus or local wake input.
A diagnosis output allows mode dependent enhanced diagnosis of bus failures and wake-up
source. A VBAT fail flag reports an power-on condition at the battery supply input.
The TLE 6251 G is designed to withstand the severe conditions of automotive applications and
to support 12 V and 24 V applications.
The IC is based on the Smart Power Technology SPT® which allows bipolar and CMOS control
circuitry in accordance with DMOS power devices existing on the same monolithic circuit.
Final Data Sheet
4
Rev. 3.2, 2006-04-05
TLE 6251 G
Pin Configuration
TLE 6251 G
(P-DSO-14-13)
TxD
1
14
NSTB
GND
2
13
CANH
VCC
3
12
CANL
RxD
4
11
SPLIT
VµC
5
10
VS
EN
6
9
WK
INH
7
8
NERR
AEP03398.VSD
Figure 1
Pin Configuration (top view)
Table 1
Pin Definitions and Functions
Pin No.
Symbol
Function
1
TxD
CAN transmit data input; 20 kΩ pull-up, LOW in dominant state
2
GND
Ground
3
VCC
5 V supply input; block to GND with 100 nF ceramic capacitor
4
RxD
CAN receive data output; LOW in dominant state, push-pull output
stage
5
VµC
Logic voltage level adapter input; connect to pin VCC for 5 V
microcontroller, connect to additional supply voltage for other logic
voltage levels, block to GND with 100 nF ceramic capacitor
6
EN
Mode control input 1; internal pull-down, see Figure 6
7
INH
Control output; set HIGH to activate voltage regulator; open drain
8
NERR
Diagnosis output 1; error and power on indication output, push-pull
output stage
9
WK
Wake-up input; bi-level sensitive
Final Data Sheet
5
Rev. 3.2, 2006-04-05
TLE 6251 G
Table 1
Pin Definitions and Functions (cont’d)
Pin No.
Symbol
Function
10
VS
Battery voltage supply input; block to GND with 100 nF ceramic
capacitor
11
SPLIT
Termination output; to support the recessive voltage level of the bus
lines (see Table 2)
12
CANL
Low line output; LOW in dominant state
13
CANH
High line output; HIGH in dominant state
14
NSTB
Mode control input 2; internal pull-down, see Figure 6
Final Data Sheet
6
Rev. 3.2, 2006-04-05
TLE 6251 G
Functional Block Diagram
VS
VCC
WK
TLE 6251 G
10
7
3
9
Wake-Up
Logic
6
Mode Control
Logic
14
5
CANH
CANL
Driver
Output
Stage
12
EN
NSTB
VµC
8
Diagnosis
Logic
13
INH
NERR
Temp.Protection
1
+
timeout
TxD
=
VµC
MUX
SPLIT
GND
4
RxD
Receiver
+
Bus Failure
Detection
11
2
AEB03397.VSD
Figure 2
Final Data Sheet
Block Diagram
7
Rev. 3.2, 2006-04-05
TLE 6251 G
Application Information
As a successor to the first generation of HS CAN, the TLE 6251 G is designed to provide an
excellent passive behavior when the transceiver is switched off (mixed networks, terminal 15/30
applications). The current consumption can be reduced, due to the low power modes. This
supports networks with partially powered down nodes.
A wake-up from the low power modes is possible via a message on the bus or via the bi-level
sensitive wake input WK. An external voltage supply IC can be controlled by the inhibit output
INH. So, the µC can be powered down and the TLE 6251 G still reacts to wake-up activities on
the CAN bus or local wake input activities.
A diagnosis output pin NERR, allows mode dependent enhanced diagnosis of bus failures and
wake-up source. A VBAT fail flag reports a power-on condition at the battery supply input. The
VBAT fail flag will be resetted after the first transition into normal mode.
The TLE 6251 G has four operation modes, the normal, the receive only, the standby mode and
the sleep mode. These modes can be controlled with the two control pins EN and NSTB pin (see
Figure 6, Table 2). Both, EN and NSTB, have an implemented pull-down, so if there is no signal
applied to EN and NSTB, the transceiver automatically changes to the standby mode.
Normal Mode
To transfer the TLE 6251 G into the normal mode, NSTB and EN have to be switched to HIGH
level. This mode is designed for the normal data transmission/reception within the HS-CAN
network.
Transmission
The signal from the µC is applied to the TxD input of the TLE 6251 G. Now the bus driver
switches the CANH/L output stages to transfer this input signal to the CAN bus lines.
TxD Time-out Feature
If the TxD signal is dominant for a time t > tTxD, the TxD time-out function deactivates the
transmission of the signal at the bus. This is realized to prevent the bus from being blocked
permanently due to an error.
The transmission is released again, after a mode state change.
TxD to RxD Short Circuit Feature
Similar to the TxD time-out, a TxD to RxD short circuit would also drive a permanent dominant
signal at the bus and so block the communication. To avoid this, the TLE 6251 G has a TxD to
RxD short circuit detection.
Final Data Sheet
8
Rev. 3.2, 2006-04-05
TLE 6251 G
Reduced Electromagnetic Emission
The bus driver has an implemented control to reduce the electromagnetic emission (EME). This
is achieved by controlling the symmetry of the slope, resp. of CANH and CANL.
Overtemperature
The driver stages are protected against overtemperature. Exceeding the shutdown temperature
results in deactivation of the driving stages at CANH/L. To avoid a bit failure after cooling down,
the signals can be transmitted again only after a dominant to recessive edge at TxD.
Figure 3 shows the way how the transmission stage is deactivated and activated again. First an
overtemperature condition causes the transmission stage to deactivate. After the overtemperature
condition is no longer present, the transmission is only possible after the TxD bus signal has
changed to recessive level.
Failure
Overtemp
VCC
Overtemperature
GND
t
TxD
VCC
GND
t
CANH
VCC
R
D
VCC/2
R
t
AET03394.VSD
Figure 3
Final Data Sheet
Release of the Transmission after Overtemperature
9
Rev. 3.2, 2006-04-05
TLE 6251 G
Reception
The analog CAN bus signals are converted into a digital signal at RxD via the differential input
receiver.
In normal mode and RxD only, the split pin is used to stabilize the recessive common mode
signal.
Permanent Recessive Clamping
If the RxD signal is permanent recessive, although there is a message sent on the bus, the host µC
of this transceiver could start a message at any time, because the bus seems to be idle. To prevent
this node to disturb the communication on the bus, the TLE 6251 G offers a so called permanent
RxD recessive clamping. If the RxD signal is permanent recessive, an error flag is set and the
transmitter is deactivated as long as the error occurs
Receive Only Mode (RxOnly Mode)
In the RxOnly mode, the transmission stage is deactivated but the reception of signals via the
CAN bus is still possible. This mode is implemented to support hardware and software diagnosis
functions.
If there is an hardware error on the transmission part of a node (e.g. bubbling idiot failure), in the
RxOnly mode, the bus is no longer blocked and the µC can still receive the messages on the bus.
It is also possible to make a network analysis of the interconnections between the nodes. A
connection between two nodes (in a network) is checked if both nodes are in the normal mode
and all others are in RxOnly mode. If a message from one node is sent to the other, this has to be
acknowledged. If there is no acknowledge of the message, the connection between the two nodes
has an error.
The RxD pin also works as an diagnosis flag, which is described more in detail in Table 2.
Final Data Sheet
10
Rev. 3.2, 2006-04-05
TLE 6251 G
Standby Mode
In the standby mode, transmission and reception of signals is deactivated. This is the first step of
reducing the current consumption. The internal voltage regulator control pin (INH) is still active,
so all external (INH controlled) powered devices are also activated.
Wake-Up
The wake-up is possible via WK-pin (filtering time t > tWK) or CAN message (filtering time t >
tWU) and sets the RxD/NERR pins to LOW, see Figure 4. Now the µC is able to detect this change
at RxD and switch the transceiver into the normal mode. Once the wake-up flag is set (= LOW),
it remains in this state, as long as the transceiver is not transferred into the normal mode. The
detection of the wake-up source is possible during the first 4 recessive to dominant edges at TxD
in the normal mode.
Go-to Sleep Mode
The go-to sleep mode is used to have an intermediate step between the sleep mode and all other
modes. This mode has to control if the sleep command (EN = 1, NSTB = 0) is activated for a
minimum hold time t > thSLP. Afterwards the TLE 6251 G automatically transfers into the sleep
mode. The activated features in go-to sleep mode are similar to the standby mode.
Sleep Mode
In the sleep mode, transmission and reception of signals is deactivated. This is the second step of
reducing the current consumption. The internal voltage regulator control pin (INH) is deactivated.
Transition into other Modes during Sleep Mode
Transition from sleep into other modes is possible if VCC and VµC active. Selection of the modes
can be done by the mode control inputs.
Wake-Up
The wake-up is possible via WK-pin (filtering time t > tWK) or CAN message (filtering time t >
tWU) and automatically transfers the TLE 6251 G into the standby mode and sets the RxD/NERR
pins to LOW, see Figure 4. Once the TLE 6251 G has been set to the standby mode, the system
voltage regulator is activated by the inhibit output INH, and the µC restarts. Now the µC is able
to detect this change at RxD and switch the transceiver into the normal mode. Once the wake-up
flag is set (= LOW), it remains in this state, as long as the transceiver is not transferred into the
normal mode. The detection of the wake-up source is possible during the first 4 recessive to
dominant edges at TxD in the normal mode.
Final Data Sheet
11
Rev. 3.2, 2006-04-05
TLE 6251 G
CAN_H
CAN_L
WAKE
PATTERN
Communication
starts
BUS
WAIT
BUS
OFF
Vdiff
INH
tWU
DEVICE
WAKE
Vcc/Vio
ECU WAKE
LDO RAMP UP
µC P.O.R.
RxD
NERR
NSTB/EN
µC set TLE6251G to
normal operation
Normal mode
Figure 4
Final Data Sheet
RxD during Sleep mode
12
Rev. 3.2, 2006-04-05
TLE 6251 G
Split Circuit
The split circuitry is activated during normal and RxOnly mode and deactivated (SPLIT pin high
ohmic) during sleep and standby mode. The SPLIT pin is used to stabilize the recessive common
mode signal in normal mode and RxOnly mode. This is realized with a stabilized voltage of 0.5
VCC at SPLIT.
CANH
CANH
TLE 6251 G/DS
60 Ω
Split
Termination
SPLIT
10
nF
TLE 6251 G/DS
60 Ω
CAN
Bus
Split
Termination
60 Ω
60 Ω
CANL
SPLIT
10
nF
CANL
10
nF
Split
Termination
at Stub
1.5 kΩ
CANH
1.5 kΩ
SPLIT
CANL
TLE 6251 G/DS
AEA03399.VSD
Figure 5
Application example for the SPLIT Pin
A correct application of the SPLIT pin is shown in Figure 5. The split termination for the left and
right node is realized with two 60 Ω resistances and one 10 nF capacitor. The center node in this
example is a stub node and the recommended value for the split resistances is 1.5 kΩ.
Diagnosis-Flags at NERR and RxD
Power-Up Flag
•
Task: to signalize a power-up state at VBAT
Final Data Sheet
13
Rev. 3.2, 2006-04-05
TLE 6251 G
•
•
Indicator: NERR = LOW in RxOnly mode
Remarks: Power-up flag is cleared when entering the normal mode
Wake-Up Flag
•
•
•
Task: to signalize a wake-up condition at the WK pin (filtering time t > tWK) or via CAN bus
message (filtering time t > tWU)
Indicator: RxD or NERR = LOW in sleep/stand-by mode immediately after wake-up
Remarks: Flag is cleared on entering the RxOnly mode
Wake-Up Source Flag
•
•
•
Task: to distinguish between the two wake-up sources
Indicator: NERR = LOW in normal mode = wake-up via WK pin
Remarks: only available if the power-up flag is cleared. After four recessive to dominant
edges on TxD in normal mode, the flag is cleared. Leaving the normal mode clears the wakeup source flag.
Bus Failure Flag
•
•
•
Task: to signalize a bus line short circuit condition to GND, VS or VCC
Indicator: NERR = LOW in normal mode
Remarks: flag is set after four consecutive recessive to dominant cycles on pin TxD when
trying to drive the bus dominant. The bus failure flag is cleared if the normal mode is
reentered or 4 recessive to dominant edges at TxD without failure condition.
Local Failure Flag
•
•
•
Task: to signalize one of the five local failure conditions described in Local Failure-Flags
and -Detection
Indicator: NERR = LOW in RxOnly mode (local failure flag is set)
Remarks: the flag is cleared when entering the normal mode from RxOnly mode or when RxD
is dominant while TxD is recessive.
Final Data Sheet
14
Rev. 3.2, 2006-04-05
TLE 6251 G
Local Failure-Flags and -Detection
TxD Dominant Failure Detection
•
•
•
•
Effect: permanent dominant signal for t > tTxD at TxD
Indicator: NERR = LOW in RxOnly mode (local failure flag is set)
Action: disabling of the transmitter stage
Remarks: release of the transmitter stage only after transition into RxOnly mode (failure
diagnosis) and transition into normal mode.
RxD Permanent Recessive Clamping
•
•
•
•
Effect: internal RxD signal does not match signal at RxD pin because the RxD pin is pulled
to HIGH (permanent HIGH)
Indicator: NERR = LOW in RxOnly mode (local failure flag is set)
Action: disabling of the receiver stage
Remarks: the flag is cleared by changing from RxOnly (failure diagnosis) into normal mode
or RxD gets dominant.
TxD to RxD Short Circuit
•
•
•
•
Effect: short circuit between RxD and TxD
Indicator: NERR = LOW in RxOnly mode (local failure flag is set)
Action: disabling of the transmitter stage
Remarks: the flag is cleared by changing from RxOnly (failure diagnosis) into normal mode.
Bus Dominant Clamping
•
•
•
•
Effect: permanent dominant signal at the CAN bus for t > tBUS
Indicator: NERR = LOW in RxOnly mode (local failure flag is set)
Action: none
Remarks: none
Overtemperature Detection
•
•
•
•
Effect: junction temperature at the driving stages exceeded
Indicator: NERR = LOW in RxOnly mode (local failure flag is set)
Action: disabling of the transmitter stage
Remarks: the flag is cleared by changing from RxOnly (failure diagnosis) into normal mode
or RxD gets dominant. Bus only released after the next dominant bit in TxD.
Final Data Sheet
15
Rev. 3.2, 2006-04-05
TLE 6251 G
Other Features
VµC-level Adapter
The advantage of the adaptive µC logic is the ratiometrical scaling of the I/O levels depending on
the input voltage at the VµC pin. So it can be ensured that the I/O voltage of the µC fits to the
internal logic levels of the TLE 6251 G.
WAKE Input
The wake-up input pin is a bi-level sensitive input. This means that both transitions, HIGH to
LOW and LOW to HIGH, result in a wake-up.
VCC, VµC Undervoltage Detection
If an undervoltage condition at VCC, VµC is detected for longer than t = tUV,t, the TLE 6251 G
automatically transfers into the sleep mode and the undervoltage flag is set. This flag is an internal
flag and not available via NERR or RxD. The flag is cleared again, after setting the power on or
wake flag (power-up or wake-up).
VS Undervoltage Detection
If an undervoltage condition at VS is detected, the TLE 6251 G immediately transfers into the
standby mode and the undervoltage flag is set. This flag is an internal flag and not available via
NERR or RxD. The flag is cleared again, after the supply voltage VS has reached the nominal
value.
Final Data Sheet
16
Rev. 3.2, 2006-04-05
TLE 6251 G
Start Up
Power Up
Power Down
Normal Mode
EN
NSTB
IHH
1
1
High
Undervoltage
at VS
Go to Sleep
Receive-Only
Stand-By
EN
NSTB
EN
NSTB
INH
EN
NSTB
INH
1
0
0
1
High
0
0
High
t < thSLP
Wake-Up:
t > tWK
t > tWU
Undervoltage
at VCC /VµC
for t > tUV,t
Sleep
t > thSLP
EN
NSTB
IHN
0
0
Float.
AEA03400.VSD
Figure 6
Final Data Sheet
Mode State Diagram
17
Rev. 3.2, 2006-04-05
TLE 6251 G
Table 2
Truth Table
NSTB EN INH
Mode
1
NORMAL No CAN bus failure1)
1
1
0
HIGH
HIGH
Event
NERR RxD
CAN bus failure1)
0
CANH/CANL driver off2)
1
Wake-up via CAN bus/no
wake-up request detected
1
Wake-up via pin WK3)
0
RECEIVE No VBAT fail detected4)
ONLY
V fail detected4)
1
BAT
0
0
0
0
1
0
1
0
No TxD time-out,
overtemperature, RxD
recessive clamping or bus
dominant time out
detected5)
1
TxD time-out,
overtemperature, RxD
recessive clamping or bus
dominant time out
detected5)
0
LOW: bus ON
dominant,
HIGH: bus
recessive
LOW: bus ON
dominant,
HIGH: bus
recessive
Wake-up request detected6) 0
0
No Wake up request
detected6)
1
1
HIGH7) GO TO
SLEEP
Wake-up request detected6) 0
0
No wake-up request
detected6)
1
1
floating SLEEP8)
Wake-up request detected6) 0
0
No wake-up request
detected6)
1
HIGH
STAND
BY
1
SPLIT
OFF
OFF
OFF
1) Only valid AFTER at least four recessive to dominant edges at TxD after entering the normal mode.
2) Due to an thermal overtemperature shutdown or TxD time-out.
3) Only valid BEFORE four recessive to dominant edges at TxD after entering the normal mode.
4) Power on situation, valid if VCC and VµC is active and transition from sleep, stand-by or goto sleep command.
5) Transition from normal mode.
6) Only valid if VCC and VµC are active.
7) If this mode is selected for a time longer than the hold time of the go-to sleep command (t > thSLP), INH is floating.
Final Data Sheet
18
Rev. 3.2, 2006-04-05
TLE 6251 G
8) Transition into the sleep mode only if go-to sleep command was selected for a time longer than the hold time of the goto sleep command (t > thSLP).
Final Data Sheet
19
Rev. 3.2, 2006-04-05
TLE 6251 G
Table 3
Absolute Maximum Ratings
Parameter
Symbol
Limit Values
Unit Remarks
Min.
Max.
VS
VCC
VµC
VCANH/L
-0.3
40
V
–
-0.3
5.5
V
–
-0.3
5.5
V
–
-27
40
V
–
VdiffESD
-40
40
V
CANH - CANL < |40 V|;
CANH - SPLIT < |40 V|
CANL - SPLIT < |40 V|;
CANL - WK < |40 V|;
CANH - WK < |40 V|;
Split - WK < |40 V|
-27
40
V
–
-27
40
V
–
-0.3
VS + 0.3 V
–
-0.3
VµC
V
0 V < VµC < 5.5 V
Voltages
Supply voltage
5 V supply voltage
Logic supply voltage
CAN bus voltage (CANH,
CANL)
Differential voltage CANH,
CANL, SPLIT, WK
VSPLIT input voltage
VSPLIT
Input voltage at WK
VWK
Input voltage at INH
VINH
Logic voltages at EN, NSTB, VI
NERR, TxD, RxD
Electrostatic discharge
voltage at SPLIT
VESD
-1
1
kV
human body model
(100 pF via 1.5 kΩ)
Electrostatic discharge
voltage at CANH, CANL,
WK vs. GND
VESD
-6
6
kV
human body model
(100 pF via 1.5 kΩ)
Electrostatic discharge voltage for
all pin except SPLIT
VESD
-2
2
kV
human body model
(100 pF via 1.5 kΩ)
Electrostatic discharge
voltage at CANH, CANL vs.
GND
VESD
-6
6
kV
According to IEC61000-4-2
(150 pF via 330Ω)
See Figure 101)
Tj
-40
150
°C
–
Temperatures
Storage temperature
1) application circuits with and without terminated SPLIT pin
Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible
damage to the integrated circuit.
Final Data Sheet
20
Rev. 3.2, 2006-04-05
TLE 6251 G
Table 4
Operating Range
Parameter
Supply voltage
5 V supply voltage
Logic supply voltage
Junction temperature
Symbol
Limit Values
Unit
Remarks
Min.
Max.
VS
VCC
VµC
Tj
5
40
V
–
4.75
5.25
V
–
3.0
5.25
V
–
-40
150
°C
–
Rthj-a
–
120
K/W
1)
150
190
°C
–
–
10
K
–
Thermal Resistances
Junction ambient
Thermal Shutdown (junction temperature)
Thermal shutdown temp.
Thermal shutdown hyst.
TjSD
∆T
1) Calculation of the junction temperature Tj = Tamb + P × Rthj-a
Final Data Sheet
21
Rev. 3.2, 2006-04-05
TLE 6251 G
Table 5
Electrical Characteristics
4.75 V < VCC < 5.25 V; 3.0 V < VµC < 5.25 V; 6.0 V < VS < 40 V; RL = 60 Ω; normal mode; -40
°C < Tj < 150 °C; all voltages with respect to ground; positive current flowing into pin; unless
otherwise specified.
Parameter
Symbol
Limit Values
Unit Test Condition
Min.
Typ.
Max.
ICC+µC
–
6
10
mA
recessive state;
TxD = high
ICC+µC
–
50
80
mA
dominant state;
TxD = low
Current consumption
RxD Only mode
ICC+µC
–
6
10
mA
receive only mode
Current consumption
stand-by mode
IVS
–
25
50
µA
stand-by mode;
VS = WK = 12 V
ICC+µC
–
25
60
µA
stand-by mode;
VS = WK = 12 V
VCC = VµC = 5V
IVS
–
25
35
µA
sleep mode,
VS = 12 V,
Tj < 85 °C,
VCC = VµC = 0 V
ICC+µC
–
2.5
10
µA
sleep mode,
VS = 12 V,
Tj < 85 °C,
VCC = VµC = 5V
VCC,UV
VµC,UV
VS,Pon
VS,Poff
2
3
4
V
–
0.4
1.2
1.8
V
–
2
4
5
V
–
2
3.5
5
V
–
IRD,H
IRD,L
ISC,RxD
–
-4
-2
mA
2
4
–
mA
–
70
84
mA
VRD = 0.8 × VµC
VRD = 0.2 × VµC
VµC = 5.25 V,
Current Consumption
Current consumption
normal mode
Current consumption
sleep mode
Supply Resets
VCC undervoltage detection
VµC undervoltage detection
VS power ON detection level
VS power OFF detection level
Receiver Output RxD
HIGH level output current
LOW level output current
Short circuit current
RxD = LOW
Final Data Sheet
22
Rev. 3.2, 2006-04-05
TLE 6251 G
Table 5
Electrical Characteristics (cont’d)
4.75 V < VCC < 5.25 V; 3.0 V < VµC < 5.25 V; 6.0 V < VS < 40 V; RL = 60 Ω; normal mode; -40
°C < Tj < 150 °C; all voltages with respect to ground; positive current flowing into pin; unless
otherwise specified.
Parameter
Short circuit current
Symbol
ISC,RxD
Limit Values
Min.
Typ.
Max.
–
35
45
Unit Test Condition
mA
VµC = 3.3 V,
RxD = LOW
Final Data Sheet
23
Rev. 3.2, 2006-04-05
TLE 6251 G
Table 5
Electrical Characteristics (cont’d)
4.75 V < VCC < 5.25 V; 3.0 V < VµC < 5.25 V; 6.0 V < VS < 40 V; RL = 60 Ω; normal mode; -40
°C < Tj < 150 °C; all voltages with respect to ground; positive current flowing into pin; unless
otherwise specified.
Parameter
Symbol
Limit Values
Min.
Typ.
Unit Test Condition
Max.
Transmission Input TxD
HIGH level input voltage
threshold
VTD,H
LOW level input voltage
threshold
VTD,L
TxD input hysteresis
HIGH level input current
TxD pull-up resistance
0.52 × 0.7 ×
–
VµC
V
recessive state
V
dominant state
VµC
0.30 × 0.48 × –
VµC
VµC
VTD,hys
100
400
1000
mV
Not subject to
production test
Specified by design.
ITD
RTD
-5
0
5
µA
VTxD = VµC
10
20
40
kΩ
–
–
0.52 × 0.7 ×
V
–
V
–
Mode Control Inputs EN, NSTB
HIGH level input voltage
threshold
VM,H
LOW level input voltage
threshold
VM,L
Input hysteresis
LOW level input current
Pull-down resistance
VµC
VµC
0.30 × 0.48 × –
VµC
VµC
VM,hys
100
400
1000
mV
Not subject to
production test
Specified by design.
IMD
RM
-5
0
5
µA
VEN /VNSTB = 0V
10
20
40
kΩ
–
VNERR,H
0.8 ×
–
–
V
INERR = -100 µA
–
0.2 ×
V
INERR = 1.25 mA
VµC = 5.25 V
VµC = 3.3 V
Diagnostic Output NERR
HIGH level output voltage
VµC
LOW level output voltage
VNERR,L
–
VµC
Short circuit current
Short circuit current
Final Data Sheet
ISC,NERR
ISC,NERR
–
20
48
mA
–
13
25
mA
24
Rev. 3.2, 2006-04-05
TLE 6251 G
Table 5
Electrical Characteristics (cont’d)
4.75 V < VCC < 5.25 V; 3.0 V < VµC < 5.25 V; 6.0 V < VS < 40 V; RL = 60 Ω; normal mode; -40
°C < Tj < 150 °C; all voltages with respect to ground; positive current flowing into pin; unless
otherwise specified.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
0.3 ×
0.5 ×
0.7 ×
VCC
VCC
VCC
Unit Test Condition
Termination Output SPLIT
Split output voltage
VSPLIT
VSPLIT
V
0.45 × 0.5 ×
0.55 × V
VCC
VCC
VCC
normal mode;
-500 µA < ISPLIT <
500 µA
normal mode;
no load
Leakage current
ISPLIT
-5
0
5
µA
sleep mode
VCC = VµC = 0 V
Output resistance
RSPLIT
–
600
–
Ω
–
VWK,th
VS - 4 VS -
Wake Input WK
Wake-up threshold voltage
VS - 2 V
VNSTB = 0 V
2.5
IWKH
IWKL
–
5
10
µA
-10
-5
–
µA
VWK = VWK,th + 1
VWK = VWK,th - 1
HIGH level voltage drop
∆VH = VS - VINH
∆VH
–
0.4
0.8
V
IINH = -1 mA
Leakage current
IINH,lk
–
–
5
µA
sleep mode;
VINH = 0 V
CANL/CANH recessive
output voltage
VCANL/H
2.0
–
3.0
V
no load
CANH, CANL recessive
output voltage difference
Vdiff
-500
–
50
mV
VTxD = VµC;
CANL dominant output
voltage
VCANL
0.5
–
2.25
V
VTxD = 0 V;
CANH dominant output
voltage
VCANH
2.75
–
4.5
V
VTxD = 0 V
CANH, CANL dominant
output voltage difference
Vdiff
1.5
–
3.0
V
VTxD = 0 V
HIGH level input current
LOW level current
Inhibit Output INH
Bus Transmitter
Final Data Sheet
no load
25
Rev. 3.2, 2006-04-05
TLE 6251 G
Table 5
Electrical Characteristics (cont’d)
4.75 V < VCC < 5.25 V; 3.0 V < VµC < 5.25 V; 6.0 V < VS < 40 V; RL = 60 Ω; normal mode; -40
°C < Tj < 150 °C; all voltages with respect to ground; positive current flowing into pin; unless
otherwise specified.
Parameter
Symbol
Limit Values
Min.
CANL short circuit current
CANH short circuit current
Leakage current
ICANLsc
50
ICANHsc -200
ICANHL,lk -5
Unit Test Condition
Typ.
Max.
80
200
mA
-80
-50
mA
0
5
µA
VCANLshort = 18 V
VCANHshort = 0 V
VS = VµC = VCC =
0 V;
0 V < VCANH,L < 5 V
Bus Receiver
Differential receiver threshold Vdiff,rdN
voltage,
Vdiff,drN
normal mode
–
0.8
0.9
V
see CMR
0.5
0.6
–
V
see CMR
0.9
1.15
V
recessive to
dominant
V
dominant to
recessive
Differential receiver
threshold,
low power mode
Vdiff,rdLP
Vdiff,drLP
0.4
0.8
Common Mode Range
CMR
-12
–
12
V
VCC = 5 V
Differential receiver
hysteresis
Vdiff,hys
–
200
–
mV
–
CANH, CANL input
resistance
Ri
10
20
30
kΩ
recessive state
Differential input resistance
Rdiff
20
40
60
kΩ
recessive state
8
25
50
µs
–
5
10
20
µs
–
0.75
3
5
µs
–
–
150
255
ns
CL = 47 pF;
RL = 60 Ω;
VCC = VµC = 5 V;
CRxD = 15 pF
Dynamic CAN-Transceiver Characteristics
Min. hold time go to sleep
command
thSLP
Min. wake-up time on pin WK tWK
Min. dominant time for bus
wake-up
tWU
td(L),TR
Propagation delay
TxD-to-RxD LOW (recessive
to dominant)
Final Data Sheet
26
Rev. 3.2, 2006-04-05
TLE 6251 G
Table 5
Electrical Characteristics (cont’d)
4.75 V < VCC < 5.25 V; 3.0 V < VµC < 5.25 V; 6.0 V < VS < 40 V; RL = 60 Ω; normal mode; -40
°C < Tj < 150 °C; all voltages with respect to ground; positive current flowing into pin; unless
otherwise specified.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit Test Condition
Propagation delay
TxD-to-RxD HIGH
(dominant to recessive)
td(H),TR
–
150
255
ns
Propagation delay
TxD LOW to bus dominant
td(L),T
–
50
105
ns
Propagation delay
TxD HIGH to bus recessive
td(H),T
–
50
105
ns
Propagation delay
bus dominant to RxD LOW
td(L),R
–
50
150
ns
Propagation delay
bus recessive to RxD HIGH
td(H),R
–
100
150
ns
TxD permanent dominant
disable time
tTxD
0.3
0.6
1.0
ms
–
Bus permanent time-out
tBus,t
tUV,t
0.3
0.6
1.0
ms
–
50
80
120
ms
–
VCC, VµC undervoltage filter
CL = 47 pF;
RL = 60 Ω;
VCC = VµC = 5 V;
CRxD = 15 pF
CL = 47 pF;
RL = 60 Ω;
VCC = VµC = 5 V
CL = 47 pF;
RL = 60 Ω;
VCC = VµC = 5 V
CL = 47 pF;
RL = 60 Ω;
VCC = VµC = 5 V;
CRxD = 15 pF
CL = 47 pF;
RL = 60 Ω;
VCC = VµC = 5 V;
CRxD = 15 pF
time
Final Data Sheet
27
Rev. 3.2, 2006-04-05
TLE 6251 G
Diagrams
10
VS
NSTB
100 nF
EN
13
47 pF
CANH
TxD
60 Ω
RxD
12
6
1
4
15 pF
CANL
VµC
9
14
WK
GND
VCC
5
3
100
nF
2
100
nF
= 5V
= 3...5 V
AEA03401.VSD
Figure 7
Test Circuit for Dynamic Characteristics
VTxD
VµC
GND
VDIFF
td(L),T
VDIFF(d)
VDIFF(r)
td(L),R
VRxD
t
td(H),T
t
td(H),R
td(L),TR
td(H),TR
VµC
0.8 x VµC
GND
0.2 x VµC
t
AET03402.VSD
Figure 8
Final Data Sheet
Timing Diagrams for Dynamic Characteristics
28
Rev. 3.2, 2006-04-05
TLE 6251 G
Application
VS
4.7 nF 1)
60 Ω
60 Ω
TLE 6251 G
10 kΩ
9
VBat
CAN
Bus
EN
WK
NSTB
NERR
51 µH
13
1)
12
11
10
CANH
RxD
CANL
TxD
VµC
SPLIT
6
14
8
µP
with On Chip
CAN Module
4
1
e.g. C164C
C167C
5
100
nF
VS
100 7
INH
nF
GND
VCC
3
VQ1
INH
e.g. TLE 4476
(3.3/5 V) or
TLE 4471
TLE 4276
TLE 4271
22 +
µF
100
nF
GND
100
nF
2
VI1
100
nF
GND
VQ2
5V
+
22
µF
+
22
µF
ECU
TLE 6251 GS
51 µH
7
1)
6
5
CANH
STB
CANL
RxD
SPLIT
TxD
GND
VCC
8
µP
with On Chip
CAN Module
4
1
e.g. C164C
C167C
3
100
nF
2
100
nF
GND
e. g. TLE 4270
60 Ω
60 Ω
4.7 nF 1)
VI
22 +
µF
100
nF
GND
Final Data Sheet
+
22 µF
ECU
1) Optional, according to the car manufacturer requirements
Figure 9
5V
VQ
AEA03396.VSD
Application Circuit Example
29
Rev. 3.2, 2006-04-05
TLE 6251 G
100nF
100nF
Vs
CANH
TLE 6251 G
100nF
SPLIT
47
nF
100nF
Vcc
60 Ω
SPLIT
22
nF
30 Ω
100nF
Vio
CANH
TLE 6251 G
30 Ω
100nF
Vcc
Vs
CANL
Vio
60 Ω
CANL
Case 1
Case 2
ESD TESTING.VSD
100nF
100nF
Vs
CANH
TLE 6251 G
100nF
Vcc
30 Ω
Vs
CANH
TLE 6251 G
100nF
SPLIT
Vcc
SPLIT
Vio
CANL
30 Ω
100nF
Vio
100nF
CANL
Case 3
Figure 10
Case 4
ESD test for conformance to IEC 61000-4-2
The 100nF decoupling capacitors on Vs, Vio and Vcc are situated 5mm from the pins.
The distance between the fixpoint where the Gun is applied and the pin CAN_H and CAN_L are
20mm. The test has been realized with NoiseKen ESS2000.
Final Data Sheet
30
Rev. 3.2, 2006-04-05
TLE 6251 G
Package Outlines
0.33 x 45˚
1.27
14
+0.25
0.64 -0.23
6 ±0.2
14x
0.254 M A
8
7
1
1)
8.69 +0.05
-0.11
8˚ MAX.
-0.01
C
0.1
0.254 M B C 14x
+0.08
0.41 -0.06
A
0.2 +0.05
0.25 -0.15
(1.47)
1.75 MAX.
4
+0.05 1)
-0.13
B
Index Marking
1)
Does not include plastic or metal protrusion of 0.25 max. per side
GPS09330
Figure 11
P-DSO-14-13 (Plastic Dual Small Outline)
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Dimensions in mm
SMD = Surface Mounted Device
Final Data Sheet
31
Rev. 3.2, 2006-04-05