PTF211301 LDMOS RF Power Field Effect Transistor 130 W, 2110–2170 MHz Description Features The PTF211301 is a 130–W, internally matched GOLDMOS FET intended for WCDMA applications. It is characaterized for single– and two–carrier WCDMA operation from 2110 to 2170 MHz. Full gold metallization ensures excellent device lifetime and reliability. • Broadband internal matching • Typical two–carrier WCDMA performance at 2140 MHz - Average output power = 28 W - Linear Gain = 13.5 dB - Efficiency = 25% - Intermodulation distortion = –37 dBc - Adjacent channel power = –42 dBc • Typical CW performance, 2170 MHz, 28 V - Output power at P–1dB = 148 W - Efficiency = 50% • Integrated ESD protection: Human Body Model, Class 1 (minimum) • Excellent thermal stability, low HCI drift • Capable of handling 10:1 VSWR @ 28 V, 130 W (CW) output power Two–Carrier WCDMA Drive-Up -30 35 -35 30 Efficiency -40 25 IM3 -45 20 15 -50 -55 Drain Efficiency (%) IM3 (dBc), ACPR (dBc) VDD = 28 V, IDQ = 1.50 A, f = 2140 MHz, 3GPP WCDMA signal, P/A R = 8 dB, 10 MHz carrier spacing 10 ACPR 5 -60 36 38 40 42 44 46 PTF211301A Package 20260 Average Output Power (dBm) RF Characteristics at TCASE = 25°C unless otherwise indicated WCDMA Measurements (not subject to production test—verified by design/characterization in Infineon test fixture) VDD = 28 V, IDQ = 1.5 A, POUT = 28 W average f1 = 2140 MHz, f2 = 2150 MHz, 3GPP signal, channel bandwidth = 3.84 MHz , peak/average = 8 dB @ 0.01% CCDF Characteristic Symbol Min Typ Max Units Intermodulation Distortion IMD — –37 — dBc Gain Gps — 13.5 — dB Drain Efficiency ηD — 25 — % Symbol Min Typ Max Units Gain Gps 12 13.5 — dB Drain Efficiency ηD 34 37 — % Intermodulation Distortion IMD — –30 –28 dBc Two–Tone Measurements (tested in Infineon test fixture) VDD = 28 V, IDQ = 1.5 A, POUT = 120 W PEP, f = 2170 MHz, tone spacing = 1 MHz Characteristic ESD: Electrostatic discharge sensitive device — observe handling precautions! Data Sheet 1 2004-01-02 PTF211301 DC Characteristics at TCASE = 25°C unless otherwise indicated Characteristic Conditions Symbol Min Typ Max Units Drain–Source Breakdown Voltage VGS = 0 V, IDS = 10 µA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, V GS = 0 V IDSS — — 1.0 µA On–State Resistance VGS = 10 V, V DS = 0.1 V RDS(on) — 0.07 — Ω Operating Gate Voltage VDS = 28 V, IDQ = 1.5 A VGS 2.5 3.2 4.0 V Gate Leakage Current VGS = 10 V, V DS = 0 V IGSS — — 1.0 µA Maximum Ratings Parameter Symbol Value Unit Drain–Source Voltage VDSS 65 V Gate–Source Voltage VGS –0.5 to +12 V Junction Temperature TJ 200 °C Total Device Dissipation PD 350 W 2.0 W/°C Above 25°C derate by Storage Temperature Range TSTG –40 to +150 °C Thermal Resistance (TCASE = 70°C, 130 W CW) RθJC 0.50 °C/W Typical Performance (data taken in a production test fixture) Broadband Performance Intermodulation Distortion Products & Efficiency vs. Output Power 40 -10 Input Return Loss 35 30 25 -20 -25 Efficiency 20 15 -15 -30 Gain 10 2060 -35 2110 2160 -30 -35 35 -40 30 -45 -50 20 -55 15 IM5 -65 -40 2210 25 IM3 -60 10 5 IM7 -70 0 38 Frequency (MHz) Data Sheet 40 Efficiency Drain Efficiency (%) -5 IMD (dBc) 45 VDD = 28V, IDQ = 1.50 A, f = 2140 MHz, tone spacing = 1 MHz Input Return Loss (dB) Gain (dB), Efficiency (%) VDD = 28 V, IDQ = 1.50 A, POUT = 44 dBm 40 42 44 46 48 50 52 Output Power, PEP (dBm) 2 2004-01-02 PTF211301 Typical Performance (cont.) Intermodulation Distortion vs. Output Power Power Sweep, CW Conditions VDD = 28V, f = 2140 MHz, tone spacing = 1 MHz VDD = 28 V, IDQ = 1.50 A, f = 2170 MHz 55 15 1.80 A -45 1.20 A -50 45 35 13 12 25 Efficiency -55 15 11 -60 1.35 A 1.50 A -65 5 10 38 40 42 44 46 48 50 52 37 42 47 52 Peak Output Power (dBm) Output Power (dBm) Single–Carrier WCDMA Drive–Up IM3, Gain & Drain Efficiency vs Supply Voltage VDD = 28 V, IDQ = 1.50 A, f = 2140 MHz, 3GPP WCDMA signal, P/A R = 8.5 dB, 3.84 MHz bandwidth IDQ = 1.50 A, f = 2140 MHz, POUT = 47.8 dBm PEP, tone spacing = 1 MHz -40 0 25 -44 15 -46 10 -48 5 -10 IM3 (dBc) 20 Drain Efficiency (%) -42 ACPR Low 38 40 ACPR Up 42 -15 30 -20 25 -25 20 Gain -30 15 10 5 IM3 Up -45 0 23 24 25 44 26 27 28 29 30 31 32 33 Supply Voltage (V) Average Output Power (dBm) Data Sheet 35 -35 0 36 40 Efficiency -40 -50 34 45 -5 Efficiency Adjacent Channel Power Ratio (dBc) Gain 14 Drain Efficiency (%) 1.65 A -40 Gain (dB) 3rd Order IMD (dBc) -35 Drain Efficiency (%) -30 3 2004-01-02 PTF211301 Typical Performance (cont.) Intermodulation Distortion Products vs. Tone Spacing Gate-Source Voltage vs. Case Temperature Voltage normalized to typical gate voltage. Series show current. VDD = 28 V, IDQ = 1.50 A, , POUT = 50.8 dBm PEP, f = 2140 MHz 1.03 Normalized Bias Voltage Intermodulation Distortion (dBc) -20 -30 3rd Order -40 5th Order -50 7th Order -60 2.25 A 4.50 A 6.75 A 9.00 A 1.02 1.01 1.00 11.25 A 13.50 A 0.99 0.98 0.97 0.96 0 5 10 15 20 25 30 35 -20 20 60 100 Case Temperature (°C) Tone Spacing (MHz) RD G E Broadband Circuit Impedance E NGT HS Z Load 0 .1 Z Source Z0 = 50 Ω T OW A D G Z Load MHz R jX R jX 2050 6.58 -7.02 1.43 0.19 2110 6.14 -6.76 1.27 0.66 2140 5.96 -6.75 1.19 0.80 2170 5.82 -6.54 1.25 1.09 2220 5.45 -6.36 1.12 1.49 Data Sheet 4 0.2 0.1 Z Source 0.1 2220 MHz 2050 MHz <--- Z Load Ω D LOA D S TOW AR NGT H Z Source Ω Frequency 2050 MHz ELE W AV S 0.0 2220 MHz 2004-01-02 PTF211301 Test Circuit Reference Circit Schematic for f = 2140 MHz Circuit Assembly Information DUT PTF211301 PCB 0.76 mm. [.030”] thick, εr = 4.5 LDMOS Transistor Rogers TMM4 2 oz. copper Microstrip l1 l2 l3 l4 l5 l6 l7 l8 l9 l10 l11 l12 l13 l14 Dimensions: W x L (mm.) 23.24 x 1.30 4.45 x 1.30 11.43 x 1.78 9.83 x 1.78 4.22 x 10.08 0.89 x 1.32 5.00 x 17.73 30.99 x 1.22 30.99 x 1.22 1.93 x 29.72 1.52 x 25.10 1.91 x 12.90 9.32 x 1.85 30.99 x 1.30 Dimensions: W xL (in.) 0.915 x 0.051 0.175 x 0.051 0.450 x 0.070 0.387 x 0.070 0.166 x 0.397 0.035 x 0.052 0.197 x 0.698 1.220 x 0.048 1.220 x 0.048 0.076 x 1.170 0.060 x 0.988 0.075 x 0.508 0.367 x 0.073 1.220 x 0.051 Data Sheet Electrical Characteristics at 2140 MHz 0.308 λ, 54 Ω 0.059 λ, 54 Ω 0.154 λ, 45 Ω 0.132 λ, 45 Ω 0.061 λ, 13 Ω 0.012 λ, 53 Ω 0.074 λ, 7 Ω 0.409 λ, 55 Ω 0.409 λ, 55 Ω 0.029 λ, 4 Ω 0.016 λ, 5 Ω 0.067 λ, 13 Ω 0.125 λ, 43 Ω 0.411 λ, 54 Ω 5 2004-01-02 PTF211301 Test Circuit (cont.) Component C1 C2, C11, C19 C3, C9, C17 C4, C6 C5 C7 C8, C15, C16 C10, C18 C12, C13 C14 C20, C21, C22 J1, J2 L1, L2 QQ1 Q1 R1 R2 R3 R4 R5 R6 R7 R8 Data Sheet Description Manufacturer Capacitor, 10 µF, 35 V, Tant TE series Digi-Key Capacitor, 0.1 µF Digi-Key Capacitor, 0.01 µF ATC Capacitor, 10 pF ATC Capacitor, 0.1 pF ATC Capacitor, 0.9 pF ATC Capacitor, 8.2 pF ATC Capacitor, 1 µF ATC Capacitor, 0.7 pF ATC Capacitor, 1.2 pF ATC Capacitor, 0.01 µF Digi-Key Connector, SMA, Female, Panel Mount Ferrite Voltage regulator Digi-Key Transistor Infineon Resistor, 10 Ω, 1/4 W Digi-Key Resistor, 1.3 kΩ, 1/10 W, 0603 Digi-Key Resistor, 1.2 kΩ, 1/10 W, 0603 Digi-Key Potentiometer, 2 kΩ, 4 W Digi-Key Resistor, 10 kΩ, 1/4 W, 1206 Digi-Key Resistor, 24 kΩ, 1/4 W, 1206 Digi-Key Resistor, 1 kΩ, 1/4 W, 1206 Digi-Key Resistor, 3 kΩ, 1/4 W, 1206 Digi-Key 6 P/N or Comment PCS6106TR-ND, SMD PCC104BCT X08J103AFB 100 B 100 100 B 0R1 100 B 0R9 100 B 8R2 X24L105BVC 100 B 0R7 100 B 1R2 PCC1772CT-ND LM7805 BCP56 P10ECT-ND P1.3KGCT-ND P1.2KGCT-ND 3224W-202ETR-ND P10KECT-ND P24KECT-ND P1.0KECT-ND P3.0KECT-ND 2004-01-02 PTF211301 Test Circuit (cont.) Reference Circuit1 (not to scale) 1 Gerber Files for this circuit available on request Data Sheet 7 2004-01-02 PTF211301 Package Outline Specifications Type Package Outline Package Description Marking PTF211301A 20260 Standard Ceramic, flange PTF211301A Package 20260 45° X (2.03 [.080]) 2X 12.70 [.500] 4X R 1.52 [.060] D (2X 4.83±0.50 [.190±.020]) S +0.10 LID 13.21 -0.15 [.520 +.004 ] -.006 13.72 [.540] 2X 3.25 [.128] 23.37±0.51 [.920±.020] 2X 1.63 [.064] R G SPH 1.57 [.062] 0.51 [.020] 22.35±0.23 [.880±.009] 4.11±0.38 [.162±.015] 0.038 [.0015] -A27.94 [1.100] 1.02 [.040] 34.04 [1.340] ERA-H-30260-2-1-2302 Notes: Unless otherwise specified 1. Interpret dimensions and tolerances per ASME Y14.5M-1994. 2. Primary dimensions are mm. Alternate dimensions are inches. 3. Pins: D = drain, S = source, G = gate 4. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products Data Sheet 8 2004-01-02 PTF211301 Confidential Revision History: Previous Version: Page 2004-01-02 2003-11-24, Preliminary Data Sheet Data Sheet Subjects (major changes since last revision) Preliminary status removed. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] To request other information, contact us at: +1 877 465 3667 (1-877-GOLDMOS) USA or +1 408 776 0600 International Edition 2004-01-02 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 München, Germany © Infineon Technologies AG 2003. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 9 2004-01-02