Supertex inc. HV507 64-Channel Serial to Parallel Converter With High Voltage Push-Pull Outputs Features General Description ► ► ► ► ► ► ► ► The HV507 is a low voltage serial to high voltage parallel converter with 64 push-pull outputs. This device has been designed for use as a printer driver for electrostatic applications. It can also be used in any application requiring multiple output, high voltage, low current sourcing and sinking capabilities. Processed with HVCMOS® technology Operating output voltages to 300V Low power level shifting from 5.0 to 300V Shift register speed: 8.0MHz @ VDD = 5.0V 64 latched data outputs Output polarity and blanking CMOS compatible inputs Forward and reverse shifting options The device consists of a 64-bit shift register, 64 latches, and control logic to perform the polarity select and blanking of the outputs. A DIR pin controls the direction of data shift through the device. With DIR grounded, DIOA is Data-In and DIOB is Data-Out; data is shifted from HVOUT64 to HVOUT1. When DIR is at logic high, DIOB is Data-In and DIOA is Data-Out: data is then shifted from HVOUT1 to HVOUT64. Data is shifted through the shift register on the low to high transition of the clock. Data output buffers are provided for cascading devices. Operation of the shift register is not affected by the LE (latch enable), BL (blanking), or the POL(polarity) inputs. Transfer of data from the shift register to the latch occurs when the LE is high. The data in the latch is stored during LE transition from high to low. Functional Block Diagram POL BL Latch Enable VPP DIOA L/T CLOCK L/T DIR 64 bit Static Shift Register Supertex inc. L/T HVOUT2 • • • 60 Additional Outputs • • • HVOUT63 L/T HVOUT64 64 Latches DIOB HVOUT1 L/T = Level Translator ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com HV507 Ordering Information Package Option Device 80-Lead Quad Plastic Gullwing 20.00x14.00mm body 3.40mm height (max) 0.65mm pitch HV507 HV507PG-G -G indicates package is RoHS compliant (‘Green’) Absolute Maximum Ratings Pin Configuration Parameter Value Supply voltage, VDD -0.5V to +6.0V Supply voltage, VPP VDD to +320V Logic input levels -0.5V to VDD +0.5V Ground current2 High voltage supply current 0.5A 0.5A 1 Continuous total power dissipation 1200mW 2 Operating temperature range 80 1 80-Lead Quad Plastic Gullwing (PG) (top view) 0°C to +70°C Storage temperature range -65°C to +150°C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to GND. Notes: Connection to all power and ground pads is required. 1. Duty cycle is limited by the total power dissipated in the package. 2. For operation above 25°C ambiant derate linearly to 70OC at 26.7mW/°C. Product Marking HV507PG LLLLLLLLLL YYWW CCCCCCCC AAA L = Lot Number YY = Year Sealed WW = Week Sealed C = Country of Origin A = Assembler ID = “Green” Packaging Package may or may not include the following marks: Si or 80-Lead Quad Plastic Gullwing (PG) Recommended Operating Conditions Sym Parameter Min Typ Max Units VDD Logic supply voltage 4.5 5.0 5.5 V VPP High voltage supply 60 - 300 V VIH High-level input voltage VDD -0.9 - VDD V VIL Low-level input voltage 0 - 0.9 V TA Operating free-air temperature 0 - +70 °C Power-up sequence should be the following: 1. Connect ground 2. Apply VDD 3. Set all inputs (Data, CLK, Enable, etc.) to a known state 4. Apply VPP 5. The VPP should not drop below VDD or float during operation. Power-down sequence should be the reverse of the above. Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com 2 HV507 Electrical Characteristics DC Characteristics (For V DD Sym = 5.0V, VPP = 300V, TA = 25°C) Parameter Min Max Units Conditions IDD VDD supply current - 15 mA fCLK = 8.0MHz, FDATA = 4.0MHz, LE = low IDDQ Quiescent VDD supply current - 200 µA All VIN = 0 or VDD IPP High voltage supply current - 0.50 - 0.50 IIH High-level logic input current - 10 µA VIH = VDD IIL Low-level logic input current - -10 µA VIL = 0V 265 - VDD -1.0V - V VPP = 300V, IHVOUT = -1.0mA, IDOUT = -100µA HVOUT - 35 Data Out - 1.0 - VPP +1.5V - -30 VOH High level output VOL Low level output VOC HVOUT clamp voltage HVOUT Data Out AC Characteristics1 (For V DD Sym mA V V VPP = 300V. All outputs high. VPP = 300V. All outputs low. VDD = 5.0V, IHVOUT = +1.0mA, IDOUT = +100µA IOC = +1.0mA IOC = -1.0mA = 5.0V, VPP = 300V, TA = 25°C) Parameter Min Max Units Conditions - 8.0 MHz --- fCLK Clock frequency tW Clock width high or low 62 - ns --- tSU Data set-up time before clock rises 35 - ns --- tH Data hold time after clock rises 30 - ns --- tWLE LE pulse width 80 - ns --- tDLE Delay time clock to LE high to low 35 - ns --- tSLE LE set-up time before clock rises 40 - ns --- Time from LE to HVOUT - 4.0 µs CL = 20pF tDHL Delay time clock to data high to low - 125 ns CL = 20pF tDLH Delay time clock to data low to high - 125 ns CL = 20pF tr, tf All logic inputs - 5.0 ns --- tON, tOFF Note: 1. Shift register speed can be as low as DC as long as data set-up and hold time meet the spec. Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com 3 HV507 Input and Output Equivalent Circuits VDD VDD VPP Data Out Input GND GND HVOUT HVGND Logic Data Output Logic Inputs High Voltage Outputs Switching Waveforms Data In (DIOA/DIOB) 50% 50% Data Valid tSU VIH VIL tH VIH CLK 50% tWL tWH VOH 50% Data Out (DIOA/DIOB) VOL tDLH VOH 50% VOL tDHL HV OUT w/ S/R LOW VOH 50% 50% Latch Enable tWLE tDLE VIL tSLE 90% 10% VOL VOH VOL tOFF HV OUT w/ S/R HIGH Supertex inc. 10% 90% tON ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com 4 VOH VOL HV507 Function Table Inputs Function Outputs HV Outputs 1 2...64 1 2...64 * X * *...* H H...H * H X * *...* L L...L * H L X * *...* * *...* * L H H X H or L *...* * *...* * X ↓ H H X * *...* * *...* * X X ↓ H L X * *...* * *...* * L ↑ H H H X L *...* L *...* * H ↑ H H H X H *...* H *...* * DIOA ↑ X X X L Qn→ Qn+1 - DIOB DIOB ↑ X X X H Qn→ Qn+1 - DIOA CLK LE BL POL DIR All on X X X L L All off X X X L Invert mode X X L Load S/R H or L ↑ Store data in latches X Transparent latch mode I/O Relation Data Out Shift Reg Data Notes: H = high level, L = low level , X = irrelevant, ↑ = low-to-high transition ↓ = high-to-low transition. * = dependent on previous stage’s state before the last CLK high-to-low transition or last LE high. Pin Description (80-Lead PQFP) Pin # Function Pin # Function Pin # Function Pin # Function 1 HVOUT41 21 HVOUT61 41 HVOUT1 61 HVOUT21 2 HVOUT42 22 HVOUT62 42 HVOUT2 62 HVOUT22 3 HVOUT43 23 HVOUT63 43 HVOUT3 63 HVOUT23 4 HVOUT44 24 HVOUT64 44 HVOUT4 64 HVOUT24 5 HVOUT45 25 VPP 45 HVOUT5 65 HVOUT25 6 HVOUT46 26 DIOA 46 HVOUT6 66 HVOUT26 7 HVOUT47 27 N/C 47 HVOUT7 67 HVOUT27 8 HVOUT48 28 N/C 48 HVOUT8 68 HVOUT28 9 HVOUT49 29 BL 49 HVOUT9 69 HVOUT29 10 HVOUT50 30 POL 50 HVOUT10 70 HVOUT30 11 HVOUT51 31 VDD 51 HVOUT11 71 HVOUT31 12 HVOUT52 32 DIR 52 HVOUT12 72 HVOUT32 13 HVOUT53 33 GND 53 HVOUT13 73 HVOUT33 14 HVOUT54 34 HVGND 54 HVOUT14 74 HVOUT34 15 HVOUT55 35 N/C 55 HVOUT15 75 HVOUT35 16 HVOUT56 36 N/C 56 HVOUT16 76 HVOUT36 17 HVOUT57 37 CLK 57 HVOUT17 77 HVOUT37 18 HVOUT58 38 LE 58 HVOUT18 78 HVOUT38 19 HVOUT59 39 DIOB 59 HVOUT19 79 HVOUT39 20 HVOUT60 40 VPP 60 HVOUT20 80 HVOUT40 Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com 5 HV507 80-Lead PQFP Package Outline (PG) 20.00x14.00mm body, 3.40mm height (max), 0.80mm pitch, 3.90mm footprint D D1 E Note 1 (Index Area D1/4 x E1/4) E1 80 θ1 1 e b Top View View B A A2 L L1 Seating Plane A1 Gauge Plane L2 Side View Seating Plane θ View B Note: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol Dimension (mm) A A1 MIN 2.80* 0.25 NOM - - MAX 3.40 A2 b D D1 E E1 2.55 0.30 23.65* 19.80* 17.65* 13.80* 2.80 - 23.90 20.00 17.90 14.00 0.50* 3.05 0.45 24.15* 20.20* 18.15* 14.20* e 0.80 BSC L 0.73 0.88 1.03 L1 L2 1.95 REF 0.25 BSC θ θ1 0O 5O 3.5O - 7O 16O JEDEC Registration MO-112, Variation CB-1, Issue B, Sept.1995. * This dimension is not specified in the JEDEC drawing. Drawings not to scale. Supertex Doc. #: DSPD-80PQFPPG, Version C041309. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2010 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-HV507 A062110 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 6