INTEGRATED CIRCUITS DATA SHEET TDA8775 Triple 10-bit video Digital-to-Analog Converter (DAC) Preliminary specification File under Integrated Circuits, IC02 1996 Aug 14 Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) TDA8775 FEATURES APPLICATIONS • 10-bit resolution • General purpose high-speed digital-to-analog conversion • Sampling rate up to: • Digital TV – 50 MHz for normal mode; RL = 37.5 Ω • Graphic display – 35 MHz for LOW power mode; RL = 150 Ω • Desktop video processing. • Internal current reference • Current reference selector for: – normal mode, RL = 37.5 Ω (typ.) GENERAL DESCRIPTION – low-power mode, RL = 150 Ω (typ.) The TDA8775 consists of three 10-bit video Digital-to-Analog Converters (DACs). They convert the digital input signals into current outputs at a maximum conversion rate of 50 MHz. • No deglitching circuit required • SYNC and BLANK control inputs • 0.66 V output voltage range on red and blue channels The DACs are based on current source architecture with selectable current reference. • 1 V output voltage range on green channel (including sync) The devices are fabricated in a 5 V CMOS process that ensures high functionality with low power dissipation. • BLANK control input on the 3 channels • + 5 V power supply. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDDA analog supply voltage 4.5 5.0 5.5 V VDDD digital supply voltage 4.5 5.0 5.5 V IDDA analog supply current SLT = 1; RL = 37.5 Ω − 67 tbf mA SLT = 0; RL = 150 Ω − 16 tbf mA IDDD digital supply current SLT = 1; RL = 37.5 Ω − 15 tbf mA SLT = 0; RL = 150 Ω − 10 tbf mA INL DC integral non-linearity − ±1 ±2 LSB DNL DC differential non-linearity − ±0.7 ±1.0 LSB fclk(max) maximum clock frequency SLT = 1; RL = 37.5 Ω 50 − − MHz SLT = 0; RL = 150 Ω 35 − − MHz Ptot total power dissipation SLT = 1; RL = 37.5 Ω; fclk = 50 MHz − 410 tbf mW SLT = 0; RL = 150 Ω; fclk = 35 MHz − 130 tbf mW ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA8775G LQFP48 1996 Aug 14 DESCRIPTION plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm 2 VERSION SOT313-2 Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) TDA8775 BLOCK DIAGRAM handbook, full pagewidth red digital inputs (bits R0 to R3) VDDA1 VDDA2 VDDA3 VDDD1 VDDD2 38 41 45 11 37 10-7 4 TDA8775 red digital inputs (bits R4 to R9) green digital inputs (bits G0 to G3) 6-1 6 MSB DECODER LSB DECODER 25 CURRENT SOURCE 46 CLK OUTR 24-21 4 LSB DECODER green digital inputs (bits G4 to G9) blue digital inputs (bits B0 to B3) 20-15 6 MSB DECODER CURRENT SOURCE 44 47 35-32 43 BLANK control input SYNC control input 31-26 6 MSB DECODER 40 42 CURRENT SOURCE VSSA2 VSSA1 OUTB 14 13 CONTROL REGISTER CURRENT REFERENCE 48 SLT 39 reference current decoupling input (Iref) Fig.1 Block diagram. 1996 Aug 14 VSSA3 4 LSB DECODER blue digital inputs (bits B4 to B9) OUTG 3 12 VSSD1 36 VSSD2 MGE965 Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) TDA8775 PINNING SYMBOL PIN DESCRIPTION R9 1 red digital input data; bit 9 (MSB) R8 2 red digital input data; bit 8 R7 3 red digital input data; bit 7 R6 4 red digital input data; bit 6 R5 5 red digital input data; bit 5 R4 6 red digital input data; bit 4 R3 7 red digital input data; bit 3 R2 8 red digital input data; bit 2 R1 9 red digital input data; bit 1 R0 10 red digital input data; bit 0 (LSB) VDDD1 11 digital supply voltage 1 VSSD1 12 digital supply ground 1 SYNC 13 composite sync control input; for green channel only (active LOW) BLANK 14 composite blank control input (active LOW) G9 15 green digital input data; bit 9 (MSB) G8 16 green digital input data; bit 8 G7 17 green digital input data; bit 7 G6 18 green digital input data; bit 6 G5 19 green digital input data; bit 5 G4 20 green digital input data; bit 4 G3 21 green digital input data; bit 3 G2 22 green digital input data; bit 2 G1 23 green digital input data; bit 1 G0 24 green digital input data; bit 0 (LSB) CLK 25 clock input B9 26 blue digital input data; bit 9 (MSB) B8 27 blue digital input data; bit 8 B7 28 blue digital input data; bit 7 B6 29 blue digital input data; bit 6 B5 30 blue digital input data; bit 5 B4 31 blue digital input data; bit 4 B3 32 blue digital input data; bit 3 B2 33 blue digital input data; bit 2 B1 34 blue digital input data; bit 1 B0 35 blue digital input data; bit 0 (LSB) VSSD2 36 digital supply ground 2 VDDD2 37 digital supply voltage 2 VDDA1 38 analog supply voltage 1 Iref 39 decoupling pin for reference current VSSA1 40 analog supply ground 1 1996 Aug 14 4 Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) SYMBOL TDA8775 PIN DESCRIPTION VDDA2 41 analog supply voltage 2 OUTB 42 blue analog output VSSA2 43 analog supply ground 2 OUTG 44 green analog output R9 44 OUTG 48 SLT handbook, full pagewidth 36 VSSD2 1 R8 2 35 B0 R7 3 34 B1 R6 4 33 B2 R5 5 32 B3 R4 6 31 B4 TDA8775 R3 7 30 B5 R2 8 29 B6 R1 9 28 B7 R0 10 27 B8 5 G1 23 G0 24 G2 22 G3 21 G4 20 G5 19 G6 18 G7 17 G8 16 G9 15 25 CLK SYNC 13 26 B9 VSSD1 12 BLANK 14 VDDD1 11 Fig.2 Pin configuration. 1996 Aug 14 37 VDDD2 mode selection; normal mode, RL = 37.5 Ω (active HIGH); low power mode, RL = 150 Ω (active LOW) 38 VDDA1 48 39 Iref SLT 40 VSSA1 analog supply ground 3 41 VDDA2 47 42 OUTB VSSA3 43 VSSA2 red analog output 45 VDDA3 analog supply voltage 3 46 46 OUTR 45 OUTR 47 VSSA3 VDDA3 MGE964 Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) TDA8775 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. MAX. UNIT VDDA analog supply voltage −0.5 +6.5 V VDDD digital supply voltage −0.5 +6.5 V ∆VDD supply voltage difference between VDDA and VDDD −1.0 +1.0 V Tstg storage temperature −55 +150 °C Tamb operating ambient temperature 0 70 °C Tj junction temperature − 125 °C THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER VALUE (TYP.) UNIT thermal resistance from junction to ambient in free air 72 K/W HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. CHARACTERISTICS TDA8775 operating at 50 MHz; SLT = 1 and RL = 37.5 Ω. VDDA = VDDD = 4.5 to 5.5 V; VSSA and VSSD shorted together; VDDA − VDDD = −0.5 to +0.5 V; Tamb = 0 to +70 °C; typical values measured at VDDA = VDDD = 5 V and Tamb = 25 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies VDDA analog supply voltage 4.5 5.0 5.5 V VDDD digital supply voltage 4.5 5.0 5.5 V IDDA analog supply current SLT = 1; RL = 37.5 Ω − 67 tbf mA SLT = 0; RL = 150 Ω − 16 tbf mA SLT = 1; RL = 37.5 Ω − 15 tbf mA SLT = 0; RL = 150 Ω − 10 tbf mA V IDDD digital supply current Inputs CLOCK INPUT (PIN 25) VIL LOW level input voltage VSSD − 0.5 − 0.8 VIH HIGH level input voltage 2.0 − VDDD + 0.5 V BLANK AND SYNC INPUTS (PINS 13 AND 14; ACTIVE LOW) VIL LOW level input voltage VSSD − 0.5 − 0.8 VIH HIGH level input voltage 2.0 − VDDD + 0.5 V V R, G AND B DIGITAL INPUTS (PINS 1 TO 10, 15 TO 24 AND 26 TO 35) VIL LOW level input voltage VSSD − 0.5 − 0.8 VIH HIGH level input voltage 2.0 − VDDD + 0.5 V 1996 Aug 14 6 V Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) SYMBOL PARAMETER TDA8775 CONDITIONS MIN. TYP. MAX. UNIT Timing (CL = 25 pF); see Fig.4 SLT = 1; RL = 37.5 Ω − maximum clock frequency 35 − − MHz tCPH clock pulse width HIGH 6 − − ns tCPL clock pulse width LOW 6 − − ns tr clock rise time − − 4 ns tf clock fall time − − 4 ns tSU;DAT input data set-up time 4 − − ns tHD;DAT input data hold time 2.5 − − ns SLT = 0; RL = 150 Ω 50 − fclk(max) MHz Outputs OUTB, OUTR AND OUTG ANALOG OUTPUTS (PINS 42, 46 AND 44, REFERENCED TO VSSA) FOR 37.5 Ω LOAD VOUTmax THD ZL maximum output voltage total harmonic distortion output load impedance BLANK and SYNC active R and B channels − 0.714 − V G channel − 1.0 − V fi = 4.43 MHz; SLT = 1; fclk = 50 MHz; RL = 37.5 Ω − −52 − dB fi = 4.43 MHz; SLT = 0; fclk = 35 MHz; RL = 150 Ω − −50 − dB SLT = 1 tbf 37.5 tbf Ω SLT = 0 tbf 150 tbf Ω Transfer function INL DC integral non-linearity − ±1 ±2 LSB DNL DC differential non-linearity − ±0.7 ±1.0 LSB αct crosstalk DAC to DAC tbf − − dB DAC to DAC matching − 1.0 tbf % full-scale change; SLT = 1; RL = 37.5 Ω − tbf − ns full-scale change; SLT = 0; RL = 150 Ω − tbf − ns 10 to 90% full-scale change; SLT = 1; RL = 37.5 Ω − 4 − ns 10 to 90% full-scale change; SLT = 0; RL = 150 Ω − 10 − ns to ±1 LSB; SLT = 1; RL = 37.5 Ω − tbf − ns to ±1 LSB; SLT = 0; RL = 150 Ω − tbf − ns − tbf − LSB.ns Switching characteristics; see Fig.5 td ts1 ts2 input to 50% output delay time settling time settling time Output transients (glitches) Vg area for 1 LSB change 1996 Aug 14 7 Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) Table 1 TDA8775 Input coding and DAC output currents (typical values) BINARY INPUT DAC OUTPUT CURRENT (mA) DAC OUTPUT CURRENT (mA) SLT = 1; RL = 37.5 Ω SLT = 0; RL = 150 Ω SYNC BLANK DATA CODE R, B Channels G Channel R, B Channels G Channel 0 0 XXH − 0 0 0 0 1 0 XXH − 0 7.62 0 1.90 0 1 00H 0 1.44 1.44 0.36 0.36 − − − − − − 3FFH 1023 19.05 19.05 4.76 4.76 00H 0 1.44 9.05 0.36 2.26 − − − − − − 3FFH 1023 19.05 26.67 4.76 6.67 1 1 SYNC PERIOD handbook, full pagewidth VIDEO PICTURE DATA REFERENCE WHITE 660 mV 1 V SET-UP LEVEL GREY SCALE 100 IRE UNITS REFERENCE BLACK BLANKING LEVEL 330 mV 40 IRE UNITS SYNC LEVEL (1) BLANK SYNC (1) MGD630 (1) Sync only on green channel. Fig.3 Video signal diagram. 1996 Aug 14 8 Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) TDA8775 TIMING t SU; DAT andbook, full pagewidth t HD; DAT V IH data input 50 % stable V IL 50 % V IL clock input MBB656 - 1 t CPL t CPH Fig.4 Input timing. handbook, full pagewidth clock input input code (example of a full-scale input data transition) 50 % code 1023 code 0 1 LSB 714 mV (code 1023) 10 % td 50 % Vo(1) 90 % 54 mV (code 0) 1 LSB t s1 t s2 (1) Output level conditions, SYNC = 0; BLANK = 1. Fig.5 Switching timing. 1996 Aug 14 9 MBB662 - 3 Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) TDA8775 INTERNAL PIN CIRCUITRY handbook, full pagewidth VDDA VDDA VDDD bitn GND VSSD bitn VSSA VSSA MGE967 (a) (b) (c) (a) Digital inputs; pins 1 to 10, 13 to 25 and 26 to 35. (b) Iref; pin 39. (c) OUTR, OUTG and OUTB; pins 46, 44 and 42. Fig.6 Internal circuitry. 1996 Aug 14 10 Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) TDA8775 APPLICATION INFORMATION +5 V handbook, full pagewidth R = 37.5 Ω or 150 Ω +5 V 100 nF +5 V +5 V 22 nF (1) R R 22 nF 100 nF R (2) 48 red input 47 46 45 44 43 42 41 40 39 38 37 1 36 2 35 3 34 4 33 5 32 6 31 TDA8775 +5 V 100 nF 7 30 8 29 9 28 10 27 11 26 12 25 13 14 15 16 17 18 19 20 21 22 23 Analog and digital supplies should be separated and decoupled. Supplies are not connected internally. All ground pins must be connected. One ground plane is preferred although it depends on the application. (1) R = 37.5 Ω; SLT = 1. (2) R = 150 Ω; SLT = 0. 1996 Aug 14 11 CLK 24 green input Fig.7 Application diagram. blue input MGE966 Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) handbook, full pagewidth 3.3 µH video outputs from TDA8775 75 Ω R1 2.7 µH TDA8775 R2 75 Ω 180 pF video output R3 27 pF 330 pF 75 Ω 330 pF MGE968 Fig.8 Example of reconstruction filter for 1 V output swing. MGE969 handbook, full pagewidth att (dB) 0 (2) (1) −10 −20 −30 −40 0 5 10 15 (1) R2 = 75 Ω. (2) R2 = 0 Ω. Fig.9 Frequency response for filter shown in Fig.8. 1996 Aug 14 12 20 f (MHz) 25 Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) TDA8775 PACKAGE OUTLINE LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm SOT313-2 c y X 36 25 A 37 24 ZE Q e E HE A A2 (A 3) A1 w M pin 1 index θ bp Lp L 13 48 detail X 12 1 ZD e v M A w M bp D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp Q v w y mm 1.60 0.20 0.05 1.45 1.35 0.25 0.27 0.17 0.18 0.12 7.1 6.9 7.1 6.9 0.5 9.15 8.85 9.15 8.85 1.0 0.75 0.45 0.69 0.59 0.2 0.12 0.1 Z D (1) Z E (1) θ 0.95 0.55 7 0o 0.95 0.55 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 93-06-15 94-12-19 SOT313-2 1996 Aug 14 EUROPEAN PROJECTION 13 o Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) TDA8775 If wave soldering cannot be avoided, the following conditions must be observed: SOLDERING Introduction • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • The footprint must be at an angle of 45° to the board direction and must incorporate solder thieves downstream and at the side corners. Even with these conditions, do not consider wave soldering LQFP packages LQFP48 (SOT313-2), LQFP64 (SOT314-2) or LQFP80 (SOT315-1). This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Reflow soldering Reflow soldering techniques are suitable for all LQFP packages. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. Wave soldering Wave soldering is not recommended for LQFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. 1996 Aug 14 14 Philips Semiconductors Preliminary specification Triple 10-bit video Digital-to-Analog Converter (DAC) TDA8775 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 537021/50/01/pp16 Date of release: 1996 Aug 14 Document order number: 9397 750 01021