INTEGRATED CIRCUITS DATA SHEET TDA8776A 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) Product specification Supersedes data of 1995 May 11 File under Integrated Circuits, IC02 1996 Jun 04 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A FEATURES APPLICATIONS • 10-bit resolution High-speed digital-to-analog conversion for: • Conversion rate up to 1000 MHz • High resolution video and graphics • 10K/100K ECL input levels • Direct digital synthesis (DDS) • Internal reference voltage generator • Telecommunication • No deglitching circuit required • High-speed modems. • Internal input register • Power dissipation only 925 mW (typical) GENERAL DESCRIPTION • Internal 50 Ω output load (connected to the analog ground) The TDA8776A is a 10-bit Digital-to-Analog Converter (DAC) for high resolution video and other high frequency applications. It converts the digital input signal into an analog output voltage at a maximum conversion rate of 1000 Msps. No external reference voltage is required and all digital inputs are 10K/100K-ECL compatible. • Very few external components required. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT −5.46 −5.20 −4.94 V VEEA analog supply voltage VEED digital supply voltage −5.46 −5.20 −4.94 V VEEI input stages digital supply voltage note 1 −5.46 −5.20 −4.94 V IEEA analog supply current note 1 − 108 145 mA IEED digital supply current note 1 − 60 85 mA IEEI input stages digital supply current note 1 − 10 15 mA VOUT − VOUT full-scale analog output voltage (peak-to-peak value) notes 1 and 2; ZL = 50 Ω 1.7 2.0 2.5 V INL DC integral non-linearity note 3 − ±0.3 ±0.5 LSB DNL DC differential non-linearity note 3 − ±0.2 ±0.45 LSB fclk(max) maximum clock frequency 1000 − − MHz tS1 settling time (differential) 10% to 90% full scale; Fig.9 − 0.5 − ns Ptot total power dissipation − 925 − mW Notes 1. D0 to D9 connected to either HIGH or LOW level, CLK is HIGH and CLK is LOW. 2. The analog output voltages (VOUT and VOUT) are negative with respect to AGND (see Table 1). The external output resistance between AGND and each of these outputs is typically 50 Ω. 3. A warm-up time is necessary to reach optimal performances. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA8776AK 1996 Jun 04 PLCC28 DESCRIPTION plastic leaded chip carrier; 28 leads 2 VERSION SOT261-2 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A BLOCK DIAGRAM D9 D8 22 21 D7 D6 20 D5 19 18 D4 D3 17 16 D2 15 D1 D0 14 IGND 13 12 25 ECL BUFFERS COLUMN DECODER DELAY 28 10 ROW DECODER 11 24 R-2R DIVIDER TDA8776A 2 5 3 4 9 8 6 7 27 26 MBE581 DGND1 AGND1 VEED1 VEED2 VOUT2 VOUT1 VOUT1 Fig.1 Block diagram. 1996 Jun 04 3 VOUT2 CLK CLK VEEI DGND2 AGND2 V EED3 V EEA Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A PINNING SYMBOL PIN SYMBOL PIN DESCRIPTION DESCRIPTION n.c. 1 not connected D2 15 data input; bit 2 DGND1 2 digital ground 1 D3 16 data input; bit 3 VEED1 3 digital supply voltage 1 (−5.2 V) D4 17 data input; bit 4 VEED2 4 digital supply voltage 2 (−5.2 V) D5 18 data input; bit 5 AGND1 5 analog ground 1 D6 19 data input; bit 6 VOUT1 6 analog voltage output 1 D7 20 data input; bit 7 VOUT2 7 analog voltage output 2 D8 21 data input; bit 8 22 data input; bit 9 (MSB) input supply voltage for ECL input buffers (−5.2 V) VEED3 11 digital supply voltage 3 (−5.2 V) CLK 26 complementary clock input IGND 12 input ground for ECL input buffers CLK 27 clock input D0 13 data input; bit 0 (LSB) DGND2 28 digital ground 2 D1 14 data input; bit 1 26 CLK analog ground 2 27 CLK 10 VEEI 25 AGND2 n.c. analog supply voltage (−5.2 V) 1 24 28 DGND2 VEEA DGND1 not connected complementary analog voltage output 2 2 23 9 V EED1 n.c. VOUT2 3 complementary analog voltage output 1 V EED2 8 4 VOUT1 D9 AGND1 5 25 V EEI V OUT1 6 24 V EEA V OUT2 7 V OUT1 8 V OUT2 9 23 n.c. TDA8776A 22 D9 21 D8 D5 18 D4 17 D3 16 D2 15 IGND D1 14 19 D6 D0 13 20 D7 V EED3 11 12 AGND2 10 Fig.2 Pin configuration. 1996 Jun 04 4 MBE582 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VEEA analog supply voltage −7.0 ±0.3 V VEED digital supply voltage −7.0 ±0.3 V VEEI input stages digital supply voltage −7.0 ±0.3 V VEEA − VEED supply voltage differential −0.5 +0.5 V AGND − DGND ground voltage differential −0.1 +0.1 V VI input voltage VEEI ±0.3 V −5 +50 mA ZL = 50 Ω IOUT/IOUT total output current Tstg storage temperature −55 +150 °C Tamb operating ambient temperature 0 70 °C Tj junction temperature − 150 °C HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth j-a 1996 Jun 04 PARAMETER thermal resistance from junction to ambient in free air 5 VALUE UNIT 55 (typ.) K/W Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A CHARACTERISTICS VEEA = V24 to V5 and V10 = −5.46 to −4.94 V; VEED = V3, V4 and V11 to V2 and V28 = −5.46 to −4.94 V; VEEI = V25 to V12 = −5.46 to −4.94 V; VEED and VEEI shorted together; Tamb = 0 to +70 °C; AGND, DGND and IGND shorted together; VOUT − VOUT = 2 V (p-p); ZL = 50 Ω; unless otherwise specified (typical values measured at VEEA = VEED = −5.2 V and Tamb = 25 °C). SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT −5.46 −5.20 −4.94 V Supply VEEA analog supply voltage VEED digital supply voltage −5.46 −5.20 −4.94 V VEEI input stages digital supply voltage note 1 −5.46 −5.20 −4.94 V IEEA analog supply current note 1 − 108 145 mA IEED digital supply current note 1 − 60 85 mA IEEI input stages digital supply current note 1 − 10 15 mA AGND − DGND ground voltage differential −0.1 − +0.1 V −1.9 −1.8 −1.6 V Inputs DIGITAL INPUTS (D9 TO D0) AND CLOCK INPUTS (CLK AND CLK) VIL LOW level input voltage VIH HIGH level input voltage −1.2 −0.9 −0.8 V IIL LOW level input current VI = −1.8 V − − 10 µA IIH HIGH level input current VI = −0.9 V − − 20 µA fclk(max) maximum clock frequency 1000 − − MHz 1.7 2.0 2.5 V − 50 − Ω Outputs (referenced to AGND); notes 1 and 2 VOUT − VOUT(p-p) full-scale analog output voltage (peak-to-peak value) ZO ZL = 50 Ω output impedance Transfer function INL DC integral non-linearity note 3 − ±0.3 ±0.5 LSB DNL DC differential non-linearity note 3 − ±0.2 ±0.45 LSB Spurious free dynamic range (fclk = 1000 MHz); VEEA = VEED = 5.2 V; Tamb = 25 °C; note 4; see Fig.3 SFDR 1996 Jun 04 spurious free dynamic range fOUT = 10 MHz −65 −69 − dB fOUT = 50 MHz − −60 − dB fOUT = 100 MHz −52 −57 − dB fOUT = 200 MHz − −46 − dB 6 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) SYMBOL TDA8776A PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Switching characteristics (fclk = 1000 MHz); notes 5 and 6; see Figs 8 and 9 − tSU;DAT data set-up time 400 500 ps tHD;DAT data hold time 100 150 − ps tPD propagation delay time − 0.8 0.9 ns tS1 settling time 10% to 90% full scale − 0.5 − ns tS2 settling time change to ±1 LSB td input to 50% output delay time − 2.0 − ns − 1.4 1.5 ns − 1 2 pV.s Output transients; glitches (fclk = 1000 MHz); note 7; see Fig.10 differential glitch energy from code Eg transition 511 to 512 Notes 1. D0 to D9 connected to either HIGH or LOW level, CLK is HIGH and CLK is LOW. 2. The analog output voltages (VOUT and VOUT) are negative with respect to AGND (see Table 1). The external output resistance between AGND and each of these outputs is typically 50 Ω. 3. Due to on-chip regulator behaviour a warm-up time is necessary to reach optimal performances; a typical time is 1 minute. 4. Devices with higher SFDR (min.) can be delivered on special request. 5. The worst case characteristics are obtained at the transition from input code 0 to 1023 and if an external load impedance greater than 50 Ω is connected between VOUT or VOUT and AGND in parallel with the external 50 Ω load. The specified values have been measured directly on a 50 Ω load between VOUT and AGND. No further load impedance between VOUT and AGND has been applied. All input data is latched at the falling edge of the clock. 6. The data set-up (tSU;DAT) is the minimum period preceding the falling edge of the clock that the input data must be stable in order to be correctly registered. A negative set-up time indicates that the data may be initiated after the falling edge of the clock and still be recognized. The data hold time (tHD;DAT) is the minimum period following the falling edge of the clock that the input data must be stable in order to be correctly registered. A negative hold time indicates that the data may be released prior to the falling edge of the clock and still be recognized. 7. The definition of glitch energy and the measurement set-up are shown in Fig.10. The glitch energy is measured at the input transition between code 511 to 512. Table 1 Input coding and DAC output voltages (typical values; referenced to AGND regardless of the offset voltage) DAC OUTPUT VOLTAGES (V) ZL = 50 Ω BINARY INPUT DATA CODE D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 VOUT VOUT 0 0 0 0 0 0 0 0 0 0 0 0 −1.0 1 0 0 0 0 0 0 0 0 0 1 −0.0010 −0.9990 . . . . . . . . . . . . . 512 1 0 0 0 0 0 0 0 0 0 −0.5 −0.5 . . . . . . . . . . . . . 1022 1 1 1 1 1 1 1 1 1 0 −0.9990 −0.0010 1023 1 1 1 1 1 1 1 1 1 1 −1.0 0 1996 Jun 04 7 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A MGD478 80 handbook, full pagewidth SFDR (dB) 70 60 50 40 1 102 10 103 f (MHz) Fig.3 Typical spurious free dynamic range (SFDR) as a function of output frequency. MGD475 20 DAC full pagewidth handbook, OUTPUT SPECTRUM (dB) 0 −20 −40 −60 −80 −100 0 100 200 300 Fig.4 Typical output spectrum; fclk = 1000 MHz; fOUT = 10 MHz. 1996 Jun 04 8 400 f (MHz) 500 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A MGD474 20 handbook, DAC full pagewidth OUTPUT SPECTRUM (dB) 0 −20 −40 −60 −80 −100 0 100 200 300 400 f (MHz) 500 Fig.5 Typical output spectrum; fclk = 1000 MHz; fOUT = 50 MHz. MGD477 20 DAC full pagewidth handbook, OUTPUT SPECTRUM (dB) 0 −20 −40 −60 −80 −100 0 100 200 300 400 Fig.6 Typical output spectrum; fclk = 1000 MHz; fOUT = 100 MHz. 1996 Jun 04 9 f (MHz) 500 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A MGD476 20 DAC full pagewidth handbook, OUTPUT SPECTRUM (dB) 0 −20 −40 −60 −80 −100 0 100 200 300 400 f (MHz) 500 Fig.7 Typical output spectrum; fclk = 1000 MHz; fOUT = 200 MHz. t SU; DAT handbook, full pagewidth t HD; DAT 0.9 V input data stable 1.35 V 1.8 V 0.9 V CLK 1.35 V 1.8 V MLD202 The shaded areas indicate when the input data may change and be correctly registered. Data input update must be completed within tbf ns after the falling edge of the clock (tSU;DAT is negative; tbf ns). Data must be held at least tbf ns after the falling edge (tHD;DAT = tbf ns). Fig.8 Data set-up and hold times. 1996 Jun 04 10 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A handbook, full pagewidth 1.35 V CLK code 1023 input data (example of a full-scale input transition) code 0 1.35 V 1 LSB 0V (code 0) 10 % td 50 % VOUT 90 % 1.0 V (code 1023) 1 LSB t S1 t PD t S2 Fig.9 Switching characteristics. 1996 Jun 04 11 MLD203 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A HP80000 f clk /10 DATA (2) TEK 11801A D9 MSB D8 D7 GENERATOR f clk /10 D6 (1) D5 VOUT 20 GHz SAMPLING SCOPE VOUT TDA8776A D4 D3 clock D2 , ,, , ,, ,, D1 (3) D0 (LSB) f clk f clk (3) PULSE GENERATOR (MASTER) (1) MODEL HP8133A 1 LSB (2) code 512 timing diagram code 511 VOUT VOUT MBE583 time The value of the glitch energy is the sum of the shaded areas measured in pV.s. Fig.10 Glitch energy measurement. 1996 Jun 04 12 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A INTERNAL PIN CONFIGURATIONS handbook, 4IGND columns internal reference D0 to D9 V EEI MLD205 Fig.11 D9 to D0. handbook, halfpage AGND 50 Ω 50 Ω DGND olumns VOUT VOUT CLK CLK V EEA bit n bit n VEED MLD206 switches and current generators Fig.12 Analog outputs. 1996 Jun 04 MLD207 Fig.13 CLK and CLK. 13 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A APPLICATION INFORMATION 50 Ω digital input matched lines handbook, full pagewidth VTT 1µF 10 nF 10 nF 50 Ω 50 Ω 10 nF 18 50 Ω D6 10 nF 50 Ω 50 Ω 50 Ω D4 D5 10 nF 10 nF 17 D3 10 nF 50 Ω D2 16 15 D1 D0 14 IGND 13 12 19 11 20 10 21 9 C VEED3 (1) 10 nF 50 Ω D7 50 Ω digital input matched lines AGND2 10 nF 50 Ω D8 VOUT2 10 nF 50 Ω OUT D9 n.c. TDA8776A 22 V OUT1 8 23 50 Ω analog output matched lines VOUT2 7 OUT V EEA2 C (1) VEEI 24 6 25 5 VOUT1 AGND1 26 22 µF 27 CLK CLK 28 1 DGND2 2 n.c. 3 DGND1 4 VEED1 VEED2 (1) C 1 µF 50 Ω 50 Ω 10 nF 10 nF LM337T OUT IN 12 µH 50 Ω clock input matched lines 1 µF 22 µF VEE (−5.2 V) ADJ VTT (−2 V) 120 Ω 1 µF 22 µF 75 Ω MGD480 (1) C = 1 µF in parallel with 10 nF in parallel with 1 nF; all three mounted close to the supply pin of the DAC with 1 nF the nearest. Fig.14 Application diagram. 1996 Jun 04 14 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A PACKAGE OUTLINE PLCC28: plastic leaded chip carrier; 28 leads SOT261-2 eE eE y X A 19 25 18 26 bp b1 ZE w M 28 1 E HE pin 1 index e A A4 A1 12 4 β k1 (A 3) k 5 11 Lp v M A ZD e detail X D B HD v M B 0 5 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A A1 min. A3 A4 max. bp b1 mm 4.57 4.19 0.51 0.25 3.05 0.53 0.33 0.81 0.66 0.180 inches 0.020 0.01 0.165 D (1) E (1) e eD eE HD HE k 11.58 11.58 10.92 10.92 12.57 12.57 1.22 1.27 11.43 11.43 9.91 9.91 12.32 12.32 1.07 k1 max. Lp v w y 0.51 1.44 1.02 0.18 0.18 0.10 Z D(1) Z E (1) max. max. 2.16 β 2.16 45 o 0.430 0.430 0.495 0.495 0.048 0.057 0.021 0.032 0.456 0.456 0.020 0.05 0.007 0.007 0.004 0.085 0.085 0.12 0.390 0.390 0.485 0.485 0.042 0.040 0.013 0.026 0.450 0.450 Note 1. Plastic or metal protrusions of 0.01 inches maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 92-11-17 95-02-25 SOT261-2 1996 Jun 04 EUROPEAN PROJECTION 15 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. SOLDERING PLCC Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these cases reflow soldering is often used. Wave soldering Wave soldering techniques can be used for all PLCC packages if the following conditions are observed: • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook2 ” (order code 9398 65290011). • The longitudinal axis of the package footprint must be parallel to the solder flow. Reflow soldering During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. • The package footprint must incorporate solder thieves at the downstream corners. Reflow soldering techniques are suitable for all PLCC packages. The choice of heating method may be influenced by larger plastic packages (44 leads, or more). If infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. For more information, refer to the Drypack chapter in our “Quality Reference Manual” (order code 9398 510 63011). Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds at 270 to 320 °C Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. 1996 Jun 04 16 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1996 Jun 04 17 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A NOTES 1996 Jun 04 18 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog Converter (DAC) TDA8776A NOTES 1996 Jun 04 19 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 805 4455, Fax. +61 2 805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 537021/1200/02/pp20 Date of release: 1996 Jun 04 Document order number: 9397 750 00888