INTEGRATED CIRCUITS DATA SHEET TDA8044 Satellite demodulator and decoder Product specification Supersedes data of 1998 Nov 17 File under Integrated Circuits, IC02 2000 Feb 21 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 FEATURES • General features: – One-chip Digital Video Broadcasting (DVB) compliant Quadrature Phase Shift Keying (QPSK) and Binary Phase Shift Keying (BPSK) demodulator and concatenated Viterbi/Reed-Solomon decoder with de-interleaver and de-randomizer (ETS 300 421) – Truncation length: 144 – Automatic synchronization – 3.3 V supply voltage (input pads are 5 V tolerant) – Channel Bit Error Rate (BER) estimation – Standby mode for low power dissipation – External indication of Viterbi sync lock – Internal clock PLL to allow low frequency crystal application and selectable clock frequencies – Differential decoding optional. • Reed-Solomon (RS) decoder: – Power-on reset module – (204, 188, T = 8) Reed-Solomon code – Package: QFP100 – Automatic (I2C-bus configurable) synchronization of bytes, transport packets and frames – Boundary scan test. • QPSK/BPSK demodulator: – Internal convolutional de-interleaving (I = 12; using internal memory) – Interpolator and anti-alias filter to handle a large range of symbol rates without additional external filtering – De-randomizer based on Pseudo Random Bit Sequence (PRBS) – On-chip AGC of the analog input I and Q baseband signals or tuner AGC control – External indication of Register Select (RS) decoder sync lock – Two on-chip matched Analog-to-Digital Converters (ADCs; 7 bits) – External indication of uncorrectable error (transport error indicator is set) – Half Nyquist (square root raised-cosine) filter with selectable roll-off factor – External indication of corrected byte – Large range of symbol frequencies: 0.5 to 45 Msymbols/s for TDA8044 and 0.5 to 30 Msymbols/s for TDA8044A, including Single Carrier Per Channel (SCPC) function – Indication of the number of corrected blocks. – Indication of the number of lost blocks • Interface: – I2C-bus interface to initialize and monitor the demodulator and Forward Error Correction (FEC) decoder; when no I2C-bus usage, default mode is defined – Can be used at low channel Signal-to-Noise ratio (S/N) – Internal carrier recovery, clock recovery and AGC loops with programmable loop filters – Programmable interrupt facility – 6 bits I/O expander for flexible access to and from the I2C-bus – Two loop carrier recovery enabling phase tracking of the incoming symbols – Switchable I2C-bus loop-through to suppress I2C-bus crosstalk in the tuner – Software carrier sweep for low symbol rate applications – DiSEqC level 1.X support for dish control applications – Signal-to-noise ratio estimation – 3-state mode for transport stream outputs. – External indication of demodulator lock. • Viterbi decoder: APPLICATIONS – Rate 1⁄2 convolutional code based • Digital satellite TV: demodulation and Forward Error Correction (FEC). – Constraint length K = 7 with G1 = 171oct and G2 = 133oct; supported puncturing code rates: 1⁄ , 2⁄ , 3⁄ , 4⁄ , 5⁄ , 6⁄ , 7⁄ and 8⁄ 2 3 4 5 6 7 8 9 – 4 bits input for ‘soft decision’ for both I and Q 2000 Feb 21 2 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 The TDA8044 also has internal anti-alias filters, which can cover a large range of symbol frequencies (approximately one decade) without the need to switch external (SAW) filters. To cover the whole range of 0.5 to 45 Msymbols/s switching of clock frequency (internally) and filtering (externally) is necessary. GENERAL DESCRIPTION This document gives preliminary information about the TDA8044 and TDA8044A, which are the successors of the TDA8043. The TDA8044A is only specified where the product deviates from the TDA8044, all other references are the same. The TDA8044 is backwards compatible with the TDA8043, with respect to pinning and the I2C-bus software. The TDA8044 is a DVB compliant demodulator and error correction decoder IC for reception of QPSK and BPSK modulated signals for satellite applications. It can handle variable symbol rates in the range of 0.5 to 45 Msymbols/s (0.5 to 30 Msymbols/s for TDA8044A) with a minimum number of low cost and non-critical external components. Typical applications for this device are Multi Channel Per Carrier (MCPC), Single Channel Per Carrier (SCPC) and simulcast. In these applications one satellite transponder contains respectively one broad QPSK carrier, several small QPSK carriers and one small QPSK carrier together with one or two FM carriers. The TDA8044 has a double carrier loop configuration which has excellent capabilities of tracking phase noise. Synchronization of the FEC unit is done completely internally, thereby minimizing I2C-bus communication. The output of the TDA8044 is highly flexible, allowing different output modes to interface to a demultiplexer/descrambler/MPEG-2 decoder including a 3-state mode. For evaluation of the TDA8044, demodulator and Viterbi outputs can be made available externally. Interfacing to the TDA8044 has been extended compared to the TDA8043. Separate resets are available for logic only, logic plus I2C-bus and carrier loops. A Power-on reset module has been implemented which gives a reset signal at power-up. This signal can be used to reset the TDA8044 in order to guarantee correct starting of the IC. Two extra general purpose I/O pins (I/O expanders) have been added. A switchable I2C-bus loop-through to the tuner is implemented to switch-off the I2C-bus connection to the tuner. This reduces phase noise in the tuner in the event of I2C-bus crosstalk. The transport stream outputs can be put in 3-state mode. DiSEqC level 1.X support is integrated for dish control applications. The power consumption in standby mode has been decreased considerably. The TDA8044 has minimum interface with the tuner, it only requires the demodulated analog I and Q baseband input signals. Analog-to-digital conversion is performed internally by two matched 7-bit ADCs. Since all the loops (AGC, clock and carrier recovery) are internal, no feedback to the tuner is needed. However, for maximum tuner flexibility, there is the possibility to close the AGC and carrier recovery loop externally via the tuner. The number of external components required for operation of the TDA8044 is very low. Moreover the external components are low cost and non-critical. This gives an easy and low cost application. The TDA8044 operates on a low frequency crystal which is upconverted to a clock frequency by means of an internal PLL. Different clock frequencies can be selected with the PLL without changing the crystal. This allows for maximum flexibility concerning symbol rate range combined with minimum power consumption. 2000 Feb 21 3 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDDA analog supply voltage 3.05 3.3 3.55 V VDDD digital supply voltage 3.05 3.3 3.55 V IDD(tot) total supply current fclk TDA8044 note 1 − 320 480 mA TDA8044A notes 1 and 2 − − 350 mA internal clock frequency rs CFS = 0 or CFS = 1; fxtal = 4 MHz TDA8044 note 1 10.7 − 96 MHz TDA8044A notes 1 and 2 10.7 − 64 MHz TDA8044 0.5 − 45 Msymbols/s TDA8044A 0.5 − 30 Msymbols/s symbol rate Ptot VDDD = 3.3 V note 3 total power dissipation Tamb = 70 °C; note 4 TDA8044 − 1150 1700 mW TDA8044A − − 1250 mW IL implementation loss note 5 − 0.3 − dB S/N signal-to-noise ratio for locking the TDA8044 note 5 2 − − dB Notes 1. Programmable internal frequencies possible: a) Values 10.7, 16, 32 or 64 MHz for CFS = 0. b) Values 16, 24, 48 or 96 MHz for CFS = 1. 2. CFS is set to logic 0. 3. Without switching internal clock frequencies, a range of 1 decade can be covered. To cover the full range of symbol frequencies, internal clock frequencies and external (SAW) filters must be switched. Details can be found in the application note. 4. Maximum value is specified for a symbol rate of 45 Msymbols/s, a puncturing rate of 7⁄8, a clock frequency of 96 MHz and a 3.55 V power supply. The typical value is specified for a symbol rate of 27.5 Msymbols/s, a puncture rate of 3⁄4 and a clock frequency of 64 MHz. 5. Implementation loss at the demodulator output and minimum S/N to lock the TDA8044 are measured including tuner in a laboratory environment at a symbol rate of 27.5 Msymbols/s and a clock frequency of 64 MHz. ORDERING INFORMATION TYPE NUMBER TDA8044H TDA8044AH 2000 Feb 21 PACKAGE NAME QFP100 DESCRIPTION plastic quad flat package; 100 leads (lead length 1.95 mm); body 14 × 20 × 2.8 mm 4 VERSION SOT317-2 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 PINNING SYMBOL PIN I/O DESCRIPTION I2 1 I digital I-input bit 2 (ADC bypass) I3 2 I digital I-input bit 3 (ADC bypass) VSSD1 3 − digital ground 1 CFS 4 I clock frequency selection (remains at logic 0 for TDA8044A) VSSD2 5 − digital ground 2 I4 6 I digital I-input bit 4 (ADC bypass) I5 7 I digital I-input bit 5 (ADC bypass) I6 8 I digital I-input bit 6 (ADC bypass: MSB) Q0 9 I digital Q-input bit 0 (ADC bypass: LSB) VDDD1 10 − digital supply voltage 1 Q1 11 I digital Q-input bit 1 (ADC bypass) Q2 12 I digital Q-input bit 2 (ADC bypass) Q3 13 I digital Q-input bit 3 (ADC bypass) Q4 14 I digital Q-input bit 4 (ADC bypass) VSSD3 15 − digital ground 3 Q5 16 I digital Q-input bit 5 (ADC bypass) Q6 17 I digital Q-input bit 6 (ADC bypass: MSB) VSSD4 18 − digital ground 4 VDDD2 19 − digital supply voltage 2 PRESET 20 I set device into default mode P3 21 I/O quasi-bidirectional I/O port (bit 3) P2 22 I/O quasi-bidirectional I/O port (bit 2) P1 23 I/O quasi-bidirectional I/O port (bit 1) P0 24 I/O quasi-bidirectional I/O port (bit 0) VDDD3 25 − P5 26 I/O quasi-bidirectional I/O port (bit 5) P4 27 I/O quasi-bidirectional I/O port (bit 4) PDOCLK 28 O output clock for transport stream bytes PDO0 29 O parallel data output (bit 0) PDO1 30 O parallel data output (bit 1) PDO2 31 O parallel data output (bit 2) VSSD5 32 − digital ground 5 PDO3 33 O parallel data output (bit 3) PDO4 34 O parallel data output (bit 4) PDO5 35 O parallel data output (bit 5) VSSD6 36 − digital ground 6 VSSD7 37 − digital ground 7 PDO6 38 O parallel data output (bit 6) digital supply voltage 3 POR 39 I Power-on reset [can be connected to PRESET (pin 20)] VDDD4 40 − digital supply voltage 4 2000 Feb 21 5 Philips Semiconductors Product specification Satellite demodulator and decoder SYMBOL TDA8044 PIN I/O DESCRIPTION VDDD5 41 − digital supply voltage 5 VSSD8 42 − digital ground 8 VDDD6 43 − digital supply voltage 6 VDDD7 44 − digital supply voltage 7 PDO7 45 O parallel data output (bit 7) n.c. 46 − not connected VSSD9 47 − digital ground 9 PDOERR 48 0 transport error indicator PDOVAL 49 O data valid indicator PDOSYNC 50 0 transport packet synchronization signal VSSD10 51 − digital ground 10 SCL 52 I serial clock input of I2C-bus SDA 53 I/O serial data of I2C-bus INT 54 O interrupt output (active LOW) A0 55 I I2C-bus hardware address RSLOCK 56 O Reed-Solomon lock indicator VLOCK 57 O Viterbi lock indicator DLOCK 58 O demodulator lock indicator VDDD8 59 − digital supply voltage 8 VDDD9 60 − digital supply voltage 9 TEST 61 I test pin (normally connected to ground) TRST 62 I BST optional asynchronous reset (normally connected to ground) TCK 63 I BST dedicated test clock (normally connected to ground) SCLT 64 I serial clock of I2C-bus loop-through SDAT 65 I/O serial data of I2C-bus loop-through VDDD10 66 − digital supply voltage 10 VSSD11 67 − digital ground 11 VSSD12 68 − digital ground 12 TMS 69 I BST input control signal (normally connected to ground) TDO 70 O BST serial test data output TDI 71 I BST serial test data in (normally connected to ground) VDDD11 72 − digital supply voltage 11 VSSD13 73 − digital ground 13 VSSD(AD) 74 − digital ground ADC VDDD(AD) 75 − digital supply ADC Vref(B) 76 O bottom reference voltage for ADC VSSA1 77 − analog ground 1 QA 78 − analog input Q Vref(Q) 79 O AGC decoupling - Q path IA 80 I analog input I VSSA2 81 − analog ground 2 2000 Feb 21 6 Philips Semiconductors Product specification Satellite demodulator and decoder SYMBOL TDA8044 PIN I/O Vref(I) 82 O AGC decoupling - I path VDDA 83 − analog supply voltage VDDXTAL 84 − supply voltage for crystal oscillator XTALI 85 I crystal oscillator input XTALO 86 O crystal oscillator output VSSXTAL 87 − ground for crystal oscillator VDDD12 88 − digital supply voltage 12 VDDD13 89 − digital supply voltage 13 VSSD14 90 − digital ground 14 D22 91 O 22 kHz output for dish control applications VSSD15 92 − digital ground 15 VSSD16 93 − digital ground 16 VAGC 94 O AGC output voltage VSSD(test) 95 − test pin, normally connected to ground VDDD14 96 − digital supply voltage 14 VDDD15 97 − digital supply voltage 15 OUSTD 98 O general purpose sigma-delta output I0 99 I digital I-input bit 0 (ADC bypass: LSB) I1 100 I digital I-input bit 1 (ADC bypass) 2000 Feb 21 DESCRIPTION 7 Philips Semiconductors Product specification 82 Vref(I) 81 VSSA2 84 VDDXTAL 83 VDDA 85 XTALI 86 XTALO 88 VDDD12 87 VSSXTAL 90 VSSD14 89 VDDD13 91 D22 TDA8044 93 VSSD16 92 VSSD15 95 VSSD(test) 94 VAGC 97 VDDD15 96 VDDD14 99 I0 100 I1 handbook, full pagewidth 98 OUSTD Satellite demodulator and decoder I2 1 80 IA I3 2 79 Vref(Q) VSSD1 3 78 QA CFS 4 VSSD2 5 77 VSSA1 76 Vref(B) I4 6 75 VDDD(AD) I5 7 74 VSSD(AD) I6 8 73 VSSD13 Q0 9 72 VDDD11 VDDD1 10 71 TDI Q1 11 70 TDO Q2 12 69 TMS Q3 13 68 VSSD12 Q4 14 67 VSSD11 VSSD3 15 66 VDDD10 TDA8044 TDA8044A Q5 16 65 SDAT Q6 17 64 SCLT VSSD4 18 VDDD2 19 63 TCK PRESET 20 61 TEST 62 TRST P3 21 60 VDDD9 P2 22 59 VDDD8 P1 23 58 DLOCK P0 24 57 VLOCK VDDD3 25 56 RSLOCK P5 26 55 A0 P4 27 54 INT For compatibility in respect to the TDA8043 see Section “Pin compatibility”. Fig.1 Pin configuration. 2000 Feb 21 8 PDOSYNC 50 PDOVAL 49 PDOERR 48 VSSD9 47 n.c. 46 PDO7 45 VDDD7 44 VDDD6 43 VSSD8 42 VDDD5 41 VDDD4 40 POR 39 PDO6 38 VSSD7 37 VSSD6 36 PDO5 35 PDO4 34 51 VSSD10 PDO3 33 52 SCL PDO1 30 PDO2 31 53 SDA PDO0 29 VSSD5 32 PDOCLK 28 MGM606 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 Pin compatibility The TDA8044 is backwards pin compatible with the TDA8043, this means that the functional pins of the TDA8043 have been left unchanged on the TDA8044. However due to extra functionality of the TDA8044, some of the not connected pins of the TDA8043 have become functional pins on the TDA8044. Table 1 lists the modified pins of the TDA8044. Table 1 Modified pins of the TDA8044 PIN TDA8043 FUNCTION TDA8044 SYMBOL TDA8044 FUNCTION 4 not connected CFS clock frequency selection 5 not connected VSSD2 digital ground 26 not connected P5 I/O expander bit 5 27 not connected P4 I/O expander bit 4 36 not connected VSSD6 digital ground 37 not connected VSSD7 digital ground 39 not connected POR Power-on reset 47 not connected VSSD9 digital ground 64 not connected SCLT serial clock of I2C-bus loop-through 65 not connected SDAT serial data of I2C-bus loop-through 91 not connected D22 22 kHz generation output 92 not connected VSSD15 digital ground 93 not connected VSSD16 digital ground 95 not connected VSSD(test) test pin, connect to ground If it is required to replace the TDA8043 with the TDA8044 and the pins with extra functionality are not required, then the following measures on the PCB layout must be taken to avoid I/O conflicts in the TDA8044: • Pin numbers 4, 5, 26, 27, 36, 37, 47, 65, 92, 93 and 95 must be put to ground • Pin numbers 39, 64 and 91 must be left not connected. With these measures it is possible to use the TDA8043 and the TDA8044 on the same PCB without any problems. In order to use pins with the extra functionality of the TDA8044, PCB layout changes are necessary. 2000 Feb 21 9 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDD supply voltage pins −0.3 +3.55 V Vmax maximum voltage on all pins 0 VDD V Ptot total power dissipation TDA8044 Tamb = 70 °C; note 1 − 1700 mW TDA8044A Tamb = 70 °C; note 2 − 1250 mW −55 +150 °C 0 70 °C 0 125 °C Tstg IC storage temperature Tamb ambient temperature Tj operating junction temperature Tamb = 70 °C Notes 1. Maximum power dissipation is specified for 96 MHz clock frequency, 45 Msymbols/s and a puncture rate of 7⁄8. 2. Maximum power dissipation is specified for 64 MHz clock frequency, 30 Msymbols/s and a puncture rate of 7⁄8. HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take normal precautions appropriate to handling MOS devices (see “Handling MOS devices” ). THERMAL CHARACTERISTICS SYMBOL Rth(j-a) 2000 Feb 21 PARAMETER CONDITIONS VALUE UNIT TDA8044 34 K/W TDA8044A 45 K/W thermal resistance from junction to ambient 10 in free air Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 APPLICATION INFORMATION handbook, full pagewidth DRAM (optional) FLASH FRONT PANEL CONTROL RF input I TDA8060 Q TDA8044 TDA8044A SDD SAA7214 TMIPS 1394 L + PHY IEEE 1394 BUFFERS IEEE 1284 RS232 TSA5056 I2C-bus SAA7215 TUNER telecommunications operator IF smart card(s) AV_DATA CVBS/YC L/R Vxx MODEM TDA8004 AUDIO DAC SWITCHING SCART 2 SCART 3 MGM605 16-Mbit SDRAM 16-Mbit SDRAM (optional) Fig.2 Satellite set-top decoder concept. 2000 Feb 21 SCART 1 RGB I2C-bus 11 Philips Semiconductors Product specification Satellite demodulator and decoder VDDD1 L(1) 10 Ω tuner AGC (optional) 15 µF 10 kΩ 470 Ω VDDD2 L(1) 330 nF 15 µF +5V 27 pF VDDD2 C(3) VDDD2 C(3) 27 pF VDDA C(3) 100 nF 22 kHz VSD 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 CFS VDDD C(3) VDDD1 100 nF 80 2 79 3 78 4 77 5 76 6 75 7 74 8 73 9 72 10 71 11 70 12 69 13 68 14 67 I 100 nF 100 nF Q 100 nF VDDD2 C(3) VDDD2 C(3) TDI TDO TMS VDDD2 66 TDA8044 TDA8044A 16 C(3) 65 I2C-bus 17 64 to tuner 18 63 19 62 20 61 P3 21 60 P2 22 59 P1 23 58 P0 24 57 25 56 P5 26 55 P4 27 54 interrupt PDOCLK 28 53 PDO0 29 52 I2C-bus input PDO1 30 470 kΩ VDDD1 C(3) VDDD1 C(3) packet data and control outputs 100 nF 1 15 +3.3 V 10 nF XTAL(2) handbook, full pagewidth +3.3 V TDA8044 VDDD1 C(3) lock signals +5 V 4.7 kΩ 4.7 kΩ 1.6 kΩ 51 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 n.c. POR PDO2 PDO3 PDO5 PDO4 PDO6 C(3) VDDD1 +3.3 V PDO7 PDOERR PDOSYNC PDOVAL L(1) VDDA 15 µF VDDD1 MGM607 packet data and control outputs (1) B = SMD bead type C8D8.9/3/3 Grade 4S2. (2) fxtal = 4 MHz (fundamental). (3) C = 6.8 nF, SMD. Fig.3 Application diagram. 2000 Feb 21 12 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 PACKAGE OUTLINE QFP100: plastic quad flat package; 100 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm SOT317-2 c y X 80 A 51 81 50 ZE e E HE A A2 (A 3) A1 θ wM pin 1 index Lp bp L 31 100 detail X 30 1 wM bp e ZD v M A D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y mm 3.20 0.25 0.05 2.90 2.65 0.25 0.40 0.25 0.25 0.14 20.1 19.9 14.1 13.9 0.65 24.2 23.6 18.2 17.6 1.95 1.0 0.6 0.2 0.15 0.1 Z D (1) Z E(1) 0.8 0.4 1.0 0.6 θ o 7 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT317-2 2000 Feb 21 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 97-08-01 99-12-27 MO-112 13 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 SOLDERING If wave soldering is used the following conditions must be observed for optimum results: Introduction to soldering surface mount packages • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. Reflow soldering The footprint must incorporate solder thieves at the downstream end. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Wave soldering Manual soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. To overcome these problems the double-wave soldering method was specifically developed. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 2000 Feb 21 14 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO suitable suitable(2) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 Feb 21 15 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 2000 Feb 21 16 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 NOTES 2000 Feb 21 17 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 NOTES 2000 Feb 21 18 Philips Semiconductors Product specification Satellite demodulator and decoder TDA8044 NOTES 2000 Feb 21 19 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SÃO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 3341 299, Fax.+381 11 3342 553 For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com SCA 69 © Philips Electronics N.V. 2000 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753504/03/pp20 Date of release: 2000 Feb 21 Document order number: 9397 750 05972