INTEGRATED CIRCUITS DATA SHEET TDA8005A Low-power (3 V/5 V) smart card coupler Preliminary specification File under Integrated Circuits, IC17 1998 Mar 20 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A • Control and communication through a standard RS232 full-duplex interface FEATURES • Smart card supply (5 and 3 V ±5%, 20 mA maximum with controlled rise and fall times) • Optional additional I/O ports for: • Smart card clock generation (up to 8 MHz), with two times synchronous frequency doubling – keyboard • Clock STOP HIGH, clock STOP LOW or 1.25 MHz (from internal oscillator) for cards power-down mode – display – LEDs – etc. • Specific UART on I/O for automatic direct/inverse convention settings and error management at character level • P80CL51 microcontroller core with 4-kbyte ROM and 256-byte RAM. • Automatic activation and deactivation sequences through an independent sequencer APPLICATIONS • Portable smart card readers for protocol T = 0 • Supports the protocol T = 0 in accordance with ISO 7816 GSM11.11 requirements (Global System for Mobile communication); approved for Final GSM11.11 Test Approval (FTA) • GSM mobile phones. GENERAL DESCRIPTION • Several analog options are available for different applications: doubler or tripler DC-to-DC converter, card presence, active HIGH or LOW, threshold voltage supervisor, etc. The TDA8005A is a low-cost card interface for portable smart card readers. Controlled through a standard serial interface, it takes care of all ISO 7816 and GSM11.11 requirements for both 5 and 3 V cards. It gives the card and the set a very high level of security, due to its special hardware against ESD, short-circuiting, power failure, etc. Its integrated step-up converter allows operation within a supply voltage range of 2.5 to 6 V. • Overloads and take-off protections • Current limitations in the event of short-circuit • Special circuitry for killing spikes during power-on or off • Supply supervisor • Step-up converter (supply voltage from 2.5 to 6 V) The very low power consumption in power-down and sleep modes saves battery power. • Power-down and sleep mode for low power consumption Development tools, application report and support (hardware and software) are available. • Enhanced ElectroStatic Discharge (ESD) protections on card side (6 kV minimum) ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TDA8005AG LQFP64 plastic low profile quad flat package; 64 leads; body 10 × 10 × 1.4 mm SOT314-2 TDA8005AH QFP44 plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 × 10 × 1.75 mm SOT307-2 1998 Mar 20 2 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDD supply voltage doubler and tripler option 2.5 − 6.0 V IDD(pd) supply current in power-down mode VDD = 5 V; card inactive − 100 − µA IDD(sm) supply current in sleep mode card powered but clock stopped; no load doubler option − 500 − µA tripler option − 700 − µA 5.5 − mA IDD(om) supply current in operating mode − unloaded; fXTAL = 13 MHz; fµC = 6.5 MHz; fcard = 3.25 MHz VCC card supply voltage 5 V card no load 4.85 5.05 5.25 V static load 4.75 5.0 5.25 V dynamic load on 200 nF capacitor 4.5 − 5.4 V no load 2.9 3.03 3.15 V static load 2.79 3 3.21 V dynamic load on 200 nF capacitor 2.75 − 3.25 V operating − − 20 mA limitation − − note 1 mA maximum load capacitor 250 nF (including typical 200 nF decoupling) 0.04 0.1 0.16 V/µs 3 V card ICC card supply current SR slew rate on VCC (rise and fall) tde deactivation sequence duration − − 225 µs tact activation sequence duration − − 150 µs fXTAL crystal frequency 2 − 16 MHz Tamb operating ambient temperature −25 − +85 °C Note 1. See Table 3 for mask options. 1998 Mar 20 3 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A BLOCK DIAGRAM V handbook, full pagewidth DDD 47 nF 47 nF 100 nF S1 V DDA 2.5 to 6 V 100 nF ALARM 10 (7) 63 (43) S2 64 (44) S3 61 (41) S4 3 (2) 62 (42) SUPPLY 44 STEP-UP CONVERTER ref INTERNAL REFERENCE 60 (40) VUP DELAY RESET 46 (31) VOLTAGE SENSE 2.3 to 2.7 V alarm 22 (17) TxD AUX1 AUX2 INT1 V DDD TDA8005AG (TDA8005AH) osc ref 59 (39) SECURITY skill 28 (18) start CONTROLLER CL51 29 (19) EN1 58 (38) VCC GENERATOR LIS VCC 100 nF RST 32 (22) 4 kbytes ROM 33 (23) EN2 off 256-byte RAM 30 (20) P00(1) to P37 RST BUFFER 56 (36) I/O BUFFER 55 (35) CLOCK BUFFER 57 (37) RST OPTIONAL PORTS SEQUENCER EN3 data clk EN R/W S0 S1 INT EN4 PERIPHERAL INTERFACE microcontroller clock 47 (32) I/O ISO 7816 UART OUTPUT PORT EXTENSION CLOCK CIRCUITRY osc 36 (26) 35 (25) 37 (27) 2 (1) 53 52 51 50 49 4 MGL330 XTAL1 K0 XTAL2 DGND AGND Pin numbers in parenthesis represent the TDA8005AH. (1) For details see Chapter “Pinning” and Table 3. Fig.1 Block diagram. 1998 Mar 20 47 nF INTERNAL OSCILLATOR 2.5 MHz VDDD RxD S5 4 K1 K2 K3 K4 K5 I/O CLK PRES Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A PINNING PIN SYMBOL DESCRIPTION LQFP64 QFP44 n.c. 1 − not connected AGND 2 1 analog ground S3 3 2 contact 3 for the step-up converter K5 4 − output port from port extension P03 5 3 general purpose I/O port (connected to port P03) P02 6 4 general purpose I/O port (connected to port P02) P01 7 5 general purpose I/O port (connected to port P01) n.c. 8 − not connected P00 9 6 general purpose I/O port (connected to port P00) VDDD 10 7 digital supply voltage n.c. 11 − not connected TEST1 12 8 test pin 1 (connected to port P10; must be left open-circuit in the application) P11 13 9 general purpose I/O port or interrupt (connected to port P11) P12 14 10 general purpose I/O port or interrupt (connected to port P12) P13 15 11 general purpose I/O port or interrupt (connected to port P13) P14 16 12 general purpose I/O port or interrupt (connected to port P14) n.c. 17 − not connected P15 18 13 general purpose I/O port or interrupt (connected to port P15) P16 19 14 general purpose I/O port or interrupt (connected to port P16) TEST2 20 15 test pin 2 (connected to PSEN; must be left open-circuit in the application) P17 21 16 general purpose I/O port or interrupt (connected to port P17) RESET 22 17 input for resetting the microcontroller (active HIGH) n.c. 23 − not connected n.c. 24 − not connected n.c. 25 − not connected n.c. 26 − not connected n.c. 27 − not connected RxD 28 18 serial interface receive line TxD 29 19 serial interface transmit line INT1 30 20 general purpose I/O port or interrupt (connected to port P33) T0 31 21 general purpose I/O port (connected to port P34) AUX1 32 22 push-pull auxiliary output (±5 mA; connected to timer T1 e.g. port P35) AUX2 33 23 push-pull auxiliary output (±5 mA; connected to timer; port P36) P37 34 24 general purpose I/O port (connected to port P37) XTAL2 35 25 crystal connection XTAL1 36 26 crystal connection or external clock input DGND 37 27 digital ground n.c. 38 − not connected 1998 Mar 20 5 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A PIN SYMBOL DESCRIPTION LQFP64 QFP44 n.c. 39 − not connected P20 40 28 general purpose I/O port (connected to port P20) P21 41 − general purpose I/O port (connected to port P21) P22 42 29 general purpose I/O port (connected to port P22) P23 43 30 general purpose I/O port (connected to port P23) ALARM 44 − open-drain output for power-on reset (active HIGH or LOW by mask option) n.c. 45 − not connected DELAY 46 31 external capacitor connection for delayed reset signal PRES 47 32 card presence contact input (active HIGH or LOW by mask option) TEST3 48 33 test pin 3 (must be left open-circuit in the application) K4 49 − output port from port extension K3 50 − output port from port extension K2 51 − output port from port extension K1 52 − output port from port extension K0 53 − output port from port extension TEST4 54 34 test pin 4 (must be left open-circuit in the application) I/O 55 35 data line to/from the card (ISO C7 contact) RST 56 36 card reset output (ISO C2 contact) CLK 57 37 clock output to the card (ISO C3 contact) VCC 58 38 card supply output voltage (ISO C1 contact) LIS 59 39 supply for low-impedance on cards contacts S5 60 40 contact 5 for the step-up converter S2 61 41 contact 2 for the step-up converter S4 62 42 contact 4 for the step-up converter VDDA 63 43 analog supply voltage S1 64 44 contact 1 for the step-up converter 1998 Mar 20 6 Philips Semiconductors Preliminary specification 49 K4 50 K3 51 K2 52 K1 53 K0 54 TEST4 TDA8005A 55 I/O 56 RST 57 CLK CC 58 V 59 LIS 60 S5. 61 S2 62 S4 63 V 64 S1 handbook, full pagewidth DDA Low-power (3 V/5 V) smart card coupler n.c. 1 48 TEST3 AGND 2 47 PRES S3 3 46 DELAY K5 4 45 n.c. P03 5 44 ALARM P02 6 43 P23 P01 7 42 P22 n.c. 8 41 P21 TDA8005AG 14 35 XTAL2 P13 15 34 P37 P14 16 33 AUX2 Fig.2 Pin configuration (LQFP64). 1998 Mar 20 7 AUX1 32 P12 T0 31 36 XTAL1 INT1 30 13 TxD 29 P11 RxD 28 37 DGND n.c. 27 12 n.c. 26 TEST1 n.c. 25 38 n.c. n.c. 24 11 n.c. 23 n.c. RESET 22 39 n.c. P17 21 10 TEST2 20 V DDD P16 19 40 P20 P15 18 9 n.c. 17 P00 MGL331 Philips Semiconductors Preliminary specification AGND 1 33 TEST3 S3 2 32 PRES P03 3 31 DELAY P02 4 30 P23 P01 5 29 P22 TDA8005AH P00 6 DDD 7 27 DGND TEST1 8 26 XTAL1 P11 9 25 XTAL2 28 P20 Fig.3 Pin configuration (QFP44). 8 AUX1 22 T0 21 INT1 20 TxD 19 RxD 18 RESET 17 P17 16 23 AUX2 TEST2 15 P13 11 P16 14 24 P37 P15 13 P12 10 P14 12 V 1998 Mar 20 34 TEST4 35 I/O 36 RST 37 CLK TDA8005A 38 V CC 39 LIS 40 S5 41 S2 42 S4 handbook, full pagewidth 43 V DDA 44 S1 Low-power (3 V/5 V) smart card coupler MGL332 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A FUNCTIONAL DESCRIPTION Supply Microcontroller The circuit operates within a supply voltage range of 2.5 to 6 V. The supply pins are VDDD, VDDA, DGND and AGND. Pins VDDA and AGND supply the analog drivers to the card and have to be externally decoupled because of the large current spikes that the card and the step-up converter can create. An integrated spike killer ensures the contacts to the card remain inactive during power-up or power-down. An internal voltage reference is generated which is used within the step-up converter, the voltage supervisor and the VCC generator. The microcontroller is a P80CL51 with 256 bytes of RAM instead of 128. The baud rate of the UART has been multiplied by four in modes 1, 2 and 3. This means that the division factor of 32 in the formula is replaced by 8 in both reception and transmission mode and that in the reception modes only four samples per bit are taken with decision on the majority of samples 2, 3 and 4; the delay counter has been reduced from 1536 to 24 as well. Remark: this has an impact when getting out of power-down mode. It is recommended to switch to internal clock before entering power-down mode. The voltage supervisor generates an internal alarm pulse, whose length is defined by an external capacitor tied to the DELAY pin, when VDDD is too low to ensure proper operation (1 ms per 1 nF typical). This pulse is used as a reset pulse by the controller, in parallel with an external reset input, which can be tied to the system controller. All the other functions remain unchanged. Refer to the P80CL51 data sheet for any further information. Internal ports INT0 (P32), P10, P04 to P07 and P24 to P27 are used for controlling the smart card interface. It is also used in order to either block any spurious card contacts during controllers reset, or to force an automatic deactivation of the contacts in the event of supply dropout; see Sections “Activation sequence” and “Deactivation sequence”. Mode 0 is unchanged. The baud rate for modes 1 and 3 is: SMOD f clk 2 ----------------- × ----------------------------------------------8 12 × ( 256 – TH1 ) The baud rate for mode 2 is: In the 64 pin version, this reset pulse is output to the open drain ALARM pin, which may be selected active HIGH or active LOW by mask option and may be used as a reset pulse for other devices within the application. SMOD 2 ----------------- × f clk 16 For mode 3 timing see Table 1. Table 1 Mode 3 timing BAUD RATE fclk = 6.5 MHz; VDD = 5 V fclk = 3.25 MHz; VDD = 5 or 3 V SMOD TH1 SMOD TH1 135416 1 255 − − 67708 0 255 1 255 45139 1 253 − − 33854 0 254 0 255 27083 1 251 − − 22569 0 253 1 253 16927 − − 0 254 13542 − − 1 251 11285 0 250 0 253 1998 Mar 20 9 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A handbook, full pagewidth Vth(VDD) + Vhys(VthVDD) Vth(VDD) VDD Vth(DELAY) VDELAY ALARM MGL333 Fig.4 Supply supervisor. The step-up converter may be chosen as a doubler or a tripler by mask option, depending on the voltage and the current needed on the card. Low impedance supply (pin LIS) For some applications, it is mandatory that the contacts to the card (VCC, RST, CLK and I/O) are low impedance while the card is inactive and also when the coupler is not powered. An auxiliary supply voltage on pin LIS ensures this condition where ILIS ≤ 5 µA for VLIS = 5 V. This low impedance situation is disabled when VCC starts rising during activation, and re-enabled when the step-up converter is stopped during deactivation. If this feature is not required, the LIS pin must be tied to VDDD. ISO 7816 security The correct sequence during activation and deactivation of the card is ensured through a specific sequencer, clocked by a division ratio of the internal oscillator. Activation (START signal P05; see Table 3) is only possible if the card is present (PRES HIGH or LOW according to mask option), and if the supply voltage is correct (ALARM signal inactive); CLK and RST are controlled by RSTIN (internal signal; port P04), allowing the correct count of CLK pulses during answer-to-reset from the card. Step-up converter Except for the VCC generator and the other cards contacts buffers, the whole circuit is powered by VDDD and VDDA. If the supply voltage is 3 or 5 V, then a higher voltage is needed for the ISO contacts supply. When a card session is requested by the controller, the sequencer first starts the step-up converter, which is a switched capacitors type, clocked by an internal oscillator at a frequency of approximately 2.5 MHz. The output voltage Vstep-up is regulated at approximately 6.5 V and then fed to the VCC generator. VCC and DGND are used as a reference for all other cards contacts. 1998 Mar 20 The presence of the card is signalled to the controller by the OFF signal (port P10; see Table 3). During a session, the sequencer performs an automatic emergency deactivation in the event of card take-off, supply voltage drop, or hardware problems. The OFF signal falls thereby warning the controller. 10 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A active. The card is not active; this is the smallest power consumption mode. Any change on P1 ports or on PRES will wake-up the circuit (for example, a key pressed on the keyboard, the card inserted or taken off). Clock circuitry The clock to the microcontroller and the clock to the card are derived from the main clock signal (XTAL from 2 to 16 MHz, or an external clock signal). In the sleep mode, the card is powered but configured in the idle or sleep mode. The step-up converter will only be active when it is necessary to reactivate Vstep-up. When the microcontroller is in power-down mode any change on P1 ports or on PRES will wake up the circuit. Directly after reset and during power reduction modes the microcontroller clock frequency fclk equals 1⁄8fINT; fINT is always present because it is derived from the internal oscillator and gives the lowest power consumption. When required (for card session, serial communication or anything else) the microcontroller may choose to clock itself with 1⁄2fXTAL, 1⁄4fXTAL or 1⁄2fINT. All frequency changes are synchronous, thereby ensuring no hang-up due to short spikes etc. In both power reduction modes the sequencer is active, allowing automatic emergency deactivation in the event of card take-off, hardware problems, or supply dropout. The TDA8005A is set into power-down or sleep mode by software. There are several ways to return to normal mode: insertion or extraction of the card, detection of a change on P1 (which can be a key pressed) or a command from the system microcontroller. For example, if the system monitors the clock signal on XTAL1, it may stop this clock after setting the device into power-down mode and then wake it up when sending the clock signal again. In this situation, the internal clock should have been used before the fclk. Cards clock: the microcontroller may select to send the card a card clock frequency of 1⁄2fXTAL, 1⁄4fXTAL, 1⁄8fXTAL or 1⁄ f 2 INT (≈1.25 MHz), or to stop the clock HIGH or LOW. All transitions are synchronous, ensuring correct pulse length during start or change in accordance with ISO 7816. After power on, CLK is set at STOP LOW and fclk is set at 8fINT. 1⁄ Power-down and sleep modes Peripheral interface The TDA8005A offers a large flexibility for defining power reduction modes by software. Some configurations are described below. This block allows synchronous serial communication with the three peripherals (ISO 7816 UART, clock circuitry and output port extension); see Figs 1 and 5. In the power-down mode, the microcontroller is in power-down and the supply and the internal oscillator are handbook, full pagewidth RESET P24 DATA P07 P06 STROBE ENABLE P27 REG0 P26 REG1 P25 R/W P32 INT PERIPHERAL CONTROL clock configuration UART receive CC0 CC1 CC2 CC3 CC4 CC5 CC6 CC7 UR0 UR1 UR2 UR3 UR4 UR5 UR6 UR7 UART configuration UART status register UC0 UC1 UC2 UC3 UC4 UC5 UC6 UC7 US0 US1 US2 US3 US4 US5 US6 US7 UART transmit UT0 UT1 UT2 UT3 UT4 UT5 UT6 UT7 ports extension PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 MGL334 Fig.5 Peripheral interface diagram. 1998 Mar 20 11 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler Table 2 TDA8005A Explanation of Fig.5; note 1 BIT NAME DESCRIPTION REG0 = 0, REG1 = 0 and R/W = 0; CLOCK configuration register (configuration after reset is cards clock STOP LOW, fclk = 1⁄8fINT) CC0 cards clock = 1⁄2fXTAL CC1 cards clock = 1⁄4fXTAL CC2 cards clock = 1⁄8fXTAL CC3 cards clock = 1⁄2fINT CC4 cards clock = STOP HIGH CC5 fclk = 1⁄2fXTAL CC6 fclk = 1⁄4fXTAL CC7 fclk = 1⁄2fINT REG0 = 1, REG1 = 0 and R/W = 0; UART configuration register (after reset all bits are cleared) UC0 ISO UART RESET UC1 START SESSION UC2 LCT (Last Character to Transmit) UC3 TRANSMIT/RECEIVE UC4 3 V/5 V UC5 to UC7 not used REG0 = 0, REG1 = 1 and R/W = 0; UART transmit register UT0 to UT7 LSB to MSB of the character to be transmitted to the card REG0 = 1, REG1 = 1 and R/W = 0; PORTS EXTENSION (after reset all bits are cleared) PE0 to PE5 PE0 to PE5 is the inverse of the value to be written on K0 to K5 PE6 and PE7 not used REG0 = 0, REG1 = 0 and R/W = 1; UART receive register UR0 to UR7 LSB to MSB of the character received from the card REG0 = 1, REG1 = 0 and R/W = 1; UART status register (after reset all bits are cleared) US0 UART transmit buffer empty US1 UART receive buffer full US2 first start bit detected US3 parity error detected during reception of a character (the UART has asked the card to repeat the character) US4 parity error detected during transmission of a character; the controller must write the previous character in the UART transmit register, or abort the session US5 to US7 not used Note 1. All registers are active HIGH. 1998 Mar 20 12 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler USE OF PERIPHERAL INTERFACE TDA8005A 4. Read the word from PSR with DATA and STROBE; DATA is shifted on the rising edge of STROBE; 7 shifts are necessary. ;**************************************** ;*READ CHARACTER ARRIVED IN UART RECEIVE* ;*****************REGISTER*************** ;**************************************** ; ;**THE CHARACTER WILL BE IN THE** ;**ACCUMULATOR** CLR REG0 CLR REG1 SET R/W CLR ENABLE SET ENABLE CLR ENABLE SET ENABLE MOV R2,#8 LOOP MOV C,DATA RRC A CLR STROBE SET STROBE DJNZ R2,LOOP SET DATA RET EXAMPLE OF PERIPHERAL INTERFACE ISO UART ;**************************************** ;*CHANGE OF CLOCK CONFIGURATION REGISTER* ;**************************************** ; ;**THE NEW CONFIGURATION IS SUPPOSED** ;**TO BE IN THE ACCUMULATOR** CLR REG0 CLR REG1 CLR R/W MOV R2,#8 LOOP RRC A MOV DATA C CLR STROBE SET STROBE DJNZ R2,LOOP CLR ENABLE SET ENABLE SET DATA RET The ISO UART handles all the specific requirements defined in ISO T = 0 protocol type. It is clocked with the cards clock, which gives the fclk/31 sampling rate for start bit detection (the start bit is detected at the first LOW level on I/O) and the fclk/372 frequency for Elementary Time Unit (ETU) timing (in the reception mode the bit is sampled at 1⁄ ETU). It also allows the cards clock frequency changes 2 without interfering with the baud rate. Write operation 1. Select the correct register with R/W, REG0 and REG1 2. Write the word in the Peripheral Shift Register (PSR) with DATA and STROBE; DATA is shifted on the rising edge of STROBE; 8 shifts are necessary 3. Give a negative pulse on ENABLE; the data is parallel loaded in the register on the falling edge of ENABLE. Read operation 1. Select the correct register with R/W, REG0 and REG1 2. Give a first negative pulse on ENABLE; the word is parallel loaded in the peripheral shift register on the rising edge of ENABLE 3. Give a second negative pulse on ENABLE for configuring the PSR in shift right mode This hardware UART allows operating of the microcontroller at low frequency, thus lowering EM radiations and power consumption. It also frees the microcontroller of fastidious conversions and real time jobs thereby allowing the control of higher level tasks. The following occurs in the reception mode (see Fig.6): • Detection of the inverse or direct convention at the beginning of Answer To Reset (ATR) • Automatic convention setting, so the microcontroller only receives characters in direct convention • Parity checking and automatic request for character repetition in case of error (reception is possible at 12 ETU). 1998 Mar 20 13 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler The convention is recognized on the first character of the ATR and the UART configures itself in order to exchange direct data without parity processing with the microcontroller whatever the convention of the card is. Bit UC1 (START SESSION) must be reset by software. At the end of every character, the UART tests the parity and resets what is necessary for receiving another character. The following occurs in the transmission mode (see Fig.7): • Transmission according to the convention detected during ATR, consequently the microcontroller only has to send characters in direct convention; transmission of the next character may start at 12 ETU in the event of no error or 13 ETU in case of error • Parity calculation and detection of repetition request from the card in the event of error If no parity error is detected, the UART sets bit US1 (UART receive buffer full) in the status register which warns the microcontroller it has to read the character before the reception of the next one has been completed. The status register is reset when read from the controller. • The bit LCT (Last Character to Transmit) allows fast reconfiguration for receiving the answer 12 ETU after the start bit of the last transmitted character. The ISO UART status register can inform which event has caused an interrupt (buffer full, buffer empty, parity error detected etc.) in accordance with peripheral interface. If a parity error has been detected, the UART pulls the I/O line LOW between 10.5 and 12 ETU. It also sets the bits US1 (UART receive buffer full) and US3 (parity error detected during reception of a character) in the status register which warns the microcontroller that an error has occurred. The card is supposed to repeat the previous character. The register is reset when its status is read by the microcontroller. The ISO UART configuration register enables the microcontroller to configure the ISO UART and to choose between 5 or 3 V cards. Bit UC4 (3 V/5 V) LOW means 5 V card, bit UC4 (3 V/5 V) HIGH means 3 V card; conform peripheral interface. The selection of 3 or 5 V card has to be done before activation. After power-on, all ISO UART registers are reset. The ISO UART is configured in the reception mode. When the microcontroller wants to start a session, it sets the bits UC1 (START SESSION) and UC0 (ISO UART RESET) in the UART configuration register and then sets bit START SESSION LOW. When the first start bit on I/O is detected (sampling rate fclk/31), the UART sets the bit US2 (first start bit detected) in the status register which gives an interrupt on internal port INT0 one clock pulse later. 1998 Mar 20 TDA8005A 14 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler handbook, full pagewidth START; T/R = 0 or LCT = 1 START; TDA8005A and T/R = 0 SET ENABLE FSD(1) clock starts INHIBIT I/O DURING 200 CLK SAMPLE I/O EVERY 31 CLK I/O = 0 y SET FSD STATUS REGISTER IF FSD IS ENABLED n RESET EN FSD 5th bit SAMPLE I/O AT 186 AND EVERY 372 CLK SET CONVENTION IF START SESSION = 1 (2) 10th bit CONVERT AND LOAD CHARACTER IN RECEPTION BUFFER AT 10 ETU parity error CHECK PARITY SET BIT RECEPTION PARITY ERROR AT 10 ETU DISABLE I/O BUFFER BETWEEN 10 AND 12 ETU PULL I/O LINE LOW FROM 10.5 TO 11.75 ETU MGL335 SET BIT BUFFER FULL AT 10 ETU RESET RECEPTION PART AT 12 ETU (3) STOP; T/R = 1 (1) FSD = First Start Detect. (2) The start session is reset by software. (3) The software may load the received character in the peripheral control at any time without any action on the ISO UART. Fig.6 ISO UART reception flow chart. 1998 Mar 20 15 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler When the controller needs to transmit data to the card, it first sets bit UC3 in the UART configuration register which configures the UART in the transmission mode. As soon as a character has been written in the UART transmit register, the UART makes the conversion, calculates the parity and starts the transmission on the rising edge of ENABLE. When the character has been transmitted, it surveys the I/O line at 11 ETU in order to know if an error has been detected by the card. If the character has been rewritten before 13 ETU, the transmission will start at 13 ETU. If it has been written after 13 ETU it will start on the rising edge of ENABLE. When the transmission is completed, the microcontroller may set bit LCT (Last Character to Transmit) so that the UART will force the reception mode into ready to get the reply from the card at 12 ETU. This bit must be reset before the end of the first reception. Bit UC3 (TRANSMIT/RECEIVE) must be reset to enable the reception of the characters to follow. If no error has occurred, the UART sets bit US0 (UART transmit buffer empty) in the status register and waits for the next character. If the next character has been written before 12 ETU, the transmission will start at 12 ETU. If it was written after 12 ETU it will start on the rising edge of ENABLE. When the session is completed, the microcontroller re-initializes the whole UART by resetting bit UC0 (ISO UART RESET). If an error has occurred, it sets bits US0 and US4 (parity error detected during transmission of a character) which warns the microcontroller to rewrite the previous character in the UART transmit register. 1998 Mar 20 TDA8005A 16 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler handbook, full pagewidth TDA8005A START; T/R SET TRANSMIT ENABLE transmit register selected CONVERT, CALCULATE PARITY AND LOAD IN TRANSMIT SHIFT REGISTER (1) SHIFT EVERY ETU IF TRANSMIT ENABLE IS SET 10th bit shifted SET I/O BUFFER IN RECEPTION AT 10 ETU SAMPLE I/O AT 11 ETU parity error SET BIT TRANSMISSION PARITY ERROR AND BUFFER EMPTY AT 11 ETU y n SET BIT BUFFER EMPTY AT 11 ETU (2) y LCT = 1 n RESET TRANSMIT PART AT 11 ETU FORCE RECEPTION MODE RESET TRANSMIT PART AND ENABLE TRANSMIT AT 12 ETU T/R = 0 RESET TRANSMIT PART AND ENABLE TRANSMIT AT 13 ETU n y STOP STOP (1) The transmit register may be loaded just after reading from the status register. (2) The software must reset the last character but before completion of the first received character. Fig.7 ISO UART transmission flow chart. 1998 Mar 20 17 MGL336 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A • I/O buffer in input, 20 kΩ pull-up resistor connected between I/O and VCC, I/O masked till 200 clock pulses In order to allow a precise count of clock pulses during ATR, a defined time window (t3; t5) is opened where the clock may be sent to the card by means of RSTIN (port P04). Beyond this window, RSTIN has no more action on clock, and only monitors the cards RST contact (RST is the inverse of RSTIN). • I/O buffer in input, 20 kΩ pull-up resistor connected between I/O and VCC, I/O is sampled every 31 clock pulses The sequencer is clocked by fINT/64 which leads to a time interval T of 25 µs typical. Thus t1 = 0 to 1⁄64T, t2 = t1 + 3⁄2T, t3 = t1 + 4T, t4 = t3 to t5 and t5 = t1 + 7T. • I/O buffer in output, 20 kΩ pull-up resistor connected between I/O and VCC Deactivation sequence I/O buffer modes (see Fig.8) The I/O buffer modes are: • I/O buffer disabled • I/O buffer in output, I/O is pulled LOW by the N transistor of the buffer When the session is completed, the microcontroller sets START HIGH. The circuit then executes an automatic deactivation sequence (see Fig.10): • I/O buffer in output, I/O is pulled HIGH or LOW by the P or N transistor. 1. Card reset (RST falls LOW) at t10 2. Clock is stopped at t11 Output ports extension 3. I/O becomes high impedance to the ISO UART (t12) In the LQFP64 version, 6 auxiliary output ports may be used for low frequency tasks (for example, keyboard scanning). These ports are push-pull output types (in accordance with use in software document). 4. VCC falls to 0 V with typical 0.1 V/µs slew rate (t13) 5. The step-up converter is stopped and CLK; RST, VCC and I/O become low impedance to GND (t14) 6. t10 < 1⁄64T; t11 = t10 + 1⁄2T; t12 = t10 + T; t13 = t10 + 3⁄2T; t14 = t10 + 5T. Activation sequence When the card is inactive, VCC, CLK, RST and I/O are LOW, with low impedance with respect to GND. The step-up converter is stopped. The I/O is configured in the reception mode with a high impedance path to the ISO UART, subsequently no spurious pulse from the card during power-up will be taken into account until I/O is enabled. When conditions are fulfilled (supply voltage present, card present, no hardware problems), the microcontroller may initiate an activation sequence by setting START LOW (t0; see Fig.9): Protections Main hardware fault conditions are monitored by the circuit: • Overcurrent on VCC (in accordance with options as specified in Table 3) • Short circuits between VCC and other contacts • Card take-off during transaction. When one of these problems is detected, the security logic block pulls the interrupt line (port P10) OFF LOW, in order to warn the microcontroller and initiates an automatic deactivation of the contacts. When the deactivation has been completed, the OFF line returns HIGH, except if the problem was due to a card extraction in which case it remains LOW until a card is inserted. 1. The step-up converter is started (t1) 2. LIS signal is disabled by internal signal ENLI, and VCC starts rising from 0 to 5 or 3 V (according to bit 4 of UART configuration register) with a controlled rise time of 0.1 V/µs typically (t2) 3. I/O buffer is enabled (t3) 4. Clock is sent to the card (t4) 5. RST buffer is enabled (t5). 1998 Mar 20 18 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler handbook, full pagewidth activation character reception with error TDA8005A character transmission with error character reception without error character transmission without error forced deactivation character reception without error I/O OUT I/O BUFFER IN T ISO UART MODE R 1 2 3 4 54 3 4 1 6 3 6 3 3 4 3 1 MBH638 Fig.8 I/O buffer modes. handbook, full pagewidth PRES OFF START fINT/64 Vstep-up VCC I/O ENRST internal RSTIN CLK RST ENLI internal MGL337 t3 tact Fig.9 Activation sequence. 1998 Mar 20 19 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A handbook, full pagewidth PRES OFF START fINT/64 RST CLK I/O VCC Vstep-up ENLI t10 internal t11 t12 t13 t14 tde Fig.10 Emergency deactivation sequence after a card take-off. 1998 Mar 20 20 MGL338 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDDA analog supply voltage −0.3 +6.5 V VDDD digital supply voltage −0.3 +6.5 V Vn all input voltages −0.3 VDD + 0.5 V In1 DC current into pins XTAL1, XTAL2, RxD, TxD, RESET, INT1, T0 (port P34), P37, P00 to P03, P11 to P17, P20 to P23 and TEST1 to TEST4 − 5 mA In2 DC current from or to pins AUX1 and AUX2 −10 +10 mA In3 DC current from or to pins S1 to S5 −30 +30 mA In4 DC current into pin DELAY −5 +10 mA In5 DC current from or to pin PRES −5 +5 mA In6 DC current from and to pins K0 to K5 −5 +5 mA In7 DC current from or into pin ALARM (according to option choice) −5 +5 mA Ptot total power dissipation − 500 mW Tstg storage temperature −55 +150 °C Vesd electrostatic discharge on pins I/O, VCC, RST, CLK and PRES −6 +6 kV on other pins −2 +2 kV − − 125 °C Tj junction temperature Tamb = −25 to +85°C HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) 1998 Mar 20 PARAMETER CONDITIONS VALUE UNIT LQFP64 70 K/W QFP44 60 K/W thermal resistance from junction to ambient in free air 21 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A CHARACTERISTICS VDD = 5 V; VSS = 0 V; Tamb = 25 °C; for general purpose I/O ports refer to P80CL51 data sheet; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VDD supply voltage voltage superior, option dependant; note 1 2.5 IDD(pd) supply current in power-down mode VDD = 5 or 3 V; card inactive − IDD(sm) supply current in sleep mode card powered but clock stopped; no load − 6.0 V 100 − µA doubler option − 500 − µA tripler option − 700 − µA unloaded; fXTAL = 13 MHz; fclk = 6.5 MHz; fcard = 3.25 MHz − 5.5 − mA VDD = 3 V; fXTAL = 13 MHz; fclk = 3.25 MHz; fcard = 3.25 MHz − 3 − mA supervisor option 2 − 2.3 V 2.45 − 3 V 3.8 − 4.5 V Vhys(VthVDD) hysteresis on Vth(VDD) 40 − 350 mV Vth(DELAY) threshold voltage on pin DELAY − 1.38 − V VDELAY voltage on pin DELAY VDD − 0.5 − VDD V IDELAY output current at pin DELAY pin grounded (charge) −1.5 −1 −0.4 µA VDELAY = VDD (discharge) 4 6.8 10 mA CDELAY = 10 nF − 10 − ms IDD(om) Vth(VDD) tW supply current operating mode threshold voltage on VDD (falling) ALARM pulse width ALARM (open drain active HIGH or LOW output) IOH HIGH-level output current active LOW option; VOH = 5 V − − 10 µA VOL LOW-level output voltage active LOW option; IOL = 2 mA − − 0.4 V IOL LOW-level output current active HIGH option; VOL = 0 V − − −10 µA VOH HIGH-level output voltage active HIGH option; IOH = −2 mA VDD − 1 − − V Crystal oscillator; note 2 fXTAL crystal frequency 2 − 16 MHz fext frequency of external signal applied on pin XTAL1 0 − 16 MHz 1998 Mar 20 22 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler SYMBOL PARAMETER TDA8005A CONDITIONS MIN. TYP. MAX. UNIT Step-up converter fINT internal oscillation frequency Vstep-up voltage on pin S5 2 − 3 MHz 5 V card − 6.5 − V 3 V card − 4.5 − V Low impedance supply (pin LIS) VLIS voltage on pin LIS 0 − VDD V ILIS current at pin LIS − − 7 µA Reset output to the card (pin RST) Vo(RST) output voltage when inactive or when LIS is used; Io(RST) = 1 mA −0.3 − +0.4 V Io(RST) output current when inactive and pin grounded − − −1 mA VOL LOW-level output voltage IOL = 200 µA −0.25 − +0.4 V VOH HIGH-level output voltage IOH ≤ −200 µA 5 V card 4 − VCC + 0.3 V 3 V card 2.4 − VCC + 0.3 V tr rise time CL = 30 pF − − 1 µs tf fall time CL = 30 pF − − 1 µs Clock output to the card (pin CLK) Vo(CLK) output voltage when inactive or when LIS is used; Io(CLK) = 1 mA −0.3 − +0.4 V Io(CLK) output current when inactive and pin grounded − − −1 mA VOL LOW-level output voltage IOL = 200 µA −0.25 − +0.4 V VOH HIGH-level output voltage IOH ≤ −200 µA VCC − 0.5 − VCC + 0.25 V tr rise time CL = 30 pF − 15 tf fall time CL = 30 pF − − 15 ns fclk clock frequency 1 MHz idle configuration 1 − 1.5 MHz low operating speed − − 2 MHz middle operating speed − − 4 MHz high operating speed − − 8 MHz CL = 30 pF 45 − 55 % δ 1998 Mar 20 duty cycle 23 − ns Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler SYMBOL PARAMETER TDA8005A CONDITIONS MIN. TYP. MAX. UNIT Card supply voltage (pin VCC) Vo(VCC) card supply output voltage when inactive and when LIS −0.3 is used; Io(VCC) = 1 mA − +0.4 V when active; 5 V card no load 4.85 5.05 5.25 V static load 4.75 5.0 5.25 V dynamic loads on 200 nF capacitor 4.5 − 5.4 V 2.9 3.03 3.15 V when active; 3 V card no load Io(VCC) SR card supply output current slew rate on VCC (rise and fall) static load 2.79 3 3.21 V dynamic loads on 200 nF capacitor 2.75 − 3.25 V when inactive and pin grounded − − −1 mA when active − − 20 mA limited − − note 1 mA maximum load capacitor 250 nF (including typical 200 nF decoupling) 0.04 0.1 0.16 V/µs Data line (pin I/O) Vo(I/O) output voltage when inactive or when LIS is used; Io(I/O) = 1 mA −0.3 − +0.4 V Io(I/O) output current when inactive and pin grounded − − −1 mA VOL LOW-level output voltage I/O configured as output; IOL = 1 mA −0.25 − +0.3 V VOH HIGH-level output voltage I/O configured as output; IOH ≤ 100 µA 0.8VCC − VCC + 0.25 V VIL LOW-level input voltage I/O configured as input; IIL = 1 mA 0 − 0.5 V VIH HIGH-level input voltage I/O configured as input; IIL = 100 µA 0.6VCC − VCC V tr rise time CL = 30 pF − − 1 µs tf fall time CL = 30 pF − − 1 µs − 00/30/60; note 1 − mA Protections ICC(sd) 1998 Mar 20 shutdown current at pin VCC 24 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler SYMBOL PARAMETER TDA8005A CONDITIONS MIN. TYP. MAX. UNIT Timing tact activation sequence duration − − 225 µs tde deactivation sequence duration − − 150 µs t3(start) start of the window for sending clock to the card − − 130 µs t5(end) end of the window for sending clock to the card 140 − − µs Auxiliary outputs (AUX1 and AUX2) VOL LOW-level output voltage IOL = 5 mA − − 0.4 V VOH HIGH-level output voltage IOH = −5 mA VDD − 1 − − V Output ports from extension (K0 to K5) VOL LOW-level output voltage IOL = 2 mA − − 0.4 V VOH HIGH-level output voltage IOH = −2 mA VDD − 1 − − V Card presence input (pin PRES) VIL LOW-level input voltage IIL = −1 mA − − 0.6 V VIH HIGH-level input voltage IIH = 100 µA 0.7VDD − − V IIH HIGH-level input current VIH = 5 V 0.2 − 3 µA Notes 1. See Table 3 for mask options. 2. The crystal oscillator is the same as option 3 of the P80CL51. 1998 Mar 20 25 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 100 nF +5 V (analog) 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 100 nF 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 from system controller RESET 26 RX TX TDA8005AG 4.7 nF LED2 100 nF 47 nF 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 MMI-EN 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 NC8 NC7 NC6 NC5 C1 C2 C3 C4 K1 K2 +5 V (logic) NC1 NC2 NC3 NC4 C5 C6 C7 C8 Philips Semiconductors 5V (analog) Low-power (3 V/5 V) smart card coupler APPLICATION INFORMATION 1998 Mar 20 KEYBOARD CARD READ UNIT C702 MGL339 100 kΩ R7 1.5 Ω 1.5 Ω Fig.11 Possible GSM application. TDA8005A MMI-CLK MMI-REQ LIS R8 Preliminary specification LED1 4.7 nF handbook, full pagewidth +5 V (logic) This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 47 nF 100 nF 3V 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 100 nF 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 TDA8005AG 47 nF 100 nF 47 nF C8 C7 C6 C5 NC1 NC2 NC3 NC4 C4 C3 C2 C1 NC5 NC6 NC7 NC8 CARD READ UNIT LM01 K1 K2 MGL340 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 27 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Philips Semiconductors VDD Low-power (3 V/5 V) smart card coupler handbook, full pagewidth 1998 Mar 20 KEYBOARD VDD LED1 4.7 nF R6 LED2 33 pF R7 D7 D6 D5 D4 D3 D2 D1 D8 DISPLAY DRIVER AND DISPLAY Fig.12 Possible stand-alone application. Preliminary specification R/W E 33 pF TDA8005A AS 7.15 MHz Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A Mask options Table 3 TDA8005A option choice form FUNCTION DESCRIPTION Table 4 OPTION Description of used options; note 1 OPTION DESCRIPTION P00 1 standard I/O P01 2 open-drain I/O P02 3 push-pull output S set to HIGH state R set to LOW state P03 P04 RSTIN 3S P05 START 3S P06 STROBE 3S P07 ENABLE 3S P10 OFF 2S P24 DATA 1S P25 R/W 3S P26 REG1 3S P27 REG0 3S INT 1S P35 AUX1 3S P36 AUX2 3S Note 1. Example: option 1 S indicates standard I/O, set to HIGH state at power-on. P11 P12 P13 P14 P15 P16 P17 P20 P21 P22 P23 P30 P31 P32 P33 P34 P37 1998 Mar 20 28 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler Table 5 TDA8005A Analog options FEATURES OPTIONS Step-up doubler tripler Supervisor 2.3 V 3V I/O low high impedance 4.5 V I/O pull-up 10 kΩ 20 kΩ 30 kΩ R-CLK 0 100 Ω 150 Ω 200 Ω R-RST 0 80 Ω 130 Ω 180 Ω ALARM active HIGH active LOW PRES active HIGH active LOW IC protection no limitation 30 mA limitation 1998 Mar 20 29 60 mA limitation Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A PACKAGE OUTLINES LQFP64: plastic low profile quad flat package; 64 leads; body 10 x 10 x 1.4 mm SOT314-2 c y X A 48 33 49 32 ZE e E HE A A2 (A 3) A1 wM θ bp pin 1 index 64 Lp L 17 detail X 16 1 ZD e v M A wM bp D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e mm 1.60 0.20 0.05 1.45 1.35 0.25 0.27 0.17 0.18 0.12 10.1 9.9 10.1 9.9 0.5 HD HE 12.15 12.15 11.85 11.85 L Lp v w y 1.0 0.75 0.45 0.2 0.12 0.1 Z D (1) Z E (1) θ 1.45 1.05 7 0o 1.45 1.05 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 95-12-19 97-08-01 SOT314-2 1998 Mar 20 EUROPEAN PROJECTION 30 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm SOT307-2 c y X A 33 23 34 22 ZE e E HE A A2 wM (A 3) A1 θ bp Lp pin 1 index L 12 44 1 detail X 11 wM bp e ZD v M A D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y mm 2.10 0.25 0.05 1.85 1.65 0.25 0.40 0.20 0.25 0.14 10.1 9.9 10.1 9.9 0.8 12.9 12.3 12.9 12.3 1.3 0.95 0.55 0.15 0.15 0.1 Z D (1) Z E (1) 1.2 0.8 1.2 0.8 θ o 10 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 95-02-04 97-08-01 SOT307-2 1998 Mar 20 EUROPEAN PROJECTION 31 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler If wave soldering cannot be avoided, for LQFP and QFP packages with a pitch (e) larger than 0.5 mm, the following conditions must be observed: SOLDERING Introduction • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • The footprint must be at an angle of 45° to the board direction and must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Reflow soldering Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Reflow soldering techniques are suitable for all LQFP and QFP packages. The choice of heating method may be influenced by larger plastic QFP packages (44 leads, or more). If infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. For more information, refer to the Drypack chapter in our “Quality Reference Handbook” (order code 9397 750 00192). A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 50 and 300 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 °C. Wave soldering Wave soldering is not recommended for LQFP and QFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. CAUTION Wave soldering is NOT applicable for all LQFP and QFP packages with a pitch (e) equal or less than 0.5 mm. 1998 Mar 20 TDA8005A 32 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler TDA8005A DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Mar 20 33 Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler NOTES 1998 Mar 20 34 TDA8005A Philips Semiconductors Preliminary specification Low-power (3 V/5 V) smart card coupler NOTES 1998 Mar 20 35 TDA8005A Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, Fax. +43 160 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstraße 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SÃO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2686, Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com © Philips Electronics N.V. 1998 SCA57 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 435102/1200/01/pp36 Date of release: 1998 Mar 20 Document order number: 9397 750 02512