INTEGRATED CIRCUITS DATA SHEET TDA8008 Dual multiprotocol smart card coupler Objective specification File under Integrated Circuits, IC02 1999 Dec 14 Philips Semiconductors Objective specification Dual multiprotocol smart card coupler TDA8008 • Chip select input allowing use of several devices in parallel and memory space paging FEATURES • 8xC51 core with 16 kbytes or EPROM (TDA8008), 256 bytes RAM, 512 bytes AUXRAM, Timer 0, 1, 2 and enhanced UART • Enhanced ESD protections on card contacts (6 kV min.) • Software library for easy integration within the application • Specific ISO 7816 UART, accessible with MOVX instructions for automatic convention processing, variable baud rate through frequency or division ratio programming, error management at character level for T = 0 protocol, extra guard time register • Development tool with a TDA8007B and a regular emulator. APPLICATIONS • Dual VCC generation (5 V ±5% or 3 V ±5%), maximum current of 60 mA with controlled rise and fall times • Multiple smart card readers for multiprotocol applications (EMV banking, digital pay TV, access control, etc.). • Dual cards clock generation (up to 10 MHz) with two times synchronous frequency doubling • Cards clock STOP HIGH or LOW or 1.25 MHz (from an integrated oscillator) for cards power reduction mode GENERAL DESCRIPTION • Automatic activation and deactivation sequences through an independent sequencer The TDA8008 is a complete, one-chip, low cost dual smart card coupler. • Supports the asynchronous protocols T = 0 and T = 1 in accordance with ISO 7816 and EMV It can be used as the kernel of a multiple card reader. It can handle all ISO 7816, EMV and GSM11-11 requirements. The integrated ISO 7816 UART and the time-out counters allow easy use even at high baud rates with no real time constraints. Due to its chip select and external I/O and interrupt features, it simplifies the realization of any number of cards reader. It gives the cards and the set a very high level of security, due to its special hardware against ESD, short-circuiting, power failure and overheating. Its integrated step-up converter allows operation within a supply voltage range of 2.7 to 5.5 V at 16 MHz. • Versatile 24-bit time-out counter for Answer To Reset (ATR) and waiting times processing • 22 ETU counter for block guard time • Supports synchronous cards • Current limitations on cards contacts • Special circuitry for killing spikes during power-on or off • Supply supervisor for Power-on reset • Step-up converter (supply voltage from 2.7 to 5.5 V at 16 MHz), doubler, tripler or follower according to VCC and VDD The OTP version of the TDA8008 allows fast and reliable software development and fast product introduction. • Speed up to 25 MHz at VDD = 5 V A software library has been developed, that can handle all actions required for T = 0, T = 1 and synchronous protocols. • Additional I/O pin allowing the use of the ISO 7816 UART for an external card interface (pin IOAUX) • Additional interrupt pin allowing detection of level toggling on an external signal (pin INTAUX) • Fast and efficient swapping between the 3 cards due to separate buffering of parameters for each card ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA8008HL 1999 Dec 14 LQFP80 DESCRIPTION plastic low profile quad flat package; 80 leads; body 12 × 12 × 1.4 mm 2 VERSION SOT315-1 Philips Semiconductors Objective specification Dual multiprotocol smart card coupler TDA8008 QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT 2.7 − 5.5 V − − tbf µA supply current in sleep mode VDD = 3.3 V; cards active at − VCC = 5V; clock stopped; 8xC51 controller in Idle mode; note 1 − tbf mA IDD(om) supply current in operating mode VDD = 3.3 V; fXTAL1 = 20 MHz VCC1 = VCC2 = 5 V; ICC1 + ICC2 = 80 mA; note 1 − − tbf mA VCC card output supply voltage including static loads (5 V card) 4.75 5.0 5.25 V with 40 nAs dynamic loads on 200 nF capacitor (5 V card) 4.6 5.0 5.4 V including static loads (3 V card) 2.80 3.0 3.20 V with 40 nAs dynamic loads on 200 nF capacitor (3 V card) 2.75 3.0 3.25 V operating − − 65 mA overload detection − 80 − mA − − 80 mA VDD supply voltage IDD(pd) supply current in Power-down mode VDD = 3.3 V; cards inactive; 8xC51 controller in power-down mode; note 1 IDD(sm) ICC card output supply current VDDD = VDDA = VDDP ICC1 + ICC2 sum of both cards currents SR slew rate on VCC (rise and fall) 0.10 0.16 0.22 V/µs tde deactivation cycle duration − − 100 µs tact activation cycle duration − − 225 µs fXTAL crystal frequency 3.5 − 25 MHz fop operating frequency 0 − 25 MHz Tamb ambient temperature −25 − +85 °C CL = 300 nF (max.) external frequency applied to pin XTAL1 Note 1. IDD in all configurations includes the current at pins VDDD, VDDA and VDDP. 1999 Dec 14 3 Philips Semiconductors Objective specification Dual multiprotocol smart card coupler TDA8008 BLOCK DIAGRAM RSTOUT EA/VPP PSEN ALE/PROG 18 24 25 16 SAM SBP 6 SAP 52 3 200 nF 200 nF SBM 51 RESET CDELAY GNDD VDDD handbook, full pagewidth SUPPLY 39 SUPERVISOR STEP-UP CONVERTER 63 41 to 48 34 33 TIMER 0, 1 and 2 P10 to P17 8 ISO 7816 UART ENHANCED UART P30 to P37 ANALOG 8 TDA8008 P20 to P27 CLOCK CIRCUITRY 53 to 62 27 AND 15 14 ALE P36/WR 47 P37/RD 48 INTAUX IOAUX CS INTERFACE CONTROL 67 to 74 512 BYTES AUXRAM BY MOVX 13 12 11 10 9 8 5 XTAL OSCILLATOR INTERNAL OSCILLATOR 35 37 38 32 31 30 29 28 DRIVERS SEQUENCER P00 to P07 GNDP VUP 4 256 BYTES RAM 75 to 80, 1, 2 17 200 nF TIME-OUT COUNTER 16 KBYTES ROM or OTP 64 VDDP 26 8xC51 CONTROLLER 65 23 19 to 22, 40, 58, 59, 66 50 VDDA I/01 C81 PRES1 C41 RST1 VCC1 CLK1 GNDC1 GNDC2 CLK2 VCC2 RST2 C42 C82 I/02 PRES2 GNDA XTAL1 49 36 7 XTAL2 TEST INHIB n.c. FCE568 Fig.1 Block diagram. 1999 Dec 14 4 Philips Semiconductors Objective specification Dual multiprotocol smart card coupler TDA8008 PINNING SYMBOL PIN DESCRIPTION P16 1 8xC51 general purpose I/O port P17 2 8xC51 general purpose I/O port RESET 3 reset input: a HIGH on this pin for 2 machine cycles while the oscillator is running, resets the device. An internal diffused resistor connected to GNDD permits a Power-on reset using an external capacitor connected to VDDD. VDDA 4 analog supply voltage GNDA 5 analog ground CDELAY 6 pin for an external delay capacitor INHIB 7 test pin (must be left open-circuit in the application) PRES2 8 card 2 presence contact input (active HIGH or LOW by mask option) IO2 9 data line to/from card 2 (ISO C7 contact) C82 10 auxiliary I/O for ISO C8 contact for card 2 (i.e. synchronous cards) C42 11 auxiliary I/O for ISO C4 contact for card 2 (i.e. synchronous cards) RST2 12 card 2 reset output (ISO C2 contact) VCC2 13 card 2 output supply voltage (ISO C1 contact) CLK2 14 clock output of card 2 (ISO C3 contact) GNDC2 15 ground for card 2 SAM 16 contact 2 for the step-up converter (connect a low ESR 220 nF capacitor between pins SAP and SAM) GNDP 17 ground for the step-up converter SBM 18 contact 4 for the step-up converter (connect a low ESR 220 nF capacitor between pins SBP and SBM) n.c. 19 not connected n.c. 20 not connected n.c. 21 not connected n.c. 22 not connected VDDP 23 supply voltage for the step-up converter SBP 24 contact 3 for the step-up converter (connect a low ESR 220 nF capacitor between pins SBP and SBM) SAP 25 contact 1 for the step-up converter (connect a low ESR 220 nF capacitor between pins SAP and SAM) VUP 26 output of the step-up converter GNDC1 27 ground for card 1 CLK1 28 clock output of card 1 (ISO C3 contact) VCC1 29 card 1 output supply voltage (ISO C1 contact) RST1 30 card 1 reset output (ISO C2 contact) C41 31 auxiliary I/O for ISO C4 contact for card 1 (i.e. synchronous cards) PRES1 32 card 1 presence contact input (active HIGH or LOW by mask option) C81 33 auxiliary I/O for ISO C8 contact for card 1 (i.e. synchronous cards) IO1 34 data line to and from card 1 (ISO C7 contact) INTAUX 35 auxiliary interrupt input 1999 Dec 14 5 Philips Semiconductors Objective specification Dual multiprotocol smart card coupler SYMBOL PIN TDA8008 DESCRIPTION TEST 36 test pin (must be left open-circuit in the application) IOAUX 37 input or output for an I/O line issued on an auxiliary smart card interface CS 38 chip select input (active LOW) RSTOUT 39 open-drain output for resetting external chips n.c. 40 not connected P30/RXD 41 8xC51 general purpose I/O port/serial input port P31/TXD 42 8xC51 general purpose I/O port/serial output port P32/INT0 43 8xC51 general purpose I/O port/external interrupt 0 P33/INT1 44 8xC51 general purpose I/O port/external interrupt 1 P34/T0 45 8xC51 general purpose I/O port/Timer 0 external input P35/T1 46 8xC51 general purpose I/O port/Timer 1 external input P36/WR 47 8xC51 general purpose I/O port/external data memory write strobe P37/RD 48 8xC51 general purpose I/O port/external data memory read strobe XTAL2 49 connection pin for an external crystal (output from the inverting oscillator amplifier) XTAL1 50 connection pin for an external crystal, or input for an external clock signal (input to the inverting oscillator amplifier and input to the internal clock generator circuits) VDDD 51 digital supply voltage GNDD 52 digital ground P20/A8 53 8xC51 general purpose I/O port/address 8 P21/A9 54 8xC51 general purpose I/O port/address 9 P22/A10 55 8xC51 general purpose I/O port/address 10 P23/A11 56 8xC51 general purpose I/O port/address 11 P24/A12 57 8xC51 general purpose I/O port/address 12 n.c. 58 not connected n.c. 59 not connected P25/A13 60 8xC51 general purpose I/O port/address 13 P26/A14 61 8xC51 general purpose I/O port/address 14 P27/A15 62 8xC51 general purpose I/O port/address 15 PSEN 63 Program store enable output: this is the read strobe to the external program memory. When executing code from the external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. PSEN is not activated during fetches from internal program memory. ALE/PROG 64 Address latch enable/program pulse: this is the output pulse for latching the low byte of the address during an access to external memory. In normal operation, ALE pulses are emitted at a constant rate of 1⁄6 of the oscillator frequency and can be used for external timing or clocking. It should be noted that one ALE pulse is skipped during each access to external data memory. This pin is also the program pulse input (PROG) during EPROM programming. ALE can be disabled by setting bit SFR Auxiliary 0. With this bit set, ALE will be active only during a MOVX instruction. 1999 Dec 14 6 Philips Semiconductors Objective specification Dual multiprotocol smart card coupler SYMBOL TDA8008 PIN DESCRIPTION EA/VPP 65 External access enable/programming supply voltage: EA must be externally held LOW to enable the device to fetch code from external program memory locations starting with 0000H. If EA is held HIGH, the device executes from the internal program memory unless the program counter contains an address greater than 3FFFH (16 kbytes boundary). This pin also receives the 12.75 V programming supply voltage (VPP) during EPROM programming. If security bit 1 is programmed, EA will be internally latched on reset. n.c. 66 not connected P07/AD7 67 8xC51 general purpose I/O port/address/data 7 P06/AD6 68 8xC51 general purpose I/O port/address/data 6 P05/AD5 69 8xC51 general purpose I/O port/address/data 5 P04/AD4 70 8xC51 general purpose I/O port/address/data 4 P03/AD3 71 8xC51 general purpose I/O port/address/data 3 P02/AD2 72 8xC51 general purpose I/O port/address/data 2 P01/AD1 73 8xC51 general purpose I/O port/address/data 1 P00/AD0 74 8xC51 general purpose I/O port/address/data 0 P10/T2 75 8xC51 general purpose I/O port/timer, counter 2 external count input and clock output P11/T2EX 76 8xC51 general purpose I/O port/timer, counter 2 reload, capture and direction control P12 77 8xC51 general purpose I/O port P13 78 8xC51 general purpose I/O port P14 79 8xC51 general purpose I/O port P15 80 8xC51 general purpose I/O port 1999 Dec 14 7 Philips Semiconductors Objective specification 41 P30/RXD 42 P31/TXD 43 P32/INT0 44 P33/INT1 45 P34/T0 46 P35/T1 47 P36/WR 48 P37/RD 49 XTAL2 TDA8008 50 XTAL1 51 VDDD 52 GNDD 53 P20/A8 54 P21/A9 55 P22/A10 56 P23/A11 57 P24/A12 58 n.c. 59 n.c. handbook, full pagewidth 60 P25/A13 Dual multiprotocol smart card coupler P26/A14 61 40 n.c. P27/A15 62 39 RSTOUT PSEN 63 38 CS ALE/PROG 64 37 IOAUX EA/VPP 65 36 TEST n.c. 66 35 INTAUX P07/AD7 67 34 IO1 P06/AD6 68 33 C81 P05/AD5 69 32 PRES1 31 C41 P03/AD3 71 30 RST1 P02/AD2 72 29 VCC1 P01/AD1 73 28 CLK1 P00/AD0 74 27 GNDC1 P10/T2 75 26 VUP P11/T2EX 76 25 SAP P12 77 24 SBP P13 78 23 VDDP P14 79 22 n.c. P15 80 21 n.c. P04/AD4 70 Fig.2 Pin configuration. 1999 Dec 14 8 n.c. 20 n.c. 19 SBM 18 GNDP 17 SAM 16 GNDC2 15 CLK2 14 VCC2 13 RST2 12 7 INHIB C42 11 6 CDELAY C82 10 5 GNDA 9 4 VDDA IO2 3 RESET 8 2 P17 PRES2 1 P16 TDA8008HL FCE569 Philips Semiconductors Objective specification Dual multiprotocol smart card coupler TDA8008 PACKAGE OUTLINE LQFP80: plastic low profile quad flat package; 80 leads; body 12 x 12 x 1.4 mm SOT315-1 c y X A 60 41 40 Z E 61 e E HE A A2 (A 3) A1 w M θ bp L pin 1 index 80 Lp 21 detail X 20 1 ZD e v M A w M bp D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e mm 1.6 0.16 0.04 1.5 1.3 0.25 0.27 0.13 0.18 0.12 12.1 11.9 12.1 11.9 0.5 HD HE 14.15 14.15 13.85 13.85 L Lp v w y 1.0 0.75 0.30 0.2 0.15 0.1 Z D (1) Z E (1) θ 1.45 1.05 7 0o 1.45 1.05 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 95-12-19 97-07-15 SOT315-1 1999 Dec 14 EUROPEAN PROJECTION 9 Philips Semiconductors Objective specification Dual multiprotocol smart card coupler • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 1999 Dec 14 TDA8008 10 Philips Semiconductors Objective specification Dual multiprotocol smart card coupler TDA8008 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 545004/01/pp12 Date of release: 1999 Dec 14 Document order number: 9397 750 06532