INTEGRATED CIRCUITS DATA SHEET UBA2070 600 V CCFL ballast driver IC Product specification Supersedes data of 2001 Sep 27 2002 Oct 24 Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 FEATURES GENERAL DESCRIPTION • Current controlled operation The UBA2070 is a high voltage integrated circuit for driving electronically ballasted Cold Cathode Fluorescent Lamps (CCFL) at mains voltages up to 277 V (RMS) (nominal value). The circuit is made in a 650 V Bipolar CMOS DMOS (BCD) power logic process. The UBA2070 provides the drive function for the two discrete MOSFETs. Besides the drive function the UBA2070 also includes the level-shift circuit, the oscillator function, a lamp voltage monitor, a current control function, a timer function and protections. • Adaptive non-overlap time control • Integrated high voltage level shift function • Power-down function • Protected against lamp failures or lamp removal • Capacitive mode protection. APPLICATION • The circuit topology enables a broad range of backlight inverters. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION UBA2070T SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 UBA2070P DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 2002 Oct 24 2 Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 QUICK REFERENCE DATA SYMBOL PARAMETER CONDITION MIN. TYP. MAX. UNIT High voltage supply Vhs high side supply voltage Ihs < 30 µA; t < 1 s − − 600 V Start-up state VDD(high) oscillator start voltage 12.4 13 13.6 V VDD(low) oscillator stop voltage 8.6 9.1 9.6 V IDD(start) start-up current VDD < VDD(high) − 170 200 µA IL = 10 µA 2.86 2.95 3.04 V Reference voltage (pin VREF) Vref reference voltage Voltage controlled oscillator fbridge(max) maximum bridge frequency 90 100 110 kHz fbridge(min) minimum bridge frequency 38.9 40.5 42.1 kHz Output drivers (pins GH and GL) Isource source current VGH − VSH = 0; VGL = 0 135 180 235 mA Isink sink current VGH − VSH = 13 V; VGL = 13 V 265 300 415 mA Lamp voltage sensor (pin LVS) VLVS(fail) fail voltage level 1.19 1.25 1.31 V VLVS(max) maximum voltage level 1.67 1.76 1.85 V Average current sensor (pin CS) Voffset offset voltage VCS = 0 to 2.5 V −2 0 +2 mV gm transconductance f = 1 kHz 100 200 400 µA/mV Ignition timer (pin CT) VOL LOW-level output voltage − 1.4 − V VOH HIGH-level output voltage − 3.6 − V 2002 Oct 24 3 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 9 SUPPLY n.c. reference voltages 8 digital VDD(clamp) FVDD BOOTSTRAP LEVEL SHIFTER supply (5 V) HS DRIVER 10 GH analog 11 SH VDD(low) GND LS DRIVER DRIVER LOGIC 5 6 GL reset IGNITION TIMER Philips Semiconductors 3 V 14 600 V CCFL ballast driver IC 7 BLOCK DIAGRAM VREF dbook, full pagewidth 2002 Oct 24 VDD STATE LOGIC 4 LOGIC CT • reset state • ignition state • burn state • hold state • powerdown state 12 ANT/CMD ACM 1 LOGIC VOLTAGE CONTROLLED OSCILLATOR REFERENCE CURRENT VLVS(fail) 13 CS − FREQUENCY CONTROL 2 MGT990 IREF CF LVS Fig.1 Block diagram. CSW Product specification 3 VLVS(max) CS + 16 AVERAGE CURRENT SENSOR I V 15 UBA2070 4 LAMP VOLTAGE SENSOR Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 PINNING SYMBOL PIN DESCRIPTION CT 1 ignition timer output CSW 2 voltage controlled oscillator input CF 3 voltage controlled oscillator output IREF 4 internal reference current input GND 5 ground GL 6 gate of the low side switch output VDD 7 low voltage supply n.c. 8 not connected FVDD 9 floating supply; supply for the high side switch GH 10 gate of the high side switch output SH 11 source of the high side switch ACM 12 capacitive mode input LVS 13 lamp voltage sensor input VREF 14 reference voltage output CS+ 15 average current sensor positive input CS− 16 average current sensor negative input handbook, halfpage CT 1 16 CS − CSW 2 15 CS + 14 VREF CF 3 IREF 4 handbook, halfpage CSW 2 15 CS + IREF 4 13 LVS 12 ACM 14 VREF 13 LVS UBA2070P GND 5 12 ACM GL 6 11 SH GL 6 11 SH VDD 7 10 GH VDD 7 10 GH n.c. 8 9 FVDD n.c. 8 MGT985 9 FVDD MGT984 Fig.2 Pin configuration (SO16). 2002 Oct 24 16 CS − CF 3 UBA2070T GND 5 CT 1 Fig.3 Pin configuration (DIP16). 5 Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 FUNCTIONAL DESCRIPTION Ignition state Start-up state After the start at fmax the frequency will decrease due to charging the capacitor at pin CSW with an internally fixed current. During this continuous decrease in frequency, the circuit approaches the resonant frequency of the lamp. This will cause a high voltage across the lamp, which ignites the lamp. The ignition voltage of the lamp is designed to be above the VLVS(fail) level. If the lamp voltage exceeds this voltage level the ignition timer is started (see Fig.5). Initial start-up can be achieved by charging CVDD using an external start-up resistor. The start-up of the circuit is such, that the MOSFETs Tls and Ths shall be non-conductive. The circuit will be reset in the start-up state. If the VDD supply reaches the value of VDD(high) the circuit starts oscillating. A DC reset circuit is incorporated in the high side (hs) driver. Below the lockout voltage at pin FVDD the output voltage (VGH − VSH) is zero. The voltages at pins CF and CT are zero during the start-up state. Burn state Oscillation If the lamp voltage does not exceed the VLVS(max) level the voltage at pin CSW will continue to increase until the clamp level at pin CSW is reached. As a consequence the frequency will decrease until the minimum frequency is reached. When the frequency reaches its minimum level it is assumed that the lamp has ignited, the circuit will enter the burn state and the Average Current Sensor (ACS) circuit will be enabled (see Fig.5). As soon as the average voltage across Rsense (measured at pin CS−) reaches the reference level at pin CS+, the average current sensor circuit will take over the control of the lamp current. The average current through Rsense is transferred to a voltage at the voltage controlled oscillator to regulate the frequency and, as a result, the lamp current. The internal oscillator is a Voltage Controlled Oscillator circuit (VCO) which generates a sawtooth waveform between the high level at pin CF and 0 V (see Fig.4). The frequency of the sawtooth is determined by CCF, RIREF and the voltage at pin CSW. The minimum and maximum frequencies are determined by CCF and RIREF. The minimum to maximum ratio is fixed internally. The sawtooth frequency is twice the half bridge frequency. The IC brings the MOSFETs Ths and Tls alternately into conduction with a duty factor of 50%.The oscillator starts oscillating at fmax. During the first switching cycle the MOSFET Tls is switched on. To charge the bootstrap capacitor the first conduction time after the start-up state is made extra long. In all other cases the duty factor at the start is 50%. Lamp failure DURING IGNITION STATE Non-overlap time If the lamp fails to ignite, the voltage level increases. When the lamp voltage exceeds the VLVS(max) level, the voltage will be regulated at that level. The ignition timer is started when the VLVS(fail) level is exceeded. If the voltage at pin LVS is above the VLVS(fail) level at the end of the ignition time the circuit stops oscillation and is forced into a Power-down state (see Fig.6). This state is terminated by switching off the VDD supply. The non-overlap time is realized with an Adaptive Non-Overlap circuit (ANT). By using this circuit, the application determines the duration of the non-overlap time (determined by the slope of the half bridge voltage and detected by the signal across RACM) and makes the non-overlap time optimum for each frequency (see Fig.4). The minimum non-overlap time is internally fixed. The maximum non-overlap time is internally fixed at approximately 25% of the bridge period time. DURING BURN STATE If the lamp fails during normal operation, the voltage across the lamp will increase and the lamp voltage will exceed the VLVS(fail) level. This forces the circuit to re-enter the ignition state and results in an attempt to re-ignite the lamp. If during restart the lamp still fails, the voltage remains high until the end of the ignition time. At the end of the ignition time the circuit stops oscillating and enters the Power-down state (see Fig.7). Timing circuit A timing circuit is included (a clock generator) to determine the maximum ignition time. The ignition time is defined as 1 pulse at pin CT; the lamp has to ignite within the duration of this pulse. The timer circuit starts operating when a critical value of the lamp voltage [VLVS(fail)] is exceeded. When the timer is not operating the capacitor at pin CT is discharged by 1 mA to 0 V. 2002 Oct 24 6 Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 handbook, full pagewidth MGT989 CF 0 GH-SH 0 GL 0 Vhalf bridge 0 VACM VCMD + 0 VCMD − t Fig.4 Oscillator and driver timing. handbook, full pagewidth VLVS Ignition state Burn state VLVS(max) f min detection VLVS(fail) Timer on start timer stop timer off t Fig.5 Normal ignition behaviour. 2002 Oct 24 7 MGT986 Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 handbook, full pagewidth VLVS Ignition state Power-down VLVS(max) VLVS(fail) Timer on start timer off t MGT987 Fig.6 Lamp failure during ignition state. handbook, full pagewidth VLVS Burn state Ignition Power-down VLVS(max) VLVS(fail) Timer on start timer off t Fig.7 Lamp failure during burn state. 2002 Oct 24 8 MGT988 Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 Power-down state Charge coupling The Power-down state will be entered if, at the end of the ignition time, the voltage at pin LVS is above VLVS(fail). In the Power-down state the oscillation will be stopped and MOSFETs Ths and Tls will be non-conductive. The VDD supply is internally clamped. The circuit is released from the Power-down state by reducing the supply voltage to below VDD(reset). Due to parasitic capacitive coupling to the high voltage circuitry all pins are charged with a repetitive charge injection. Given the typical application the pins IREF and CF are sensitive to this charge injection. For charge coupling of ±8 pC, a safe functional operation of the IC is guaranteed, independent of the current level. Charge coupling at current levels below 50 µA will not interfere with the accuracy of the VCS and VACM levels. Capacitive mode protection Charge coupling at current levels below 20 µA will not interfere with the accuracy of any parameter. The signal across RACM also gives information about the switching behaviour of the half bridge. If the voltage at RACM does not exceed the VCMD level during the non-overlap time (see Fig.4), the Capacitive Mode Detection (CMD) circuit assumes that the circuit is in capacitive mode of operation. Consequently the frequency will be directly increased to fmax. In this event the frequency behaviour is decoupled from the voltage at pin CSW until the voltage is discharged to zero. An internal filter of 30 ns is included at pin ACM to increase the noise immunity. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); all voltages referenced to ground. SYMBOL Vhs PARAMETER high side supply voltage CONDITION MIN. MAX. UNIT Ihs < 30 µA; t < 1 s − 600 V Ihs < 30 µA − 510 V VACM voltage on pin ACM −5 +5 V VLVS voltage on pin LVS 0 5 V VCS+ voltage on pin CS+ 0 5 V VCS− voltage on pin CS− −0.3 +5 V VCSW voltage on pin CSW 0 5 V Tamb ambient temperature −25 +80 °C Tj junction temperature −25 +150 °C Tstg storage temperature −55 +150 °C Vesd electrostatic discharge voltage pins FVDD, GH, SH and VDD −1000 +1000 V pins GL, ACM, CS+, CS−, CSW, LVS, CF, IREF, CT and VREF −2500 +2500 V note 1 Note 1. In accordance with the human body model: equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor. 2002 Oct 24 9 Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 THERMAL CHARACTERISTICS SYMBOL Rth(j-a) Rth(j-t) PARAMETER DESCRIPTION VALUE UNIT SO16 100 K/W DIP16 60 K/W SO16 50 K/W DIP16 30 K/W thermal resistance from junction to ambient in free air thermal resistance from junction to tie-point QUALITY SPECIFICATION In accordance with “SNW-FQ-611D”. CHARACTERISTICS VDD = 13 V, VFVDD − VSH = 13 V; Tamb = 25 °C; all voltages referenced to ground; see Fig.8; unless otherwise specified. SYMBOL PARAMETER CONDITION MIN. TYP. MAX. UNIT High voltage supply IL leakage current on high voltage pins voltage at pins FVDD, GH and SH = 600 V − − 30 µA − − 6 V Start-up state (pin VDD) VDD supply voltage for defined driver output Ths = off; Tls = off VDD(high) oscillator start voltage 12.4 13 13.6 V VDD(low) oscillator stop voltage 8.6 9.1 9.6 V VDD(hys) start-stop hysteresis voltage 3.5 3.9 4.4 V IDD(start) start-up current VDD < VDD(high) − 170 200 µA VDD(clamp) clamp voltage Power-down mode 10 11 12 V IDD(pd) Power-down current VDD = 9 V − 170 200 µA VDD(reset) reset voltage Ths = off; Tls = off 4.5 5.5 7 V IDD operating supply current fbridge = 40 kHz without gate drive − 1.5 2.2 mA IL = 10 µA 2.86 2.95 3.04 V Reference voltage (pin VREF) Vref reference voltage Iref reference current source 1 − − mA sink 1 − − mA Zo output impedance IL = 1 mA source − 3 − Ω ∆Vref/∆T temperature coefficient of Vref IL = 10 µA; Tamb = 25 to 150 °C − −0.64 − %/K Current supply (pin IREF) VI input voltage − 2.5 − V II input current 65 − 95 µA 2002 Oct 24 10 Philips Semiconductors Product specification 600 V CCFL ballast driver IC SYMBOL UBA2070 PARAMETER CONDITION MIN. TYP. MAX. UNIT Voltage controlled oscillator tstart first output oscillator stroke − 50 − µs fbridge(max) maximum bridge frequency 90 100 110 kHz fbridge(min) minimum bridge frequency 38.9 40.5 42.1 kHz ∆fstab frequency stability Tamb = −20 to +80 °C − 1.3 − % tno(min) minimum non-overlap time GH to GL 0.68 0.90 1.13 µs GL to GH 0.75 1 1.25 µs at fbridge = 40 kHz; note 1 − 6.7 − µs 2.7 3 3.3 V 2.8 3.1 3.4 V tno(max) maximum non-overlap time after start-up state only PIN CSW Vi input voltage Vclamp clamp voltage burn state PIN CF Istart start current VCF = 1.5 V 3.8 4.5 5.2 µA Imin minimum current VCF = 1.5 V − 21 − µA Imax maximum current VCF = 1.5 V − 54 − µA VOH HIGH-level output voltage f = fmin − 2.5 − V Vboot bootstrap diode forward drop I = 5 mA 1.3 1.7 2.1 V VFVDD lockout voltage on pin FVDD 2.8 3.5 4.2 V IFVDD floating well supply current on pin FVDD DC level at VGH − VSH = 13 V − 35 − µA Isource source current VGH − VSH = 0; VGL = 0 135 180 235 mA Isink sink current VGH − VSH = 13 V; VGL = 13 V 265 300 415 mA VOH HIGH-level output voltage Io = 10 mA 12.5 − − V VOL LOW-level output voltage Io = 10 mA − − 0.5 V Output drivers PINS GH AND GL HIGH SIDE AND LOW SIDE Ron on resistance Io = 10 mA 32 39 45 Ω Roff off resistance Io = 10 mA 16 21 26 Ω Adaptive non-overlap timing and capacitive mode detection (pin ACM) Ii input current VACM = 1.25 V − − 1 µA Vdet capacitive mode detection voltage positive 80 100 120 mV negative −68 −85 −102 mV 2002 Oct 24 11 Philips Semiconductors Product specification 600 V CCFL ballast driver IC SYMBOL UBA2070 PARAMETER CONDITION MIN. TYP. MAX. UNIT Lamp voltage sensor (pin LVS) Ii input current − − 1 µA VLVS(fail) fail voltage 1.19 1.25 1.31 V VLVS(fail)(hys) fail voltage hysteresis 112 140 168 mV VLVS = 1.25 V ∆VLVS(fail)(hys)/∆T temperature coefficient hysteresis − 0.65 − mV/K VLVS(max) maximum voltage 1.67 1.76 1.85 V Io(sink) output sink current VCSW = 2 V 2.8 3.2 3.6 µA Io(source)(ign) ignition output source current VCSW = 2 V 9.0 10 11 µA Average current sensor (pins CS+ and CS−) Ii input current VCS = 0 V − − 1 µA Voffset offset voltage VCS = 0 to 2.5 V −2 0 +2 mV Io(source) output source current VCSW = 2.0 V 9.0 10 11 µA Io(sink) output sink current VCSW = 2.0 V 9.0 10 11 µA gm transconductance f = 1 kHz 100 200 400 µA/mV Ignition timer (pin CT) Io output current 5.5 5.9 6.3 µA VOL LOW-level output voltage − 1.4 − V VOH HIGH-level output voltage − 3.6 − V Vhys output hysteresis 2.05 2.20 2.35 V tign ignition time − 0.257 − s VCT = 2.5 V Note 1. The maximum non-overlap time is determined by the level of the CF signal. If this signal exceeds a level of 1.25 V the non-overlap will end. This equals a maximum non-overlap time of 6.7 µs at a bridge frequency of 40 kHz. 2002 Oct 24 12 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 10 GH BOOTSTRAP HIGH SIDE DRIVER VDD 7 R GH CDC 220 nF Ths 47 Ω 11 SH CBR1 13 VDC 300 V Tls CBR2 18 nF RACM 1.5 Ω CT 1 CAPACITIVE MODE DETECTOR IGNITION TIMER 47 pF 1 nF 47 Ω ADAPTIVE NON-OVERLAP TIMING UBA2070 + 6 GL LOW SIDE DRIVER C lamp2 47 pF Lamp1 DRIVER CONTROL SUPPLY R GL C lamp1 Cres1 1 nF ZVDD 13 V Lamp2 C boot 100 nF Philips Semiconductors 9 FVDD 600 V CCFL ballast driver IC DVDD 470 kΩ APPLICATION AND TEST INFORMATION ndbook, full pagewidth 2002 Oct 24 R VDD Cres2 1 nF 12 ACM C LVS1 CVDD 8.2 nF 1 µF LAMP VOLTAGE SENSOR DIVIDER VOLTAGE CONTROLLED OSCILLATOR REFERENCE CURRENT AVERAGE CURRENT SENSOR C LVS3 − + 4 5 3 2 14 IREF GND CF CSW VREF R pwr1 C CT R IREF C CF CCSW 330 nF 33 kΩ 100 pF 220 nF D LVS1 13 LVS 220 kΩ 16 CS − R avg 15 CS + 8.2 kΩ Cavg 12 nF Cpwr R pwr2 1 nF 8.2 kΩ 56 nF R LVS 150 kΩ C LVS2 DLVS2 8.2 nF Rsense 2.2 Ω UBA2070 Fig.8 Test application circuit. Product specification MGT991 Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 PACKAGE OUTLINES SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.050 0.039 0.016 0.028 0.020 0.01 0.01 0.004 0.028 0.012 inches 0.244 0.041 0.228 θ Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 2002 Oct 24 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-05-22 99-12-27 14 o 8 0o Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 DIP16: plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 ME seating plane D A2 A A1 L c e Z b1 w M (e 1) b MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.7 0.51 3.7 1.40 1.14 0.53 0.38 0.32 0.23 21.8 21.4 6.48 6.20 2.54 7.62 3.9 3.4 8.25 7.80 9.5 8.3 0.254 2.2 inches 0.19 0.020 0.15 0.055 0.045 0.021 0.015 0.013 0.009 0.86 0.84 0.26 0.24 0.10 0.30 0.15 0.13 0.32 0.31 0.37 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC EIAJ SOT38-1 050G09 MO-001 SC-503-16 2002 Oct 24 15 EUROPEAN PROJECTION ISSUE DATE 95-01-19 99-12-27 Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C for small/thin packages. SOLDERING Introduction This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). WAVE SOLDERING There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: Through-hole mount packages • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING BY DIPPING OR BY SOLDER WAVE The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. MANUAL SOLDERING Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Surface mount packages Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REFLOW SOLDERING Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. MANUAL SOLDERING Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. 2002 Oct 24 16 Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 Suitability of IC packages for wave, reflow and dipping soldering methods MOUNTING SOLDERING METHOD PACKAGE(1) WAVE suitable(3) Through-hole mount DBS, DIP, HDIP, SDIP, SIL Surface mount REFLOW(2) DIPPING − suitable suitable − HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS not suitable(4) suitable − PLCC(5), SO, SOJ suitable suitable − suitable − suitable − BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable recommended(5)(6) LQFP, QFP, TQFP not SSOP, TSSOP, VSO not recommended(7) Notes 1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 3. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 6. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 7. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2002 Oct 24 17 Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2002 Oct 24 18 Philips Semiconductors Product specification 600 V CCFL ballast driver IC UBA2070 NOTES 2002 Oct 24 19 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA74 © Koninklijke Philips Electronics N.V. 2002 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613502/02/pp20 Date of release: 2002 Oct 24 Document order number: 9397 750 10257