PTMA180402M Confidential, Limited Internal Distribution Wideband RF LDMOS Integrated Power Amplifier 40 W, 28 V, 1800 – 2100 MHz Description The PTMA180402M is a matched, wideband, 2-stage, 40-watt LDMOS integrated amplifier intended for base station applications in the 1800 to 2100 MHz frequency band. This device is offered in a 20-pin, thermally-enhanced, overmolded plastic package for cool and reliable operation. Features Broadband Performance VDD = 28 V, IDQ 1 = 160 mA, IDQ 2 = 360 mA, Fixture tuned for 1930 - 1990 MHz 34 5 30 PTMA180402M Package PG-DSO-20-63 • Designed for wide RF bandwidth and low memory effects • On-chip matching, integrated input DC block, 50-ohm input and ~4-ohm output • Typical single-carrier CDMA performance at 1960 MHz, 28 V - Average output power = 5 W - Linear gain = 30 dB - Efficiency = 16% - Adjacent channel power = –52 dBc • Typical two-tone CW performance at 1960 MHz, 28 V - Output power (PEP) = 40 W at IMD3 = –30 dBc - Efficiency = 34% • Capable of handling 10:1 VSWR @ 28 V, 40 W (CW) output power • Integrated ESD protection. Meets HBM Class 1B (minimum), per JESD22-A114F • Thermally-enhanced, RoHS-compliant package 0 26 -5 22 -10 18 -15 14 Return Loss (dB) Gain (dB) Gain -20 Return Loss 10 -25 1700 1800 1900 2000 2100 2200 Frequency (MHz) RF Characteristics CDMA Measurements (tested in Infineon production test fixture) VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 360 mA, POUT = 4 W average, ƒ = 1960 MHz, CDMA IS-95, 9 channels Characteristic Symbol Min Typ Max Unit Gain Gps 28 30 — dB Drain Efficiency ηD 14 16 — % ACPR — –52 –50 dBc Adjacent Channel Power Ratio RF Characteristics continued next page All published data at TCASE = 25°C unless otherwise indicated ESD: Electrostatic discharge sensitive device—observe handling precautions! Data Sheet 1 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution RF Characteristics (cont.) Two-tone Specifications (not subject to production test—verified by design/characterization in Infineon test fixture) VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 360 mA, POUT = 40 W PEP, ƒ = 1960 MHz, tone spacing = 1 MHz Characteristic Symbol Min Typ Max Unit Gain Gps — 30 — dB Power Added Efficiency PAE — 34 — % Third Order Intermodulation Distortion IMD3 — –32 — dBc Symbol Min Typ Max Unit DC Characteristics Stage 1 Characteristics Conditions Drain Leakage Current VDS = 28 V, VGS = 0 V IDSS — — 1.0 µA VDS = 63 V, VGS = 0 V IDSS — — 10.0 µA VGS = 10 V, VDS = 0 V IGSS — — 1.0 µA RDS(on) — 1.6 — Ω VGS 2.0 2.5 3.0 V Gate Leakage Current On-state Resistance Stage 1 VGS = 10 V, VDS = 0.1 V Operating Gate Voltage VDS = 28 V, IDQ1 = 160 mA, Stage 2 Characteristics Conditions Symbol Min Typ Max Unit Drain-source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, VGS = 0 V IDSS — — 1.0 µA VDS = 63 V, VGS = 0 V IDSS — — 10.0 µA VGS = 10 V, VDS = 0 V IGSS — — 1.0 µA RDS(on) — 0.21 — Ω VGS 2.0 2.5 3.0 V Gate Leakage Current On-state Resistance Operating Gate Voltage Data Sheet Stage 2 VGS = 10 V, VDS = 0.1 V VDS = 28 V, IDQ2 = 360 mA 2 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 65 V Gate-Source Voltage VGS –0.5 to +12 V Junction Temperature TJ 200 °C Total Device Dissipation PD 175 W 1.0 W/°C TSTG –40 to +150 °C Stage 1 RθJC 3.6 °C/W Stage 2 RθJC 1.5 °C/W Package Temperature Unit 260 °C Above 25°C derate by Storage Temperature Range Overall Thermal Resistance (TCASE = 70°C, 40 W CW) POUT = 40 W, IDQ1 = 160 mA, IDQ2 = 360 mA Moisture Sensitivity Level Level Test Standard 3 IPC/JEDEC J-STD-020 Ordering Information Type and Version Package Outline Package Description Shipping PTMA180402M V1 PG-DSO-20-63 Copper heat slug, plastic EMC body Tape Typical Performance, circuit tuned for 2140 MHz (data taken in Infineon test fixture) Broadband Sweep Power Sweep, P-1dB VDD = 28 V, IDQ 1 = 150 mA, IDQ 2 = 400 mA, Fixture tuned for 2110 - 2170 MHz 18 30 8 22 -2 IRL 18 -12 14 10 1700 1900 2100 2300 Gain 45 22 35 -22 14 -32 10 2500 55 26 18 25 Power Added Efficiency 2110 MHz 2140 MHz 2170 MHz 15 5 30 32 34 36 38 40 42 44 46 Output Power (dBm) Frequency (MHz) Data Sheet 65 Power Added Efficiency (%) Gain (dB) 26 34 Gain (dB) Gain 30 28 Input Return Loss (dB) 34 VDD = 28 V, IDQ 1 = 150 mA, IDQ 2 = 400 mA 3 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Typical Performance, circuit tuned for 2140 MHz (cont.) Two-tone Drive Up Two-tone Drive Up VDD = 28 V, IDQ1 = 150 mA, IDQ2 = 400 mA, VDD = 28 V, IDQ1 = 150 mA, IDQ2 = 400 mA, ƒ = 2140 MHz, 1 MHz tone spacing 1 MHz tone spacing 45 -40 35 IM3L 50 -50 25 IM3U -60 15 Power Added Efficiency -70 31 33 35 37 39 41 43 45 -40 35 -50 25 Power Added Efficiency -60 5 29 55 2110 MHz 2140 MHz 2170 MHz -30 MD3 (dBc IM IM MD3 (dBc) -30 -20 15 -70 45 Power Added Efficiency (%) 55 Power Add ded Efficiency (%) -20 5 29 31 33 35 37 39 41 43 45 Average Output Power (dBm) Average Output Power (dBm) Broadband Circuit Impedance — 2140 MHz Z Load –6.13 1940 5.51 –6.09 1960 5.39 –6.04 1980 5.27 –5.99 2000 5.15 –5.93 2020 5.03 –5.88 2040 4.92 –5.82 2060 4.80 –5.76 2080 4.68 –5.69 2100 4.57 –5.63 2120 4.45 –5.56 2140 4.34 –5.49 2160 4.23 –5.41 2180 4.12 –5.34 2200 4.01 –5.26 Data Sheet IN S Z0 = 50 0.5 5.63 0.4 1920 Z Load 0.3 –6.18 0.2 5.76 0.1 1900 D 0.0 jX W ARD LOA D T HS T O L ENG R Z Load 2200 0.1 MHz 1900 MHz E W AV <--- MHz - W AV E LE NG Frequency 0. 2 4 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Reference Circuit, tuned for 2140 MHz VD2 VD1 C1 100μF 50V C2 10μF C3 1μF C4 0.1μF C20 12pF C5 12pF "1 1 20 2 19 3 18 4 17 PTMA180402M 5 16 6 15 14 7 13 8 12 9 11 10 "2 C6 .5pF VG1 R3 C7 10μF R1 0O C8 1μF C9 0.1μF C10 12pF "3 C24 100μF 50V C34 12pF "4 "5 "6 C31 1.8pF "7 C32 2.4pF "8 "9 J2 RF_OUT C33 1.2pF "11 R4 R2 0O C23 10μF C30 1.8pF Q1 VG2 C22 1μF "10 DUT J1 RF_IN C21 0.1μF VD1 C11 10μF C12 1μF C13 0.1μF C14 12pF C15 12pF C16 0.1μF C17 1μF C18 10μF Q2 C19 100μF 50V C25 12pF C26 0.1μF C27 1μF M A 1 8 0 4 0 2 m _ 2 1 4 0 C28 10μF C29 100μF 50V M H z _ B D _ 9 - 2 - 0 9 Reference circuit schematic for ƒ = 2140 MHz Circuit Description DUT PTMA180402M LDMOS IC PCB Rogers RO4350, 0.76 mm [.030"] thick, εr = 3.48, 1 oz. copper Test fixture part no. LTN/PTMA180402M Find Gerber files for this test fixture on the Infineon Web site at http://www.infineon.com/rfpower Circuit Assembly Information Microstrip Electrical Characteristics Dimensions: L x W (mm) Dimensions: L x W (in.) at 2140 MHz 1 0.150 λ, 50.0 Ω 12.73 x 1.70 0.501 x 0.067 2 0.177 λ, 50.0 Ω 15.04 x 1.70 0.592 x 0.067 3 0.026 λ, 10.4 Ω 2.01 x 13.00 0.079 x 0.512 4 0.026 λ, 10.4 Ω 2.06 x 13.00 0.081 x 0.512 5 0.026 λ, 34.2 Ω 2.13 x 3.00 0.084 x 0.118 6 0.054 λ, 34.2 Ω 4.45 x 3.00 0.175 x 0.118 7 0.066 λ, 43.5 Ω 5.56 x 2.11 0.219 x 0.083 8 0.178 λ, 43.5 Ω 14.96 x 2.11 0.589 x 0.083 9 0.059 λ, 50.0 Ω 5.03 x 1.70 0.198 x 0.067 10, 11 0.137 λ, 47.8 Ω 11.56 x 1.83 0.455 x 0.072 Data Sheet 5 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Reference Circuit — 2140 MHz (cont.) VD2 VD1 C24 C23 C22 C21 C1 C2 C3 C20 C4 C5 C30 C6 RF_IN C10 C8 C14 C13 C15 C9 C7 C31 C32 C16 C17 C18 C12 C11 VG1 R1 Q1 R2 R4 C26 VG2 RF_OUT C25 VD1 R3 C34 C33 C19 C29 C27 C28 Q2 VD2 M A 1 8 0 4 0 2 m _ 2 1 4 0 M H z _ C D _ 9 - 2 - 0 9 Assembly diagram for 2140 MHz reference circuit (not to scale) Component Description C1, C19, C24, C29 C2, C7, C11, C18, C23, C28 C3, C8, C12, C17, C22, C27 C4, C9, C13, C16, C21, C26 C5, C10, C12, C15, C20, C25, C34 C6 C30, C31 C32 C33 Q1, Q2 R1, R2 R3, R4 Electrolytic capacitor, 100 µF, 50 V Digi-Key Ceramic capacitor, 10 µF Murata PCE3718CT-ND GRM422Y5V106Z050AL Ceramic capacitor, 1 µF Digi-Key 445-1411-2-ND Capacitor, 0.1 µF Digi-Key 399-1267-2-ND Ceramic capacitor, 12 pF ATC 600S120JT Ceramic capacitor, 0.5 pF Ceramic capacitor, 1.8 pF Ceramic capacitor, 2.4 pF Ceramic capacitor, 1.2 pF Transistor Resistor, 0 Ω Potentiometer, 2k Ω ATC ATC ATC ATC Infineon Technologies Digi-Key Digi-Key 100B 0R5 600S1R8CT 100B 2R4 100B 1R2 BCP56 603 3224W-202ETR-ND Data Sheet Suggested Manufacturer 6 of 14 P/N or Comment Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Typical Performance, circuit tuned for 1960 MHz (data taken in a production test fixture) CW Power Performance CW Performance at Selected Drain Voltage VDD = 28 V, IDQ 1 = 130 mA, IDQ 2 = 360 mA, ƒ = 1930, 1960, 1990 MHz VDD = 24 V, 28 V, 32 V IDQ 1 = 130 mA, IDQ 2 = 360 mA, ƒ = 1960 MHz 60 40 1930 MHz 1960 MHz 29 30 1990 MHz Efficiency Power Added Efficiency 28 20 10 27 30 30 32 34 36 38 40 42 44 46 32 V 29 24 V 28 27 0 26 28 V 31 26 48 30 32 34 Two-tone Drive-up Adjacent Channel Power Ratio (dB) -10 -20 Power Added Efficiency Efficiency -30 30 -40 20 IMD3 (dBc) Power Added Efficiency (%) 1930 MHz -50 10 IMD3 32 34 36 38 40 46 42 44 -35 30 1930 MHz -40 Power Added Efficiency Efficiency 1960 MHz -45 25 20 1990 MHz 15 -50 -55 10 ACPR -60 5 0 29 46 Average Output Power ( dBm ) Data Sheet 44 -65 -60 0 30 42 VDD = 28 V, IDQ 1 = 160, IDQ 2 = 360 mA, ƒ = 1930, 1960, 1990 MHz 50 1990 MHz 40 CDMA IS-95 Drive-up, 3 Frequencies VDD = 28 V, IDQ 1 = 160 mA, IDQ 2 = 360 mA ƒ = 1930, 1960, 1990 MHz 1960 MHz 38 Output Power (dBm) Output Power (dBm) 40 36 Power Added Efficiency (%) Gain (dB) 30 50 Gain (dB) Gain 31 32 Power Added Efficiency (%) 32 31 33 35 37 39 41 Output Power (dBm) 7 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Typical Performance —1960 MHz (cont.) Two-carrier WCDMA at Selected Temperatures Two-carrier WCDMA Drive-up VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 360 mA, ƒ = 1930, 1960, 1990 MHz, PAR = 8 dB, 10 MHz spacing, 3.84 MHz bandwidth 35 -25 Power Added Efficiency 25 -30 20 -35 15 -40 10 -45 IM3 34 36 38 40 20 -35 40 -40 10 -45 IM3 -50 30 32 34 36 38 40 Output Power ( dBm ) Edge EVM Performance VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 360 mA ƒ = 1930 1930, 1960 1960, 1990 MHz ƒ = 1930, 1930 1960 1960, 1990 MHz 30 -55 400 kHz -60 25 -65 20 -70 Power Added Efficiency 15 -75 600 kHz 10 -80 80 5 40 Po ower Adde ed Efficien ncy (%) -50 Edg ge Modula ation Spec ctrum (dBc) Edge Modulation Performance VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 360 mA 35 -85 30 32 34 36 38 40 42 3.5 1930 MHz 1960 MHz 1990 MHz 35 30 3.0 2.5 25 2.0 Power Added Efficiency 20 1.5 15 1.0 EVM 10 05 0.5 5 44 0.0 30 Output Power ( dBm ) Data Sheet 42 42 40 Power Add P ded Efficie ency (%) -30 15 Output Power ( dBm ) 1930 MHz 1960 MHz 1990 MHz -25 1930 MHz 1960 MHz 1990 MHz 25 -50 32 Power Added Efficiency 30 5 5 30 -20 Errror Vectorr Magnitud de (%) 30 Power Ad dded Efficiency (%) -20 25°C 90°C –25°C IM M3 (dBc) Power Ad dded Efficiency (%) 35 IM3 (dBc) VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 360 mA, ƒ = 1960 MHz, PAR = 8 dB, 10 MHz spacing, 3.84 MHz bandwidth 32 34 36 38 40 42 44 Output Power ( dBm ) 8 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Broadband Circuit Impedance — 1960 MHz Z Load 5.48 –6.91 1820 5.39 –6.87 1830 5.31 –6.83 1840 5.23 –6.79 1850 5.15 –6.75 1860 5.07 –6.70 1870 4.99 –6.66 1880 4.91 –6.61 1890 4.84 –6.56 1900 4.76 –6.51 1910 4.69 –6.47 1920 4.61 –6.42 1930 4.54 –6.36 1940 4.47 –6.31 1950 4.40 –6.26 1960 4.33 –6.21 1970 4.26 –6.15 1980 4.19 –6.10 1990 4.12 –6.04 2000 4.06 –5.99 Data Sheet Z Load IN S Z0 = 50 04 1810 D 0.3 –6.95 0.2 5.56 0.1 1800 0.0 jX W ARD LOA D T HS T O L E NG R Z Load 0.1 2200 MHz 1800 MHz E WAV <--- MHz - W AV E LE N Frequency 0. 2 9 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Reference Circuit, tuned for 1960 MHz VD2 VD1 C2 10μF C1 100μF 50V C4 0.1μF C3 1μF C19 12pF C5 12pF 20 1 19 2 18 3 4 17 PTMA180402M 5 16 6 15 7 14 8 13 9 12 10 11 "1 VG1 R3 C6 10μF R1 0O C7 1μF C8 0.1μF C9 12pF "2 C23 100μF 50V C33 12pF "3 "5 "4 "6 "7 "8 J2 RF_OUT C32 1pF C31 2.7pF C30 1.8pF "10 R4 R2 0O C22 10μF C29 1.8pF Q1 VG2 C21 1μF "9 DUT J1 RF_IN C20 0.1μF VD1 C10 10μF C11 1μF C12 0.1μF C13 12pF C14 12pF C15 0.1μF C16 1μF C17 10μF Q2 C18 100μF 50V C24 12pF M A 1 8 0 4 0 2 m _ 1 9 6 0 C26 1μF C25 0.1μF C27 10μF C28 100μF 50V M H z _ B D _ 9 - 2 - 0 9 Reference circuit schematic for ƒ = 1960 MHz Circuit Description DUT PTMA180402M LDMOS IC PCB Rogers RO4350, 0.76 mm [.030"] thick, εr = 3.48, 1 oz. copper Test Fixture Part No. LTN/PTMA180402M Find Gerber files for this test fixture on the Infineon Web site at http://www.infineon.com/rfpower Microstrip Electrical Characteristics Dimensions: L x W (mm) Dimensions: L x W (in.) 27.76 x 1.70 1.093 x 0.067 at 1960 MHz 1 0.300 λ,50.0 2 0.024 λ,10.4 2.01 x 13.00 0.079 x 0.512 3 0.024 λ,10.4 2.06 x 13.00 0.081 x 0.512 4 0.037 λ,34.2 3.35 x 3.00 0.132 x 0.118 5 0.046 λ,34.2 4.11 x 3.00 0.162 x 0.118 6 0.097 λ,34.2 8.76 x 3.00 0.345 x 0.118 7 0.127 λ,43.6 11.63 x 2.11 0.458 x 0.083 8 0.054 λ,50.0 5.03 x 1.70 0.198 x 0.067 9, 10 0.125 λ,47.8 11.56 x 1.83 0.455 x 0.072 Data Sheet 10 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Reference Circuit — 1960 MHz (cont.) VD2 VD1 C23 C22 C21 C20 C1 C2 C19 C3 C4 C5 C29 RF_IN C7 C8 C9 RF_OUT C13 C12 C14 C6 C30 C31 C15 C16 C17 C11 C10 VG1 R1 Q1 R2 R4 VG2 C33 C24 VD1 R3 C32 C18 C25 C26 C27 Q2 C28 VD2 M A 1 8 0 4 0 2 m _ 1 9 6 0 M H z _ C D _ 9 - 2 - 0 9 Assembly diagram for 1960 MHz reference circuit (not to scale) Component Description C1, C18, C23, C28 C2, C6, C10, C17, C22, C27 C3, C7, C11, C16, C21, C26 C4, C8, C12, C15, C20, C25 C5, C9, C13, C14, C19, C24, C33 C29, C30, C31 C32 Q1, Q2 R1, R2 R3, R4 Electrolytic capacitor, 100 µF, 50 V Digi-Key Ceramic capacitor, 10 µF Murata PCE3718CT-ND GRM422Y5V106Z050AL Ceramic capacitor, 1 µF Digi-Key Data Sheet Suggested Manufacturer P/N or Comment 445-1411-2-ND Capacitor, 0.1 µF Digi-Key 399-1267-2-ND Ceramic capacitor, 12 pF ATC 600S120JT Ceramic capacitor, 1.8 pF Ceramic capacitor, 1.0 pF Transistor Resistor, 0 Ω Potentiometer, 2k Ω ATC ATC Infineon Technologies Digi-Key Digi-Key 600S1R8CT 100B 1R0 BCP56 603 3224W-202ETR-ND 11 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Pinout Diagram VD1 1 VD1 Thermal FET 20 NC 2 19 NC VD Thermal FET 3 18 VD2, RF Out VG Thermal FET 4 17 VD2, RF Out RF In 5 16 VD2, RF Out RF In 6 15 VD2, RF Out VG1 7 14 VD2, RF Out VG2 8 13 VD2, RF Out VD1 9 12 NC VD1 10 11 NC a180402m_pd_9-3-2009 Source: Plated copper heat slug on backside of package. Data Sheet 12 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Package Outline Specifications Package PG-DSO-20-63 6. 13.00 [0.512] MAX INDEX PIN 1 10 1 2X 2.90 [0.114] MAX (2 PLS) 14.20±0.30 [0.559±0.012] 6.00 6. 2.95 [0.116] [0.236] 11.00 [0.433] 11 20 9 X 1.27 = 11.43 9 X .050 = . 450 TOP VIEW BOTTOM VIEW 1.10 [0.043] MAX (2 PLS) 4. 11.00±0.10 [0.433±0.004] 14°±1° (2 PLS) TOP/BOTTOM ALL SIDES SEE DETAIL A 3.50 [0.137] MAX 1.27 [0.050] 15.90±0.10 [0.626±0.004] 0.40+0.13 [0.015+0.005] 5. END VIEW 0.25mm M C A S B S SIDE VIEW 0.35 [0.014] GAUGE PLANE 0.15 [0.006] REF 0.25+0.07 –0.02 [0.010+0.003 –0. 001 ] PG -DSO -20- 63_po_02 - 19-2010 0+0.1 [0+0.004] STANDOFF 0.95±0.15 [0.037±0.006] 1.60 [0.063] REF DETAIL A Diagram Notes—unless otherwise specified: 1. Interpret dimensions and tolerances per ASME Y14.5M-1994. 2. Package dimensions: 11.0 mm by 15.9 mm by 3.35 mm. 3. JEDEC drawing number: MO-166. 4. Does not include plastic or metal protrusion of 0.15 mm max per side. 5. Does not include dambar protrusion; maximum allowable dambar protrusion shall be 0.08 mm. 6. Bottom metallization. Sn plating (matte) : 5 – 15 micron [196.85 – 590.55 microinch]. Refer to Application Note “Recommendations for Printed Circuit Board Assembly of Infineon DSO and SSOP Packages” for additional information. Data Sheet 13 of 14 Rev. 08, 2011-08-10 PTMA180402M V1 Confidential, Limited Internal Distribution Revision History: Previous Version: Page 1 2 3, 11 9 all 2011-08-10 2011-03-17, Data Sheet Subjects (major changes since last revision) Revisions to RF characteristics. Changes to V(BR)DSS and RDS(on), DC table Corrected typos. Removed voltage vs. temperature graph. Miscellaneous cosmetic adjustments. Data Sheet We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International Edition 2011-08-10 Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 14 of 14 Rev. 08, 2011-08-10