Document No.001-61281 Rev. *E ECN # 4768500 Cypress Semiconductor Product Qualification Report QTP# 042205 VERSION *E May 2015 9 Meg Synchronous SRAM Family Technology R9T-3R, Fab4 CY7C1354C CY7C1356C CY7C1354CV25 CY7C1356CV25 CY7C1355C CY7C1357C CY7C1360C CY7C1362C CY7C1361C CY7C1363C/D CY7C1364C CY7C1365C CY7C1366C CY7C1367C CY7C1368C CY7C1378C CY7C1379C CY7C1354D 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL™ Architecture 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL™ Architecture 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL™ Architecture 9-Mbit (256K x 36/512 x 18) Pipelined SRAM 9-Mbit (256K x 36/512 x 18) Flow-Through SRAM 9-Mb (256K x 32) Pipelined Sync SRAM 9-Mb (256K x 32) Flow-Through Sync SRAM 9-Mbit (256K x 36/512 x 18) Pipelined DCD Sync SRAM 9-Mb (256K x 32) Pipelined DCD Sync SRAM 9-Mbit (256K x 32) Pipelined SRAM with NoBL™ Architecture 9-Mbit (256K x 32) Flow-Through SRAM with NoBL™ Architecture 9-Mbit (256K x 36) Pipelined SRAM with NoBL™ Architecture FOR ANY QUESTIONS ON THIS REPORT, PLEASE CONTACT [email protected] or via a CYLINK CRM CASE Prepared By: Honesto Sintos Reliability Engineer Reviewed By: Zhaomin Ji Reliability Manager Approved By: Don Darling Reliability Director Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 1 of 12 Document No.001-61281 Rev. *E ECN # 4768500 PRODUCT QUALIFICATION HISTORY Qual Report 033302 042205 053405 Description of Qualification Purpose New Technology R9T-3R, Fab 4, and New Device CY7C137*/138*E (18Meg) Synchronous product family New Device CY7C1360C, (9 Meg) Synchronous Product Family in R9T-3R Technology, Fab 4 Manufacturability of CY7C1360CC, 9Meg Synchronous Product Family in R9T-3R Technology Date Comp Sep 04 Sep 04 Sep 05 Cypress products are manufactured using qualified processes. The technology qualification for this product is referenced above and must be considered to get a complete and thorough evaluation of the reliability of the product. Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 2 of 12 Document No.001-61281 Rev. *E ECN # 4768500 PRODUCT DESCRIPTION (for qualification) Qualification Purpose: Qualify CY7C1360C Synchronous Product Family in qualified Technology R9T-3R, Fab 4 CY7C1354C, CY7C1355C, CY7C1356C, CY7C1357C, CY7C1354CV25, Marketing Part #: CY7C1356CV25, CY7C1360C, CY7C1361C, CY7C1362C, CY7C1363C/D, CY7C1364C, CYC71365C, CY7C1366C, CYC71367C, CY7C1368C, CYC71378C, CY7C1379C Device Description: 2.5V, 3.3V, Commercial and Industrial Cypress Division: Cypress Semiconductor Corporation –Memory Product Division (MPD) Overall Die (or Mask) REV Level (pre-requisite for qualification): 7C1360C What ID markings on Die: Rev. C TECHNOLOGY/FAB PROCESS DESCRIPTION – R9T-3R Number of Metal Layers: Metal 1: 100ª CoTi, 3200ª Al, 300ª TiW Metal Composition: Metal 2: 150Å Ti / 6000Å Al / 300Å TiW Metal 3: 150Å Ti / 8000Å Al / 300Å TiW 3 Passivation Type and Materials: 1000Å Oxide TEOS / 9000Å Nitride Free Phosphorus contents in top glass layer (%): 0% Number of Transistors in Device ~5.8.E+07 Number of Logic Gates in Device ~1.2.E+06 Generic Process Technology/Design Rule (-drawn): CMOS, Triple Metal, 90 nm Gate Oxide Material/Thickness (MOS): Nitridized SiO2, 23Å Name/Location of Die Fab (prime) Facility: Cypress Semiconductor – Bloomington, MN Die Fab Line ID/Wafer Process ID: Fab4/R9T-3R PACKAGE AVAILABILITY PACKAGE ASSEMBLY SITE FACILITY 100-Lead TQFP JCET-China (JT) 119/165-Ball BGA TAIWN-G Note: Package Qualification details upon request Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 3 of 12 Document No.001-61281 Rev. *E ECN # 4768500 MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION Package Designation: AZ0AA Package Outline, Type, or Name: 100L TQFP Mold Compound Name/Manufacturer: KEG6000 / Kyocera Mold Compound Flammability Rating: V-O per UL94 Mold Compound Alpha Emission Rate: 0.002 CPH/cm2 Oxygen Rating Index: >28% N/A Lead Frame Designation: Reduced Metal Pad Lead Frame Material: Copper Substrate Material: N/A Lead Finish, Composition / Thickness: NiPdAu Die Backside Preparation Method/Metallization: Backgrind Die Separation Method: Wafersaw Die Attach Supplier: Henkel Die Attach Material: QMI 509 Bond Diagram Designation 001-14561, 001-33059, 001-30701 Wire Bond Method: Thermosonic Wire Material/Size: 0.9mil / Au Thermal Resistance Theta JA C/W: 11.3 C/W Package Cross Section Yes/No: Yes Assembly Process Flow: 001-64159 Name/Location of Assembly (prime) facility: JT-JCET China MSL LEVEL 3 REFLOW PROFILE 260C ELECTRICAL TEST / FINISH DESCRIPTION Test Location: Cypress Philippines (CML-R), Chipmos-Taiwan (Taiwn-GO) Fault Coverage: 100% Note: Please contact a Cypress Representative for other packages availability Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 4 of 12 Document No.001-61281 Rev. *E ECN # 4768500 RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT Stress/Test High Temperature Operating Life Early Failure Rate High Temperature Operating Life Latent Failure Rate High Temperature Steady State Life Low Temperature Operating Life High Accelerated Saturation Test (HAST) Test Condition (Temp/Bias) JESD22-A108: Dynamic Operating Condition, Vcc Max (Core) = 2.25V, 150ºC JESD22-A108: Dynamic Operating Condition, Vcc Max (Core)=2.25V, 150 ºC JESD22-A108: Static Operating Condition, Vcc Max= 2.25V, 150 ºC JESD22-A108: Dynamic Operating Condition, Vcc = 6.50V, -30 ºC JEDEC STD 22-A110 130 ºC ,3.63V, 85%RH Precondition: JESD22 Moisture Sensitivity MSL 3 Result P/F P P P P P 192 Hrs, 30 ºC /60%RH, 260 ºC Reflow Temperature Cycle MIL-STD-883, Method 1010, Condition C, -65 ºC to 150 ºC Precondition: JESD22 Moisture Sensitivity MSL 3 192 Hrs, 30 ºC /60%RH, 260 ºC Reflow JESD22-A102: 121ºC, 100%RH , 15 Psig Precondition: JESD22 Moisture Sensitivity MSL 3 Pressure Cooker P P 192 Hrs, 30 ºC /60%RH, 260 ºC Reflow High Temperature Storage JESD22-A103, 150 ºC, No bias P Electrostatic Discharge Human Body Model (ESD-HBM) 2,200V JEDEC EIA/JESD22-A114 P Electrostatic Discharge Charge Device Model (ESD-CDM) 500V JESD22-C101 P Current Density Meets the Technology Device Level Reliability Specifications P Age Bond Strength 200C, 4HRS MIL-STD-883, Method 883-2011 P Acoustic Microscopy Dynamic Latch up Static Latch up J-STD-020 Precondition: JESD22 Moisture Sensitivity MSL 3 192 Hrs, 30 ºC /60%RH, 260 ºC Reflow JEDEC 17 125C, 7.5V, 300mA, JEDEC 17 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 5 of 12 P P P Document No.001-61281 Rev. *E ECN # 4768500 RELIABILITY FAILURE RATE SUMMARY Stress/Test High Temperature Operating Life Early Device Tested/ Device Hours # Fails Activation Energy Thermal AF3 Failure Rate 8,541 Devices 1 N/A N/A 117 PPM 485,000 DHRs 0 0.7 170 11 FIT Failure Rate High Temperature Operating Life1,2 Long Term Failure Rate Assuming an ambient temperature of 55C and a junction temperature rise of 15C. Chi-squared 60% estimations used to calculate the failure rate.. 3 Thermal Acceleration Factor is calculated from the Arrhenius equation 1 2 E 1 1 AF = exp A - k T 2 T1 where: EA =The Activation Energy of the defect mechanism. K = Boltzmann’s constant = 8.62x10-5 eV/Kelvin. T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device at use conditions. Company Confidential A printed copy of this document is considered uncontrolled. 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Page 6 of 12 Document No.001-61281 Rev. *E ECN # 4768500 Reliability Test Data QTP #: 033302 Device Fab Lot # Assy Lot # Assy Loc Duration Samp Rej Failure Mechanism STRESS: ACOUSTIC-MSL3 CY7C1470V33 (7C1470A) 4330156 610417279 CML-R COMP 15 0 CY7C1470V33 (7C1470A) 4321389 610417280 CML-R COMP 15 0 CY7C1470V33 (7C1470A) 4323794 610348235 TAIWN-G COMP 15 0 STRESS: AGE BOND STRENGTH CY7C1370DV33 (7C1370E) 4421235 610447674 CML-R COMP 5 0 CY7C1370DV33 (7C1370E) 4406200 610435906 CML-R COMP 5 0 CY7C1370DV33 (7C1370E) 4410258 610437891 CML-R COMP 5 0 4321389 610417278 CML-R COMP 10 0 4321389 610417278 CML-R COMP 10 0 610417278 CML-R COMP 3 0 STRESS: BALL SHEAR CY7C1470V33 (7C1470A) STRESS: BOND PULL CY7C1470V33 (7C1470A) STRESS: DYNAMIC LATCH-UP CY7C1470V33 (7C1470A) 4321389 STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V CY7C1470V33 (7C1470A) 4352888 610425832 TAIWN-G COMP 3 0 CY7C1470V33 (7C1470A) 4401980 610425833 TAIWN-G COMP 3 0 CY7C1370DV33 (7C1370E) 4345377 610417723 CML-R COMP 3 0 STRESS: ESD-HUMAN BODY CIRCUIT PER JEDEC EIA/JESD22-A114-B, 2,200V CY7C1470V33 (7C1470A) 4352888 610425832 TAIWN-G COMP 9 0 CY7C1470V33 (7C1470A) 4401980 610425833 TAIWN-G COMP 9 0 CY7C1370DV33 (7C1370E) 4421235 610446833 CML-R COMP 9 0 STRESS: ESD-CHARGE DEVICE MODEL, 500V CY7C1470V33 (7C1470A) 4352888 610425832 TAIWN-G COMP 9 0 CY7C1470V33 (7C1470A) 4401980 610425833 TAIWN-G COMP 9 0 CY7C1370DV33 (7C1370E) 4345377 610417723 CML-R COMP 9 0 STRESS: HIGH TEMPERATURE STORAGE, PLASTIC, 150C CY7C1470V33 (7C1470A) 4323794 610348234 TAIWN-G 500 47 0 CY7C1470V33 (7C1470A) 4323794 610348234 TAIWN-G 1000 47 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 7 of 12 Document No.001-61281 Rev. *E ECN # 4768500 Reliability Test Data QTP #: 033302 Device Fab Lot # Assy Lot # Assy Loc Duration Samp Rej Failure Mechanism STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 2.25V, Vcc Max (Core) CY7C1370DV33 (7C1370E) 4345377 610424939 CML-R 48 193 0 CY7C1370DV33 (7C1370E) 4345377 610422227 CML-R 48 951 0 CY7C1370DV33 (7C1370E) 4406200 610435906 CML-R 48 1246 0 CY7C1370DV33 (7C1370E) 4410258 610437891 CML-R 48 1382 1 Non-Visual STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 2.25V, Vcc Max (Core) CY7C1370DV33 (7C1370E) 4345377 610424939 CML-R 500 170 0 CY7C1370DV33 (7C1370E) 4406200 610435906 CML-R 500 400 0 CY7C1370DV33 (7C1370E) 4410258 610437891 CML-R 500 400 0 STRESS: HIGH TEMP STEADY STATE LIFE TEST, 150C, 2.25V, Vcc Max CY7C1470V33 (7C1470A) 4405088 610418824 TAIWN-G 80 85 0 CY7C1470V33 (7C1470A) 4405088 610418824 TAIWN-G 168 85 0 4321389 610417278 CML-R COMP 5 0 STRESS: INTERNAL VISUAL CY7C1470V33 (7C1470A) STRESS: LOW TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, -30C, 6.50V, Vcc CY7C1470V33 (7C1470A) 4333765 610349455 CML-R 500 45 0 STRESS: PRESSURE COOKER TEST, 121C, 100%RH, 15 Psig, PRE COND 192 HR 30C/60%RH, MSL3 CY7C1370DV33 (7C1370E) 4345377 610422227 CML-R 168 50 0 CY7C1370DV33 (7C1370E) 4406200 610435906 CML-R 168 50 0 CY7C1470V33 (7C1470A) 4321389 610417278 CML-R 168 43 0 STRESS: HI-ACCEL SATURATION TEST, 130C, 85%RH, 3.63V, PRE COND 192 HR 30C/60%RH, MSL3 CY7C1370DV33 (7C1370E) 4406200 610435906 CML-R 128 50 0 CY7C1470V33 (7C1470A) 4321389 610417278 CML-R 128 47 0 CY7C1470V33 (7C1470A) 4330156 610417279 CML-R 128 44 0 STRESS: STATIC LATCH-UP TESTING, 125C, 7.5V, +/300mA CY7C1470V33 (7C1470A) 4352888 610425832 TAIWN-G COMP 3 0 CY7C1470V33 (7C1470A) 4401980 610425833 TAIWN-G COMP 3 0 CY7C1370DV33 (7C1370E) 4345377 610417723 CML-R COMP 3 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 8 of 12 Document No.001-61281 Rev. *E ECN # 4768500 Reliability Test Data QTP #: 033302 Device Fab Lot # Assy Lot # Assy Loc Duration Samp Rej Failure Mechanism STRESS: TC COND. C -65C TO 150C, PRE COND 192 HRS 30C/60%RH, MSL3 CY7C1370DV33 (7C1370E) 4345377 610422227 CML-R 300 50 0 CY7C1370DV33 (7C1370E) 4345377 610422227 CML-R 500 49 0 CY7C1370DV33 (7C1370E) 4345377 610422227 CML-R 1000 49 0 CY7C1470V33 (7C1470A) 4330156 610417279 CML-R 300 43 0 CY7C1470V33 (7C1470A) 4330156 610417279 CML-R 500 43 0 CY7C1470V33 (7C1470A) 4330156 610417279 CML-R 1000 42 0 CY7C1470V33 (7C1470A) 4321389 610417280 CML-R 300 34 0 CY7C1470V33 (7C1470A) 4321389 610417280 CML-R 500 33 0 CY7C1470V33 (7C1470A) 4321389 610417280 CML-R 1000 33 0 CY7C1470V33 (7C1470A) 4321389 610417278 CML-R 100 46 0 CY7C1470V33 (7C1470A) 4321389 610417278 CML-R 200 46 0 4321389 610417278 CML-R COMP 15 0 STRESS: THERMAL SHOCK STRESS: X-RAY CY7C1470V33 (7C1470A) Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 9 of 12 Document No.001-61281 Rev. *E ECN # 4768500 Reliability Test Data QTP #: 042205 Device Fab Lot # Assy Lot # Assy Loc Duration Samp Rej Failure Mechanism STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V CY7C1354C (7C13540C) 4423932 610441270 CML-R COMP 3 0 STRESS: ESD-HUMAN BODY CIRCUIT PER JEDEC EIA/JESD22-A114-B, 2,200V CY7C1354C (7C13540C) 4423932 610441270 CML-R COMP 9 0 CML-R COMP 9 0 STRESS: ESD-CHARGE DEVICE MODEL, 500V CY7C1354C (7C13540C) 4423932 610441270 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 2.25V, Vcc Max (Core) CY7C1354C (7C13540C) 4423932 610442997 CML-R 48 2138 0 CML-R COMP 3 0 STRESS: STATIC LATCH-UP TESTING, 125C, 7.5V, +/300mA CY7C1354C (7C13540C) 4423932 610441270 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 10 of 12 Document No.001-61281 Rev. *E ECN # 4768500 Reliability Test Data QTP #: Device Fab Lot # Assy Lot # 053405 Assy Loc Duration Samp Rej Failure Mechanism STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 2.25V, Vcc Max (Core) CY7C1360C (7C13600C) 4512530 610528202 CML-R 48 2846 0 CY7C1360C (7C13600C) 4511189 610528203 CML-R 48 2851 0 CY7C1360C (7C13600C) 4514016 610528948 CML-R 48 1281 0 CY7C1360C (7C13600C) 4514016 610528948M CML-R 48 1563 1 METAL STRINGER Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 11 of 12 Document No.001-61281 Rev. *E ECN # 4768500 Document History Page Document Title: FAB4 Document Number: Rev. ECN No. ** 2923845 *A 3989507 QTP 042205: 9 MEG SYNCHRONOUS SRAM FAMILY (CY7C1360CC)TECHNOLOGY R9T-3R, 001-61281 Orig. of Change HGA NSR Description of Change Initial spec release Corrected the QTP# from 053405 to 042205 and updated the spec title. Changed the purpose of QTP 053405 from GOOBI to Manufacturability. Package information used is for CML, Conventional which is already obsolete. Replaced all package information on page 4 from JCET package qual which is the current qualified site for this device Removed Cypress reference specs and replaced with Industry standards in the reliability tests performed table on page 5 Deleted “3IR” in reflow step of HAST, PCT and TCT on reliability stress performed table, page 5 *B 4039660 JYF *C 4092546 HSTO *D 4376528 HSTO Added CY7C1363D part no. in the qual report device coverage; Updated division from MID to MPD; Updated Assembly Site Facility from CML-R to JCET-China (JT) in Package Availability table; Added industry standard references of EFR, LFR, HTSSL, LTOL, HAST and PCT in Reliability Test Performed table. Added device CY7C1354D in the cover page in reference to memo GRW-409. Align qualification report based on the new template in the front page *E 4768500 HSTO Update reference for Reliability Director Distribution: WEB Posting: None Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 12 of 12