QTP#000504:1 MEG FAST ASYNCHRONOUS RAM CY7C1021B/1019B R52D-5R TECHNOLOGY, FAB 4

Document No.001-88064 Rev. *A
ECN #4431902
Cypress Semiconductor
Product Qualification Report
QTP#000504 VERSION*A
July 2014
1 Meg Fast Asynchronous RAM
R52D-5R Technology, Fab 4
CY7C1021B
64K x 16 Static RAM
CY7C1019B
128K x 8 Static RAM
FOR ANY QUESTIONS ON THIS REPORT, PLEAE CONTACT
[email protected] or via a CYLINK CRM CASE
Prepared By:
Honesto Sintos
Reliability Engineer
Reviewed By:
Zhaomin Ji
Reliability Manager
Approved By:
Richard Oshiro
Reliability Director
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 1 of 13
Document No.001-88064 Rev. *A
ECN #4431902
PRODUCT QUALIFICATION HISTORY
Qual
Report
Description of Qualification Purpose
Date
Comp
000301
New Technology Derivative R52D-5R /New Product CY7C1049B 4Meg Async SRAM
Apr 00
98462
New CY7C109B, 1Meg Asynchronous SRAM Product, R52D-5R Technology
Derivative.
Apr 00
000504
New Product CY7C1021B 1Meg Async SRAM, R52D-5R Technology Derivative
Nov 00
Note:
Based on using the same design rules and cells to establish a product family, as in JESD-47, Cypress qualifies devices
within a product technology by using generic data from that product family to fill out the qualification requirements for those
reliability stresses which test intrinsic reliability of the technology. Reliability stresses, such as ESD and Early Life, which
are design sensitive, are routinely performed in qualifications to ensure the specific design is reliable.
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 2 of 13
Document No.001-88064 Rev. *A
ECN #4431902
PRODUCT DESCRIPTION (for qualification)
Qualification Purpose: Qualifies CY7C1021B and CY7C1019B (metal option) in qualified R52D-5R Technology, Fab4.
Marketing Part #:
CY7C1021B and CY7C1019B
Device Description:
5V Regulator, Commercial and Industrial offered in 32-lead SOJ and 44-lead TSOPII Package
Cypress Division:
Cypress Semiconductor Corporation – MPD Division
Overall Die (or Mask) REV Level (pre-requisite for qualification):
Rev. F
What ID markings on Die: 7C1021F /CY7C1019F
Number of Metal Layers:
2
TECHNOLOGY/FAB PROCESS DESCRIPTION - R52D-5R
Metal Composition: Metal 1: 500Å TiW/6000Å Al-.5%Cu/300Å TiW
Metal 2: 300Å CoTi/8000Å Al-.5%Cu/300Å TiW
Passivation Type and Materials:
1000Å of TEOS + 9000Å SiN
Free Phosphorus contents in top glass layer (%):
0%
Number of Transistors in Device:
7 million
Number of Gates in Device:
1.5 million
Generic Process Technology/Design Rule (drawn):
Gate Oxide Material/Thickness (MOS):
CMOS, Double Metal /0.25 m
Name/Location of Die Fab (prime) Facility:
Cypress Semiconductor -- Bloomington, MN
Die Fab Line ID/Wafer Process ID:
Fab4/R52D-5R
55 Å
PACKAGE AVAILABILITY
PACKAGE
ASSEMBLY FACILITY SITE
44-lead TSOP II
JCET , CML-RA
32-lead SOJ
JCET
Note 1: Package Qualification details upon request
Note 1: 1Meg Async CY7C1021B, R52D-5R (Regulator off) Technology.
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 3 of 13
Document No.001-88064 Rev. *A
ECN # 4431902
MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION
Package Designation:
Package Outline, Type, or Name:
Mold Compound Name/Manufacturer:
Mold Compound Flammability Rating:
ZS444
44-lead Thin Small Outline Package (TSSOP II)
Hitachi CEL 9200
V-O per UL94
Oxygen Rating Index:
>28%
Lead Frame Material:
Copper
Lead Finish, Composition / Thickness:
Solder Plate, 85%Sn, 15%Pb
Die Backside Preparation
Method/Metallization:
Die Separation Method:
N/A
Die Attach Supplier:
Ablestik
Die Attach Material:
Ablestik 8361H
Wire Bond Method:
Thermosonic
Wire Material/Size:
Au, 1.0um
Thermal Resistance Theta JA °C/W:
47°C/W
Package Cross Section Yes/No:
N/A
Name/Location of Assembly (prime) facility:
Cypress Philippines (CSPI-R)
Wafer Saw
ELECTRICAL TEST / FINISH DESCRIPTION
Test Location:
KYEC, CML-RA
Fault Coverage: 100%
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 4 of 13
Document No.001-88064 Rev. *A
ECN # 4431902
RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENTS
Stress/Test
Test Condition
(Temp/Bias)
High Temperature Operating Life
1)
Early Failure Rate
Dynamic Operating Condition, Vcc = 3.8V, 150C
2)
QTP #000504, QTP #98462
Result
P/F
P
QTP #000301
Dynamic Operating Condition, Vcc = 5.75V 150C
High Temperature Operating Life
1)
Latent Failure Rate
Dynamic Operating Condition, Vcc = 3.8V, 150C
2)
QTP #98462
P
QTP #000301
Dynamic Operating Condition, Vcc = 5.75V 150C
High Temp. Steady State Life
Test
1)
High Accelerated Saturation Test
(HAST)
1)
Temperature Cycle
1)
QTP #000301
P
Static Operating Condition, Vcc = 5.5V 150C
QTP #000301, QTP #98462
P
130C, 5.5V, 85%RH
Precondition: JESD22 Moisture Sensitivity MSL 3
192 Hrs, 30C/60%RH+3IR-Reflow, 220C+5, -0C
QTP #000504, QTP #000301, QTP #98462
P
MIL-STD-883C, Method 1010, Condition C, -65C to
150C Precondition: JESD22 Moisture Sensitivity MSL 3
192 Hrs, 30C/60%RH+3IR-Reflow, 220C+5, -0C
Pressure Cooker
1)
QTP #000504, QTP #000301, QTP #98462
P
No bias, 121C, 100%RH
Precondition: JESD22 Moisture Sensitivity MSL 3
192 Hrs, 30C/60%RH+3IR-Reflow, 220C+5, -0C
Electrostatic Discharge
Human Body Model (ESD-HBM)
1)
QTP #000504, QTP #000301, QTP #98462
P
2,200V
MIL-STD-883, Method 3015.7
Electrostatic Discharge
Charge Device Model (ESDCDM)
1)
High Temperature Storage
1)
QTP #000504, QTP #000301, QTP #98462
P
500V , JESD22-C101C
QTP #000301
P
150C+/-5C no bias
SEM X-Section
1)
QTP #000301
MIL-STD 883 Method 2018-2
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 5 of 13
P
Document No.001-88064 Rev. *A
ECN #4431902
RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENTS (continuation)
Stress/Test
Acoustic Microscopy
Test Condition
(Temp/Bias)
1)
QTP #000301
Result
P/F
P
J-STD-020
Current Density
1)
QTP #000301
P
Meets the Technology Device Level Reliability Specifications
Low Temperature Operating Life
1)
QTP #000301
P
-30C,6.5V,8MHZ , JESD22-A108D
Age Bond
1) Q T P #000301
200C, 4hrs,
MIL-STD-883, Method 883-2011
P
Latchup Sensitivity
1)
P
QTP #000504, QTP #000301, QTP #98462
125C, 12V, ±300mA
In accordance with JEDEC 17.
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 6 of 13
Document No.001-88064 Rev. *A
ECN #4431902
RELIABILITY FAILURE RATE SUMMARY
Stress/Test
High Temperature Operating Life
Early Failure Rate1
High Temperature Operating
Life2,3
Long Term Failure Rate
1
2
3
4
Device Tested/ Device
Hours
# Fails Activation
Energy
Thermal3
A.F
Failure
Rate4
8,409
1
N/A
N/A
119 PPM
1,057,400 DHRs
0
0.7
170
5 FIT
A production burn-in of 24 Hrs at 150C, 4.5V is required for the product.
Assuming an ambient temperature of 55C and a junction temperature rise of 15C.
Chi-squared 60% estimations used to calculate the failure rate.
Thermal Acceleration Factor is calculated from the Arrhenius equation
E  1 1  
AF = exp  A  -  
 k  T 2 T1  


where:
EA =The Activation Energy of the defect mechanism.
k = Boltzmann's constant = 8.62x10-5 eV/Kelvin.
T1 is the junction temperature of the device under stress and T2 is the junction temperature of
the device at use conditions.
5
EFR FIT Rate based on QTP 000504/98462 and 000301.
LFR FIT Rate based on QTP 98462 and 000301
5
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 7 of 13
Document No.001-88064 Rev. *A
ECN #4431902
Reliability Test Data
QTP #:
Device
STRESS:
Fab Lot #
4022475
CSPI-R
48H
3907
0
610022884
CSPI-R
COMP
9
0
4022475
CSPI-R
COMP
9
0
CSPI-R
COMP
3
0
610022884
4022475
610022884
PRESSURE COOKER TEST, 121C, 100%RH, PRE COND 192HRS 30C/60%RH, MSL3
CY7C1021B-ZSC (7C1021F)
STRESS:
610033884
STATIC LATCH-UP TESTING, 125C, 12V, +/- 300mA
CY7C1021B-ZSC (7C1021F)
STRESS:
Rej Failure Mechanism
ESD- HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V
CY7C1021B-ZSC (7C1021F)
STRESS:
Duration Samp
ESD- CHARGE DEVICE MODEL, 500V
CY7C1021B- ZSC (7C1021F) 4022475
STRESS:
Ass Loc
HIGH TEMP DYNAMIC OPERTING LIFE - EARLY FAILURE RATE, 150C, 3.8V, VCC MAX
CY7C1021B-ZSC (7C1021F)
STRESS:
Assy Lot #
000504
4022475
610033884
CSPI-R
168H
50
0
50
0
TC CONDITION C, -65C TO 150C, PRE COND. 192 HRS 30C/60% RH, MSL3
CY7C1021B-ZSC (7C1021F)
4017456
610039004
CSPI-R
300Cy
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 8 of 13
Document No.001-88064 Rev. *A
ECN #4431902
Reliability Test Data
QTP #:
Device
STRESS:
Fab Lot #
CSPI-R
COMP
15
0
4943568
619936792
CSPI-R
COMP
5
0
4943568
COMP
3
0
619936792
CSPI-R
4943568
619936792
CSPI-R
48
1502
0
4943568
619936792
CSPI-R
COMP
3
0
4943568
619936792
CSPI-R
COMP
8
0
HI-ACCEL SATURATION TEST, 130C, 85%RH, 5.5V, PRE COND 192 HR 30C/60%RHMSL3
7C1009MC-RVC
STRESS:
619936792
ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V
CY7C109B-VCB
STRESS:
4943568
ESD-CHARGE DEVICE MODEL, 1,000V
CY7C109B-VCB
STRESS:
Rej Failure Mechanism
HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 3.8V, Vcc Max
7C1009MC-RVC
STRESS:
Samp
DYNAMIC LATCH-UP TESTING, 8.5V, 300mA
CY7C109B-VCB
STRESS:
Assy Loc Duration
AGE STRENGHT
CY7C109B-VCB
STRESS:
Assy Lot #
ACOUSTIC-MSL3
7C1009MC-VC
STRESS:
98462
4943568
619936792
CSPI-R
128
50
0
HIGH TEMPERATURE STORAGE, PLASTIC, 150C
7C1009MC-RVC
4943568
619936792
CSPI-R
500
50
0
7C1009MC-RVC
4943568
619936792
CSPI-R
1000
50
0
STRESS:
HIGH TEMP STEADY STATE LIFE TEST, 150C, 5.5V, Vcc MAX
7C1009MC-RVC
4943568
619936792
CSPI-R
80
80
0
7C1009MC-RVC
4943568
619936792
CSPI-R
168
80
0
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 9 of 13
Document No.001-88064 Rev. *A
ECN #4431902
Reliability Test Data
QTP #98462
Device
STRESS:
Fab Lot #
Assy Lot #
Assy Loc Duration
Samp
Rej
Failure Mechanism
HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 3.8V, Vcc Max
7C1009MC-RVC
4943568
619936792
CSPI-R
80
529
0
7C1009MC-RVC
4943568
619936792
CSPI-R
500
529
0
STRESS: PRESSURE COOKER TEST (121C, 100%RH), PRE COND 192 HR 30C/60%RH, MSL3
7C1009MC-RVC
STRESS:
4943568
619936792
CSPI-R
168
51
0
TC COND. C -65C TO 150C, PRECONDITION 192 HRS 30C/60%RH, MSL3
7C1009MC-RVC
4943568
619936792
CSPI-R
300
50
0
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 10 of 13
Document No.001-88064 Rev. *A
ECN #4431902
Reliability Test Data
QTP#000301
Device
STRESS:
Fab Lot #
Assy Lot #
Assy Loc Duration
Samp
Rej
Failure Mechanis
ESD-CHARGE DEVICE MODE, (1,000V
CY7C1049B
4919497
619925326
CSPI-R
COMP
3
STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 4,400V
0
CY7C1049B
4919497
619925326
CSPI-R
COMP
3
0
STRESS: HI-ACCEL SATURATION TEST (130C, 85%RH, 5.5V), PRE COND 192 HR 30C/60%RH, MSL3
CY7C1049B
STRESS:
4919497
619925326
4944781
610003706
HIGH TEMPERATURE STORAGE, 150C
CSPI-R
128
47
0
CSPI-R
128
49
0
CY7C1049B
4919497
619925326
CSPI-R
336
48
0
CY7C1049B
4919497
619925326
CSPI-R
500
48
0
CY7C1049B
4919497
619925326
CSPI-R
1000
48
0
STRESS:
HIGH TEMP STEADY STATE LIFE TEST, 150C, 5.5V, Vcc MAX
CY7C1049B
4919497
619925326
CSPI-R
80
80
0
CY7C1049B
4919497
619925326
CSPI-R
168
80
0
STRESS:
LOW TEMPERATURE OPERATING LIFE, -30C, 6.50V
CY7C1049B
4919497
619925326
CSPI-R
500
46
0
STRESS: PRESSURE COOKER TEST (121C, 100%RH), PRE COND 192 HR 30C/60%RH, MSL3
CY7C1049B
4919497
619925326
CSPI-R
168
48
0
CY7C1049B
4920692
619933105
CSPI-R
168
47
0
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 11 of 13
Document No.001-88064 Rev. *A
ECN #4431902
Reliability Test Data
QTP#000301
Device
STRESS:
Fab Lot #
Assy Lot #
Assy Loc Duration
Samp
Rej
Failure Mechanism
TC COND. C -65C TO 150C, PRECONDITION 192 HRS 30C/60%RH, MSL3
CY7C1049B
4919497
619925326
CSPI-R
300
48
0
CY7C1049B
4919497
619925326
CSPI-R
500
48
0
CY7C1049B
4920692
619933105
CSPI-R
300
47
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 5.75V
CY7C1049B-VC
4944781
610003706
CSPI-R
48
1000
1
CY7C1049B-VC
4946002
610004242
CSPI-R
48
1000
0
CY7C1049B-VC
4941240
619938804
CSPI-R
48
1000
0
1-Particle
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 5.75V
CY7C1049B-VC
4944781
610003706
CSPI-R
80
530
0
CY7C1049B-VC
4944781
610003706
CSPI-R
500
529
0
CY7C1049B-VC
4946002
610004242
CSPI-R
80
530
0
CY7C1049B-VC
4946002
610004242
CSPI-R
500
529
0
CY7C1049B-VC
4941240
619938804
CSPI-R
80
530
0
CY7C1049B-VC
4941240
619938804
CSPI-R
500
527
0
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 12 of 13
Document No.001-88064 Rev. *A
ECN #4431902
Document History Page
Document Title: QTP#000504: 1 Meg Fast Asynchronous RAM "CY7C1021B/1019B" R52D-5R Technology, Fab 4
Document Number: 001-88064
Rev. ECN
Orig. of
No.
Change
**
4038942 HSTO
*A
4431902 HSTO
Description of Change
Initial Spec Release
Qualification report published on Cypress.com was transferred to
qualification report spec template.
Deleted Cypress obsolete referenced spec in Major
package qualification details.
Updated package availability based on current qualified test &
Assembly site.
Deleted Cypress reference Spec and replaced with Industry Standards
in Reliability Test Performed Table.
Align qualification report based on the new template in the front page
Distribution: WEB
Posting:
None
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 13 of 13