212211

AEC-Q100G Qualification Summary
64ld LQFP
Objective: Bolero 256k New Product Introduction Qualification
Freescale PN:
Part Name:
Technology:
Package:
Fab / Assembly /
Final Test Sites:
Maskset#:
Rev#:
Die Size (in mm)
WxLxT
Part Operating
Temp. Grade:
Customer Name(s):
PN(s):
Design Engr:
Phone #:
Lead Product Engr:
Phone #:
Prod. Package
Phone #:
NPI PRQE:
Phone #:
MPC5602D
Bolero 256k
0.09um CMOS90 Z3 core
LQFP 64 10x10 x 1.4 Pitch 0.5
FSL-ATMC / FSL-TJN-FM
FSL-TJN-FM
M18Y
1
3.778 x 3.411 x 0.3302 (with scribe)
125°C
Grade 1
Trace/DateCode
Summary Revision #
Date:
General Market
Akshay Pathak
QUARTZ Tracking #:
1.4
13th October 2011
212211
(Signature/Date shown below may be
electronic)
PPE Approval
Signature & Date:
NPI PRQE Plan Approval Douglas Blackwood
Signature & Date: 12th October 2011
Allan Scott
J.M. Liu
Douglas Blackwood
DD86284
DD88771
DD88507
CTCTZW1119A CTCTZN1120A CTCTZW1120A
CAB Approval 09191271M
Signature & Date: Neil Ross 13th October 2011
TESTS HIGHLIGHTED IN YELLOW WERE PERFORMED FOR THIS STUDY
This testing is performed by Freescale FSL-EKB, FSL-TJN and FSL-ATX where noted in the Comments
GROUP A - ACCELERATED ENVIRONMENTAL STRESS TESTS
STRESS TEST
PC
HAST
Reference
J=JESD22
Test Conditions
(Surface Mount Devices Only - PC required
for THB, HAST, AC, UHST, TC, PC+PTC)
End Point
Requirements
JESD22- Preconditioning :
TEST @ RHC
A113
MSL 3 @ 260°C, +5/-0°C
J-STD-020 Pre and Post CSAM SS=11 units per lot per stress
test
JESD22- PC before HAST required for SMDs.
TEST @ RH
A110
Highly Accelerated Stress Test, Biased:
HAST = 130°C/85%RH for 96 hrs.
Bias = 5.5V
PC before AC required for SMDs.
Autoclave:
AC = 121°C/100%RH/15 psig for 96 hrs
Minimum
Sample Size
# of Lots
Total Units
Results
LotID-(#Rej/SS)
NA=Not Applicable
All surface mount devices prior to THB, HAST, AC, Lot1: 0/231
UHST, TC, PC+PTC
Lot2: 0/231
Lot3: 0/231
Comments
Performed in TJN
77
3
231
Lot1: 0/77
Lot2: 0/77
Lot3: 0/77
Performed in TJN
77
3
231
Lot1: 0/77
Lot2: 0/77
Lot3: 0/77
Performed in TJN
77
3
231
Lot1: 0/77
Lot2: 0/77
Lot3: 0/77
Performed in TJN
Minimum
Sample Size
# of Lots
Total Units
TEST @ RH
22
SMD only
0
0
Low power device, not required.
23 SMDs;
45 non- SMD
0
0
Low power device, not required.
77
0
0
AC
JESD22A102
TEST @ R
TC
JESD22A104
AEC Q100Appendix 3
PC before TC required for SMDs
TEST @ HC
Temperature Cycle:
WBP =/> 3 grams
TC = -65°C to 150°C for 500 cycles.
WBP after TC on 5 devices from 1 lot; 2 bonds per
corner and one mid-bond per side on each device.
Record which pins were used.
STRESS TEST
Reference
J=JESD22
PC + PTC
JESD22A105
Test Conditions
(Surface Mount Devices Only - PC required
for THB, HAST, AC, UHST, TC, PC+PTC)
For SMD devices only.
Preconditioning plus Power Temperture Cycle:
PTC
JESD22A105
Power Temperature Cycle:
PTC = ?°C to ?°C for 1000 cycles;
Bias = ?
TEST @ RH
HTSL
JESD22A103
High Temperature Storage Life:
150°C for 1008 hrs
TEST @ RHC
STRESS TEST
Reference
HTOL
JESD22A108
End Point
Requirements
All Post 500TC wirepulls >3g
Results
LotID-(#Rej/SS)
NA=Not Applicable
Generic Data
Lot1: 0/77
Comments
Generic Data
Quartz: 212020 Pictus 256k 64ld NPI
Qualification. Performed in TJN
TEST GROUP B - ACCELERATED LIFETIME SIMULATION TESTS
Test Conditions
High Temperature Operating Life:
Ta= 125°C for 1008, 2016hrs FIO
End Point
Requirements
TEST @ RHC
Minimum
Sample Size
# of Lots
Total Units
77
0
0
AEC Q100- Early Life Failure Rate:
008
Ta = 125°C for 48 hrs;
TEST @ RHC
800
0
0
10% of NVM cycling @125°C, as shown in EDR
below, is required
NVM in Checkerboard
EDR
AEC Q100- NVM Endurance, Data Retention,
005
C-Flash: 256k Array @ 125°C
(2x16k, 3x32k, 1x128k)
100K W/E for 16k block size
10K W/E for 32k block size
1K W/E for 128k block size
Lot1: 0/77
(1008hrs)
Generic Data
Lot2: 0/77 (3024hrs)
Lot3: 0/77 (1008hrs)
Lot4: 0/77 (1008hrs)
NVM cycling @125°C, as shown in EDR below, is
required
NVM in Checkerboard
ELFR
Results
LotID-(#Rej/SS)
NA=Not applicable
TEST @ RHC
77
0
0
Comments
Lot1: Quartz: 212209 Bolero 256k HTOL
performed on 100ld: Performed in TJN
Generic Data:
Lot2,3,4: Quartz: 212019 Pictus 256k 100ld
NPI Qualification. Performed in TJN
Lot1: 0/800
Lot1: Bolero 256k ELFR performed on 100ld:
Performed in TJN
Generic Data
Lot2: 0/400
Lot3: 0/400
Lot4: 0/787
Lot5: 0/813
Generic Data:
Lot2,3: Quartz: 212019 Pictus 256k 100ld NPI
Qualification. Performed in EKB
Lot4: Quartz: 212657 Bolero 1.5M 176ld
Qualification. Performed in EKB
Lot5: Quartz: 212658 Bolero 1.5M 144ld
Qualification. Performed in EKB
Lot1: 0/77
Lot1: Bolero 256k ELFR performed on 100ld:
Performed in TJN
Generic Data
Lot1: 0/77
Lot2: 0/77
Lot3: 0/77
Generic Data:
Lot1,2,3: Quartz: 212019 Pictus 256k 100ld
NPI Qualification. Performed in EKB
Lot1: 0/77
Lot1: Bolero 256k ELFR performed on 100ld:
Performed in TJN
Generic Data
Lot1: 0/77
Lot2: 0/77
Lot3: 0/77
Generic Data:
Lot1,2,3: Quartz: 212019 Pictus 256k 100ld
NPI Qualification. Performed in EKB
D-Flash: 64Kb Block @ 125°C
100K W/E for 16k block size
NVM in Checkerboard 504, 1008hrs, 2016hrs FIO
@ 150°C
NVM Endurance, Data Retention,
TEST @ RHC
77
C-Flash 0: 256k Array @ -40°C
(2x16k, 3x32k, 1x128k)
100K W/E for 16k block size
10K W/E for 32k block size
1K W/E for 128k block size
0
0
D-Flash: 64Kb Block @ -40°C
100K W/E for 16k block size
NVM in Checkerboard 504, 1008hrs, 2016hrs FIO
@ 150°C
FORMPPAP004XLS
1 of 3
Freescale Rev U
Freescale PN: MPC5602D
Part Name: Bolero 256k
Customer Name(s): General Market
PN(s):
Summary Revision #
Date:
1.4
13th October 2011
TEST GROUP C - PACKAGE ASSEMBLY INTEGRITY TESTS
STRESS TEST
Reference
Test Conditions
End Point
Requirements
Minimum
Sample Size
# of Lots
Total Units
Results
LotID-(#Rej/SS)
NA=Not applicable
Comments
WBS
AEC Q100- Wire Bond shear
001
Cpk = or > 1.67
30 bonds
from minimum 5
units
1
5
Lot1: Cpk= 4.19
Lot2: Cpk= 3.93
Lot3: Cpk= 2.39
Performed in TJN
WBP
MilStd883- Wire Bond Pull
2011
Cond. C or D
Cpk = or > 1.67
30 bonds
from minimum 5
units
1
5
Lot1: Cpk= 2.86
Lot2: Cpk= 3.70
Lot3: Cpk= 2.44
Performed in TJN
Performed in TJN
SD
JESD22B102
Solderability;
8hr. Steam age (1 hr. for Au-plated leads) prior to
test.
If production burn-in is done, samples must also
undergo burn-in.
>95% lead coverage
of critical areas
15
1
15
Lot1: 0/15
PD
JESD22B100
Physical Dimensions PD per 98A drawing
Cpk = or > 1.67
10
3
30
(w)
Lot1: Cpk= 3.76
Lot2: Cpk= 4.82
Lot3: Cpk= 5.43
Cpk = or >1.67
10
(5 balls from a
min. of 10
devices)
0
0
N/A, not required for SM devices.
5
(10 leads from
each of 5 parts)
0
0
N/A, not required for SM devices.
AEC-Q100- Solder Ball Shear;
010
Performed on all solder ball mounted packages
e.g. PBGA, Chip Scale, Micro Lead Frame (but
NOT Flip Chip).
Two 260°C reflow cycles before shear.
SBS
LI
JESD22B105
STRESS TEST
Reference
Lead Integrity
Not required for surface mount devices;
Only required for through-hole devices.
No lead breakage or
cracks
(l)
2.98
3.89
4.46
(h)
2.37
2.98
3.77
Performed in TJN
TEST GROUP D - DIE FABRICATION RELIABILITY TESTS
Test Conditions
End Point
Requirements
Minimum
Sample Size
# of Lots
Total Units
Results
LotID-(#Rej/SS)
NA=Not applicable
Comments
Electro Migration
Derivative Device on
qualified Process. Report
available on request
The data, test method, calculations and
internal criteria should be available to the
customer upon request for new technologies.
NBTI
Negative Bias Temperature Instability
Derivative Device on
qualified Process. Report
available on request
The data, test method, calculations and
internal criteria should be available to the
customer upon request for new technologies.
TDDB
Time Dependent Dielectric Breakdown
Derivative Device on
qualified Process. Report
available on request
The data, test method, calculations and
internal criteria should be available to the
customer upon request for new technologies.
HCI
Hot Carrier Injection
Derivative Device on
qualified Process. Report
available on request
The data, test method, calculations and
internal criteria should be available to the
customer upon request for new technologies.
SM
Stress Migration
Derivative Device on
qualified Process. Report
available on request
The data, test method, calculations and
internal criteria should be available to the
customer upon request for new technologies.
EM
FORMPPAP004XLS
2 of 3
Freescale Rev U
Freescale PN: MPC5602D
Part Name: Bolero 256k
Customer Name(s): General Market
PN(s):
Summary Revision #
Date:
1.4
13th October 2011
TEST GROUP E - ELECTRICAL VERIFICATION TESTS
STRESS TEST
Reference
Test Conditions
Freescale
48A
End Point
Requirements
Minimum
Sample Size
# of Lots
Total Units
All
All
All
Results
LotID-(#Rej/SS)
NA=Not applicable
Lot1: DD86284
Lot2: DD88771
Lot3: DD88507
Comments
Pre- and Post Functional / Parametrics
Test software shall meet requirements of AECQ100-007.
Testing performed to the limits of device
specification in temperature and limit value.
AEC-Q100- ElectroStatic Discharge/
ESD
002
Human Body Model Classification:
(HBM)
Test @ 500 / 1000 / 1500 / 2000Volts
CLASSIFICATION
See AEC-Q100-002 for classification levels.
0 Fails
TEST @ RH
2KV min.
3 units per
Voltage level
0
0
Lot1:
500V 0/3
1000V 0/3
1500V 0/3
2000V 0/3
Lot1: Quartz: 212209 Bolero 256k HBM ESD
performed on 100ld: Performed in KLM
AEC-Q100- ElectroStatic Discharge/
ESD
003
Machine Model Classification:
(MM)
Test @ 50 / 100 / 150 / 200Volts
CLASSIFICATION
See AEC-Q100-003 for classification levels.
TEST @ RH
250V min.
3 units per
Voltage level
0
0
Lot1:
50V 0/3
100V 0/3
150V 0/3
200V 0/3
Lot1: Quartz: 212209 Bolero 256k MM ESD
performed on 100ld: Performed in KLM
AEC-Q100- ElectroStatic Discharge/
ESD
011
Charged Device Model Classification:
(CDM)
Test @ 250 / 500 / 750 Volts
CLASSIFICATION
See AEC-Q100-011 for classification levels.
JESD78 Latch-up:
LU
plus
Test per JEDEC JESD78 with the AEC-Q100-004
AEC-Q100- requirements.
004
Ta= Operating Temperature Maximum
TEST @ RH
Corner pins =/> 750V;
All other pins =/>
500V
TEST @ RH
3 units per
Voltage level
1
9
Performed in KLM
6
1
6
Lot1:
250V 0/3
500V 0/3
750V 0/3
Lot1: 0/6
30
0
0
Lot1: Pass
Lot2: Pass
Lot3: Pass
Lot1,2,3: Bolero 256k ED performed on 100ld:
Performed in ATX
TEST
ED
AEC-Q100- Electrical Distribution
009,
Freescale
TEST @ RHC
Cpk = or > 1.67
FG
AEC-Q100- Fault Grading
007
AEC-Q003 Characterization:
Performed on new technologies and part families.
FG shall be = or >
98% for qual units
AEC-Q100- Electro-Thermally Induced Gate Leakage;
006
155°C, 2.0 min, +400/-400 V
TEST @ R
CHAR
GL
SAE
J1752/3 Radiated
Emissions
AEC Q100012
EMC
SC
SER
JEDEC Unaccelerated:
JESD89-1 or
Accelerated:
JESD89-2 &
JESD89-3
STRESS TEST
Reference
Electromagnetic Compatibility
<40dBuV
(see AEC Q100 Appendix 5 for test applicability;
150kHz - 1GHz
done on case-by-case basis per
customer/Freescale agreement)
Short Circuit Characterization
Applicable to all smart power devices. This test
and statistical evaluation (see section 4 of Q100012) shall be performed per agreement between
user and supplier on a case-by-case basis.
Soft Error Rate
Applicable to devices with memory sizes 1Mbit
SRAM or DRAM based cells. Either test option (unaccelerated or accelerated) can be performed, in
accordance to the referenced specifications. This
test and its accept criteria is performed per
agreement between user and supplier on a case-bycase basis. Final test report shall include detailed
test facility location and altitude data.
Performed in KLM
Y
99%
Y
Report Available
Performed in EKB
6
1
6
Lot1: 0/6
Performed in KLM
1
0
0
Pass
Lot1: Bolero 256k ED performed on 100ld:
Performed in ATX
10
0
0
Not applicable to microcontroller
3
0
0
Not applicable to microcontroller with RAM <
1Mbit
TEST GROUP F - DEFECT SCREENING TESTS
Test Conditions
End Point
Requirements
Minimum
Sample Size
# of Lots
Total Units
Results
LotID-(#Rej/SS)
NA=Not applicable
PAT
AEC Q001 Part Average Testing
Has PAT been
established for this
part?
implemented
SBA
AEC Q002 Statistical Bin Analysis
Has SBYA been
established for this
part?
implemented
Generic
Quartz
212209
212019
212020
212657
212658
Data:
Device
MPC5602P
MPC5602P
MPC6502P
MPC6507B
MPC6507B
Mask
1M18Y
0M22Y
0M22Y
0M03Y
0M03Y
Revision
1.0
1.1
1.2
1.3
1.4
FORMPPAP004XLS
Title
Bolero
Pictus
Pictus
Bolero
Boler0
256k
256k
256k
1.5M
1.5M
100ld
100ld
64ld
176ld
144ld
NPI Qualification
NPI Qualification
NPI Qualification
Qualifiaction
Qualification
Revision Date
29th April 2009
15th April 2011
6th June 2011
4th Oct 2011
13th Oct 2011
Fab
FSL-ATMC
FSL-ATMC
FSL-ATMC
FSL-ATMC
FSL-ATMC
Assembly
FSL-KLM
FSL-KLM
FSL-TJN
ASE-CL
FSL-KLM
Mould
SUMITOMO EME-G700E
SUMITOMO EME-G700E
CEL9200HF10M
HITACHI CEL-9240
SUMITOMO EME-G700E
Description
Original issue
Updated Cycling Requirements
Updated Qual locations
Added results
Added approvals
Die Size
3.778x3.411x0.3302
3.737x3.564x0.3302
3.737x3.564x0.3302
5.082x5.301x0.33mm
5.082x5.301x0.33mm
Comments
CAB
09191268M
09201374M
09201375M
11161323M
11161323M
Douglas Blackwood
Douglas Blackwood
Douglas Blackwood
Douglas Blackwood
Douglas Blackwood
3 of 3
Freescale Rev U