DISCRETE SEMICONDUCTORS DATA SHEET PHN1013 N-channel enhancement mode MOS transistor Objective specification File under Discrete Semiconductors, SC13b 1997 Jun 20 Philips Semiconductors Objective specification N-channel enhancement mode MOS transistor PHN1013 FEATURES DESCRIPTION • Very low on-state resistance. N-channel enhancement mode logic level field-effect power transistor using ‘trench’ technology, in an 8-pin plastic SOT96-1 (SO8) package. APPLICATIONS • DC to DC converters • General purpose switching applications. PINNING - SOT96-1 (SO8) handbook, halfpage SYMBOL DESCRIPTION 1 s source 2 s source 3 s source 1 4 g gate Top view 5 d drain 6 d drain 7 d drain 8 d drain d 5 8 PIN g 4 s MAM358 Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MAX. UNIT VDS drain-source voltage 30 V ID drain current (DC) 10 A Ptot total power dissipation 2.5 W RDSon drain-source on-state resistance 13.5 mΩ Tj junction temperature 150 °C VGS = 10 V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER VDS drain-source voltage CONDITIONS MIN. MAX. UNIT − 30 − 30 V − ±20 V Tamb = 25 °C; tp ≤ 10 s − 10 A V VDG drain-gate voltage VGS gate-source voltage ID drain current (DC) Tamb = 70 °C; tp ≤ 10 s − 8 A IDM peak drain current Tamb = 25 °C − 50 A Ptot total power dissipation Tamb = 25 °C − 2.5 W Tamb = 70 °C − 1.6 W RGS = 20 kΩ Tstg storage temperature −55 +150 °C Tj operating junction temperature −55 +150 °C 1997 Jun 20 2 Philips Semiconductors Objective specification N-channel enhancement mode MOS transistor PHN1013 THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER CONDITIONS thermal resistance from junction to ambient MAX. UNIT 50 K/W minimum footprint; tp ≤ 10 s; note 1 Note 1. Device mounted on an FR4 printed-circuit board. STATIC CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS V(BR)DSS drain-source breakdown voltage VGS = 0; ID = 250 µA VGSth gate-source threshold voltage IDSS drain-source leakage current MIN. TYP. MAX. UNIT 30 − − V VGS = 0; ID = 250 µA; Tj = −55 °C 27 − − V VDS = VGS ; ID = 250 µA 2.1 3 4 V VDS = VGS ; ID = 250 µA; Tj = 150 °C 1.4 − − V VDS = VGS ; ID = 250 µA; Tj = −55 °C − − 4.4 V VDS = 30 V; VGS = 0 − 0.05 10 µA VDS = 30 V; VGS = 0; Tj = 150 °C − − 500 µA VGS = ±10 V; VDS = 0 − 10 100 nA IGSS gate leakage current RDSon drain-source on-state resistance VGS = 10 V; ID = 10 A VGS = 10 V; ID = 10 A; Tj = 150 °C − 11 13.5 mΩ − − 26 mΩ MIN. TYP. MAX. UNIT DYNAMIC CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS gfs forward transconductance VDS = 25 V; ID = 10 A 4 8 − S Ciss input capacitance VGS = 0; VDS = 25 V; f = 1 MHz − 1700 2200 pF Coss output capacitance VGS = 0; VDS = 25 V; f = 1 MHz − 325 450 pF Crss reverse transfer capacitance VGS = 0; VDS = 25 V; f = 1 MHz − 214 260 pF QG total gate charge VGS = 5 V; VDD = 24 V; ID = 10 A − 27 − nC QGS gate-source charge VGS = 5 V; VDD = 24 V; ID = 10 A − 3.5 − nC QGD gate-drain charge VGS = 5 V; VDD = 24 V; ID = 10 A − 15 − nC Switching times td(on) turn-on delay time VGS = 5 V; VDD = 25 V; ID = 10 A; Rgen = 10 Ω resistive load − 25 40 ns td(off) turn-off delay time VGS = 5 V; VDD = 25 V; ID = 10 A; Rgen = 10 Ω resistive load − 90 130 ns tr rise time VGS = 5 V; VDD = 25 V; ID = 10 A; Rgen = 10 Ω resistive load − 75 125 ns tf fall time VGS = 5 V; VDD = 25 V; ID = 10 A; Rgen = 10 Ω resistive load − 35 50 ns 1997 Jun 20 3 Philips Semiconductors Objective specification N-channel enhancement mode MOS transistor PHN1013 REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER IDR continuous reverse drain current IDRM pulsed reverse drain current VSD source-drain diode forward voltage CONDITIONS Tamb = 25 °C; tp ≤ 10 s TYP. MAX. UNIT − 10 A − 50 A IF = 10 A; VGS = 0 0.95 1.2 V IF = 50 A; VGS = 0 1 − V trr reverse recovery time IF = 10 A; di/dt = −100 A/µs; VGS = −10 V; VR = 25 V 50 − ns Qrr reverse recovery charge IF = 10 A; di/dt = −100 A/µs; VGS = −10 V; VR = 25 V 0.1 − µC 1997 Jun 20 4 Philips Semiconductors Objective specification N-channel enhancement mode MOS transistor PHN1013 PACKAGE OUTLINE SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 D E A X c y HE v M A Z 5 8 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.014 0.0075 0.20 0.19 0.16 0.15 0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024 inches 0.010 0.057 0.069 0.004 0.049 0.01 0.01 0.028 0.004 0.012 θ Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT96-1 076E03S MS-012AA 1997 Jun 20 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 97-05-22 5 o 8 0o Philips Semiconductors Objective specification N-channel enhancement mode MOS transistor PHN1013 DEFINITIONS Data Sheet Status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1997 Jun 20 6 Philips Semiconductors Objective specification N-channel enhancement mode MOS transistor PHN1013 NOTES 1997 Jun 20 7 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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