TOSHIBA TK40J60T

TK40J60T
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (DTMOS)
TK40J60T
Switching Regulator Applications
Unit: mm
20.0±0.3
9.0
2.0
3.3max.
1.0
2.0
Low drain-source ON resistance: RDS (ON) = 0.068Ω (typ.)
High forward transfer admittance: ⎪Yfs⎪ = 25 S (typ.)
Low leakage current: IDSS = 100 μA (VDS = 600 V)
Enhancement-mode: Vth = 3.0~5.0 V (VDS = 10 V, ID = 1 mA)
4.5
Ф3.2±0.2
15.9max.
•
•
•
•
Absolute Maximum Ratings (Ta = 25°C)
VDSS
600
V
Gate-source voltage
VGSS
±30
V
(Note 1)
ID
40
Pulse (t = 1 ms)
(Note 1)
IDP
80
DC
Drain current
A
5.45±0.2
1
Drain power dissipation (Tc = 25°C)
PD
400
W
Single pulse avalanche energy
(Note 2)
EAS
576
mJ
Avalanche current
IAR
40
A
Repetitive avalanche energy
EAR
40
mJ
Channel temperature
Tch
150
°C
Storage temperature range
Tstg
-55~150
°C
(Note 3)
5.45±0.2
4.8max.
Drain-source voltage
＋0.3
1.0 －0.25
2
2.8
Unit
＋0.3
Rating
0.6－0.1
Symbol
1.8max.
Characteristics
20.5±0.5
2.0±0.3
3
1. Gate
2. Drain(heat sink)
3. Source
⎯
JEDEC
JEITA
SC-65
TOSHIBA
2-16C1B
Weight : 4.6 g (typ.)
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability
Handbook (“Handling Precautions”/’’Derating Concept and Methods’’) and individual reliability data (i.e.
reliability test report and estimated failure rate, etc).
Thermal Characteristics
Characteristics
Symbol
Max
Unit
Thermal resistance, channel to case
Rth (ch-c)
0.313
°C/W
Thermal resistance, channel to ambient
Rth (ch-a)
50
°C/W
2
Note 1: Please use devices on conditions that the channel temperature is below 150°C.
1
Note 2: VDD = 90 V, Tch = 25 °C (initial), L = 0.63 mH, RG = 25 Ω, IAR = 40 A
Note 3: Repetitive rating: pulse width limited by maximum channel temperature
This transistor is an electrostatic sensitive device. Please handle with caution.
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TK40J60T
Electrical Characteristics (Ta = 25°C)
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
Gate leakage current
IGSS
VGS = ±30 V, VDS = 0 V
―
―
±1
μA
Drain cut-off current
IDSS
VDS = 600 V, VGS = 0 V
―
―
100
μA
V (BR) DSS
ID = 10 mA, VGS = 0 V
600
―
―
V
Vth
VDS = 10 V, ID = 1 mA
3.0
―
5.0
V
Drain-source ON resistance
RDS (ON)
VGS = 10 V, ID = 20 A
―
0.068
0.08
Ω
Forward transfer admittance
⎪Yfs⎪
VDS = 20 V, ID = 20 A
6
25
―
S
Input capacitance
Ciss
―
3900
―
Reverse transfer capacitance
Crss
―
280
―
Output capacitance
Coss
―
9200
―
―
60
―
―
120
―
Gate threshold voltage
Rise time
VDS = 10 V, VGS = 0 V, f = 1 MHz
Turn-on time
ton
Switching time
Fall time
ID = 20A
10 V
VGS
0V
tr
tf
Turn-off time
VDD ∼
− 300 V
Duty <
= 1%, tw = 10 μs
toff
Total gate charge
VOUT
RL =
15Ω
50 Ω
Drain-source breakdown voltage
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
VDD ∼
− 400 V, VGS = 10 V, ID = 40 A
pF
ns
―
15
―
―
200
―
―
67
―
―
45
―
―
22
―
nC
Source-Drain Ratings and Characteristics (Ta = 25°C)
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
(Note 1)
IDR
―
―
―
40
A
(Note 1)
IDRP
―
―
―
80
A
Continuous drain reverse current
Pulse drain reverse current
Forward voltage (diode)
VDSF
IDR = 40 A, VGS = 0 V
―
―
-1.7
V
Reverse recovery time
trr
IDR = 40 A, VGS = 0 V,
―
550
―
ns
Reverse recovery charge
Qrr
dIDR/dt = 100 A/μs
―
14
―
μC
Marking
TOSHIBA
K40J60T
Part No. (or abbreviation code)
Lot No.
A line indicates
Lead (Pb)-Free Finish
2
2007-08-30
TK40J60T
ID – VDS
40
ID – VDS
80
Common source
Tc = 25°C
Pulse Test
8
10
(A)
(A)
ID
24
6.3
16
Drain current
ID
Drain current
6.5
6
8
1
2
3
Drain-source voltage
4
VDS
7
48
6.5
32
6
16
VGS = 5.5V
0
VGS = 5.5 V
0
5
0
(V)
10
40
VDS
50
(V)
VDS – VGS
(V)
Common source
Tc = 25°C
Pulse Test
8
VDS
48
Drain-source voltage
ID (A)
Drain current
30
10
Common source
VDS = 20 V
Pulse Test
64
20
Drain-source voltage
ID – VGS
80
Common source
7.5 Tc = 25°C
Pulse Test
8
64
32
0
10
7
32
Tc = −55°C
100
25
16
6
4
ID = 40 A
2
20
10
0
0
2
4
6
Gate-source voltage
8
VGS
0
10
0
(V)
Common source
Tc = −55°C
10
100
25
1
1
16
VGS
20
(V)
RDS (ON) – ID
Drain-source ON resistance RDS (ON) (Ω)
(S)
Forward transfer admittance ⎪Yfs⎪
12
1
VDS = 10 V
Pulse Test
0.1
0.1
8
Gate-source voltage
|Yfs| – ID
100
4
10
0.1
0.01
100
Drain current ID (A)
Common source
Tc = 25°C
Pulse Test
VGS = 10,15 V
1
10
100
Drain current ID (A)
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TK40J60T
IDR − VDS
RDS (ON) − Tc
Common source
VGS = 10 V
Pulse Test
ID = 40A
20
0.15
10
0.1
0.05
0
−80
−40
0
40
80
120
Common source
Tc = 25°C
Pulse Test
10
10,15
5
1
3
0.1
0
160
Case temperature Tc (°C)
0.3
0.6
0.9
1.2
VDS
1.5
(V)
Vth − Tc
Capacitance – VDS
5
(pF)
Ciss
1000
Coss
100
Crss
Common source
VGS = 0 V
f = 1 MHz
Tc = 25°C
1
0.1
1
10
Drain-source voltage
100
4
3
2
1
Common source
VDS = 10 V
ID = 1mA
0 Pulse Test
−80
−40
0
40
80
120
160
Case temperature Tc (°C)
VDS (V)
Dynamic input / output
characteristics
PD − Tc
500
(V)
500
400
VDS
VDS
400
20
Common source
ID = 40 A
Tc = 25°C
16
Pulse Test
Drain-source voltage
300
200
100
0
0
40
80
120
160
300
400V
Case temperature Tc (°C)
200V
200
8
VGS
4
100
0
200
12
VDD = 100V
0
20
40
60
80
VGS (V)
10
Gate threshold voltage Vth (V)
10000
Capacitance C
VGS = 0 V
Drain-source voltage
100000
Drain power dissipation PD (W)
1
Gate-source voltage
0.2
100
Drain reverse current IDR (A)
Drain-source ON resistance RDS (ON) (Ω)
0.25
0
100
Total gate charge Qg (nC)
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TK40J60T
Normalized transient thermal impedance
rth (t)/Rth (ch-c)
rth – tw
10
1
Duty=0.5
0.2
0.1
0.1
PDM
SINGLE PULSE
0.05
t
0.02
T
Duty = t/T
Rth (ch-c) = 0.313°C/W
0.01
0.01
10μ
100μ
1m
10m
Pulse width
100m
EAS – Tch
ID max (pulse) *
100 μs *
Avalanche energy
Drain current ID (A)
EAS (mJ)
800
ID max (continuous)
1 ms *
10
DC OPEATION
Tc = 25°C
1
0.1
※ Single pulse Ta=25℃
Curves must be derated
linearly with increase in
temperature.
0.01
1
10
tw (s)
SAFE OPERATING AREA
1000
100
1
10
Drain-source voltage
600
400
200
0
25
VDSS max
100
50
75
100
125
Channel temperature (initial)
150
Tch (°C)
1000
VDS (V)
15 V
BVDSS
IAR
−15 V
VDD
TEST CURCUIT
RG = 25 Ω
VDD = 90 V, L = 0.63 mH
5
VDS
WAVE FORM
Ε AS =
⎛
⎞
1
B VDSS
⎟
⋅ L ⋅ I2 ⋅ ⎜
⎜B
⎟
−
2
V
DD ⎠
⎝ VDSS
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TK40J60T
RESTRICTIONS ON PRODUCT USE
20070701-EN GENERAL
• The information contained herein is subject to change without notice.
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability
Handbook” etc.
• The TOSHIBA products listed in this document are intended for usage in general electronics applications
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,
etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his
document shall be made at the customer’s own risk.
• The products described in this document shall not be used or embedded to any downstream products of which
manufacture, use and/or sale are prohibited under any applicable laws and regulations.
• The information contained herein is presented only as a guide for the applications of our products. No
responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which
may result from its use. No license is granted by implication or otherwise under any patents or other rights of
TOSHIBA or the third parties.
• Please contact your sales representative for product-by-product details in this document regarding RoHS
compatibility. Please use these products in this document in compliance with all applicable laws and regulations
that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses
occurring as a result of noncompliance with applicable laws and regulations.
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2007-08-30