TB62705CP/CF/CFN TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC TB62705CP,TB62705CF,TB62705CFN 8-BIT SHIFT REGISTER, LATCHES & CONSTANT-CURRENT DRIVERS The TB62705CP / CF / CFN are specifically designed for LED and LED DISPLAY constant-current drivers. These constant-current output circuits can support the set-up of an external resistor (IOUT = 5~90mA). This IC is a monolithic integrated circuit designed to be used together with Bi-CMOS process. The devices consist of an 8-bit shift register, latch, AND-GATE and constant-current drivers. TB62705CP FEATURES z Constant-current Output : current with one resistor for 5 to 90mA. TB62705CF z Maximum Clock Frequency : fCLK = 15 (MHz) (Cascade Connecte Operate, Topr = 25°C) z 5V C−MOS Compatible Input z Package : DIP16−P−300−2.54A (TB62705CP) SSOP16−P−225−1.00A (TB62705CF) SSOP16−P−225−0.65B (TB62705CFN) TB62705CFN z Constant Output Current Matching: OUTPUT-GND VOLTAGE CURRENT MATCHING OUTPUT CURRENT ≥ 0.4 V ±6.0% 5~40 mA ≥ 0.7 V ±6.0% 5~90 mA PIN CONNECTION (Top view) Weight DIP16-P-300-2.54A: 1.11 g (typ.) SSOP16-P-225-1.00A: 0.14 g (typ.) SSOP16-P-225-0.65B: 0.07 g (typ.) GND 1 16 VDD SERIAL-IN 2 15 R-EXT CLOCK 3 14 SERIAL-OUT LATCH 4 13 ENABLE OUTn 5 12 OUTn OUTn 6 11 OUTn OUTn 7 10 OUTn OUTn 8 9 OUTn 1 2006-06-13 TB62705CP/CF/CFN BLOCK DIAGRAM OUTn OUTn OUTn TIMING DIAGRAM 5V 0V 5V 0V 5V 0V 5V 0V CLOCK SERIAL-IN LATCH ENABLE OUT0 Off On Off On Off OUT1 OUT3 On Off 5V 0V OUT7 SERIAL-OUT Note: Latches are level-sensitive, not rising edge-sensitive, and are not synchronized with the CLOCK signal. The data will pass through the latch circuit if the latch input is set at “H” level, and will be retained if the input is set at “L”. 2 2006-06-13 TB62705CP/CF/CFN PIN DESCRIPTION PIN No. PIN NAME FUNCTION 1 GND 2 SERIAL−IN 3 CLOCK Clock input terminal for data shift to up-edge. 4 LATCH Data strobe input terminal. Latches pass LATCH data with “H” level input and retain data with “L” level input. 5~12 OUTn 13 ENABLE 14 SERIAL−OUT 15 R−EXT 16 VDD GND terminal for control logic Input pin for shift register serial data Output terminals Input terminal for output enable. All outputs ( OUTn ) go off with ENABLE data input at "H" level and go on with data input at "L" level. Output terminal for serial data for the next SERIAL-IN terminal. Input terminal for connecting a resistor to regulate all output currents. 5-V supply pin of the IC TRUTH TABLE CLOCK LATCH ENABLE SERIAL−IN OUTn SERIAL−OUT UP H L Dn Dn ··· Dn−5 ··· Dn−7 Dn−7 UP L L Dn+1 No change Dn−6 UP H L Dn+2 Dn+2 ··· Dn−3 ··· Dn−5 Dn−5 DOWN X L Dn+3 Dn+2 ··· Dn−3 ··· Dn−5 Dn−5 DOWN X H Dn+3 Off Dn−5 Note: OUTn = on if Dn = H level, and OUTn = off if Dn = L level. An external resistor is connected with R−EXT and GND. Be sure to administer the correct power supply voltage. INPUT/OUTPUT EQUIVALENT CIRCUITS 1. ENABLE terminal 2. LATCH terminal 3. CLOCK, SERIAL−IN terminal 4. SERIAL−OUT terminal 3 2006-06-13 TB62705CP/CF/CFN ABSOLUTE MAXIMUM RATINGS (Ta = 25°C) CHARACTERISTIC SYMBOL RATING UNIT Supply Voltage VDD 0~7.0 V Input Voltage VIN −0.4~VDD + 0.4 V Output Current IOUT 90 mA Output Voltage VCE −0.5~17.0 V Clock Frequency fCK 15 MHz 720 mA GND Terminal Current Power Dissipation Thermal Resistance IGND 1.47 (CP−type : FREE AIR, Ta = 25°C) PD W 0.78 (CF / CFN−type : ON PCB, Ta = 25°C) Rth (j−a) 85 (CP−type : FREE AIR, Ta = 25°C) °C / W 160 (CF / CFN−type : ON PCB, Ta = 25°C) Operating Temperature Topr −40~85 °C Storage Temperature Tstg −55~150 °C Note: CP type: For an ambient temperature above 25°C, the derating is 11.8 mW/°C. CF and CFN type: For an ambient temperature above 25°C, the derating is 6.3 mW/°C. RECOMMENDED OPERATING CONDITION (Ta = −40~85°C unless otherwise stated) CHARACTERISTIC SYMBOL CONDITION MIN TYP. MAX UNIT Supply Voltage VDD ― 4.5 5.0 5.5 V Output Voltage VOUT ― ― ― 15.0 V OUTn , DC 1 circuit 5 ― 88 Output Current IOH SERIAL−OUT ― ― 1.0 IOL SERIAL−OUT ― ― −1.0 IO VIH ― 0.7 VDD ― VDD +0.3 VIL ― −0.3 ― 0.3 VDD Input Voltage mA V LATCH Pulse Width tw LAT 100 ― ― ns CLOCK Pulse Width tw CLK 50 ― ― ns ENABLE Pulse Width tw EN 4500 ― ― ns Set-up Time for DATA tsetup (D) 60 ― ― ns Hold Time for DATA thold (D) 20 ― ― ns Set-up Time for LATCH tsetup (L) 100 ― ― ns Hold Time for LATCH thold (L) Clock Frequency Power Dissipation fCK PD VDD = 4.5~5.5 V 60 ― ― ns 10.0 ― ― MHz Ta = 85°C (CP−type FREE AIR) ― ― 0.82 Ta = 85°C (CF / CFN−type ON PCB) ― ― 0.40 Cascade operation 4 W 2006-06-13 TB62705CP/CF/CFN ELECTRICAL CHARACTERISTICS (VDD = 5.0 V, Ta = 25°C unless otherwise stated) SYMBOL TEST CIR− CUIT CONDITION MIN TYP. MAX "H" Level VIH ― ― 0.7 VDD ― VDD "L" Level VIL ― ― GND ― 0.3 VDD CHARACTERISTIC Input Voltage Output Leakage Current UNIT V IOH ― VOH = 15.0 V ― ― 10 VOL ― IOL = 1.0 mA ― ― 0.4 VOH ― IOH = −1.0 mA 4.6 ― ― IOL1 ― VCE = 0.7 V 34.1 40.0 45.9 IOL2 ― VCE = 0.4 V REXT = 470 Ω (Include skew) 33.7 39.5 45.3 ∆IOL1 ― IO = 40 mA, VCE = 0.4 V REXT = 470 Ω ― ±1.5 ±6.0 IOL3 ― VCE = 1.0 V 64.2 75.5 86.8 IOL4 ― VCE = 0.7 V REXT = 250 Ω (Include skew) 63.8 75.0 86.2 ∆IOL2 ― IO = 75 mA, VCE = 0.7 V REXT = 250 Ω ― ±1.5 ±6.0 % Supply Voltage Regulation % / VDD ― REXT = 470 Ω, Ta = −40~85°C ― 1.5 5.0 %/V Pull−Up Resistor RIN (up) ― ― 150 300 600 Ω ― Ω Output Voltage S−OUT Output Current 1 Current Skew Output Current 2 Current Skew Pull−Down Resistor "OFF" Supply Current "ON" RIN (down) ― 100 200 400 IDD (off) 1 ― REXT = OPEN, OUT0 ~ 7 = off ― 0.6 1.2 IDD (off) 2 ― REXT = 470 Ω, OUT0 ~ 7 = off 3.5 5.8 8.0 IDD (off) 3 ― REXT = 250 Ω, OUT0 ~ 7 = off 6.5 10.7 15.0 IDD (on) 1 ― REXT = 470 Ω, OUT0 ~ 7 = on 7.0 12.0 18.0 IDD (on) 2 ― REXT = 250 Ω, OUT0 ~ 7 = on 10.0 22.0 32.0 5 µA V mA % mA mA 2006-06-13 TB62705CP/CF/CFN SWITCHING CHARACTERISTICS (Ta = 25°C unless otherwise stated) TEST CIR− CUIT MIN TYP. MAX ― 1200 1500 ― 1200 1500 ― 1200 1500 CLK−SOUT ― 30 70 SIN − OUTn ― 700 1000 CHARACTERISTIC SYMBOL CONDITION SIN− OUTn Propagation Delay Time (“L” to “H”) Propagation Delay Time (“H” to “L”) LATCH − OUTn ENABLE − OUTn LATCH − OUTn ENABLE − OUTn tpLH tpHL ― ― CLK−SOUT Pulse Width CK tw CLK ― LATCH tw LAT ― tsetup ― thold ― tr ― Set−up Time for LATCH L−H Hold Time for LATCH L−H H−L H−L Maximum CLOCK Rise Time VDD = 5.0 V VCE = 0.4 V VIH = VDD VIL = GND REXT = 470 Ω IOUT = 40 mA VL = 3.0 V RL = 65 Ω CL = 10.5 pF ― 700 1000 ― 700 1000 ― 30 70 ― 20 30 ― 10 25 ― 25 50 ― 25 50 ― 0 30 ― 0 30 ― ― 10 UNIT ns ns ns ns ns µs Maximum CLOCK Fall Time tf ― ― ― 10 µs Output Rise Time tor ― 300 600 1000 ns Output Fall Time tof ― 150 300 600 ns 6 2006-06-13 TB62705CP/CF/CFN TEST CIRCUIT DC characteristics OUTn OUTn AC characteristics OUTn OUTn Precaution on Use Utmost care is necessary in the design of the output line, VCC (VDD) and GND line since the IC may be damaged due to short-circuits between outputs, air contamination faults, or faults caused by improper grounding. 7 2006-06-13 TB62705CP/CF/CFN TIMING WAVEFORM 1. CLOCK−SERIAL OUT, OUTn OUTn (current) 2. CLOCK− LATCH 3. ENABLE − OUTn OUTn 8 2006-06-13 TB62705CP/CF/CFN 9 2006-06-13 TB62705CP/CF/CFN LED DRIVER TB6270X SERIES APPLICATION NOTE 10 2006-06-13 TB62705CP/CF/CFN [1] Output current (IOUT) IOUT is set by the external resistor (R−EXT), as shown in Fig. 1. [2] Total supply voltage (VLED) This device can operate on 0.4~0.7 V (VO). When a higher voltage is input to the device, the excess voltage is consumed inside the device, which leads to power dissipation. To minimize power dissipation and loss, we recommend that the total supply voltage be set as follows: VLED (total supply voltage) = VCE (Tr Vsat) + Vf (LED forward voltage) + VO (IC supply voltage). When the total supply is too high in the light of the power dissipation of this device, an additional resistor (R) can be used to decrease the supply voltage (VO). PATTERN LAYOUT OUTn OUTn OUTn OUTn [3] Pattern layout This device has only one ground pin, i.e., the combined signal ground pin and power ground pin. If the ground pattern layout contains a large amount of inductance and impedance, and the voltage between the ground and LATCH or CLOCK terminals exceeds 2.5 V due to switching noise, the device may not operate correctly. Be sure to pay attention to pattern layout to minimize inductance. 11 2006-06-13 TB62705CP/CF/CFN PACKAGE DIMENSIONS Weight: 1.11 g (Typ.) 12 2006-06-13 TB62705CP/CF/CFN PACKAGE DIMENSIONS Weight: 0.14 g (Typ.) 13 2006-06-13 TB62705CP/CF/CFN PACKAGE DIMENSIONS Weight: 0.07 g (Typ.) 14 2006-06-13 TB62705CP/CF/CFN Notes on Contents 1. Block Diagrams Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. Equivalent Circuits The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. Timing Charts Timing charts may be simplified for explanatory purposes. 4. Application Circuits The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. Test Circuits Components in the test circuits are used only to obtain and confirm the device characteristics. These components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. 15 2006-06-13 TB62705CP/CF/CFN IC Usage Considerations Notes on Handling of ICs (1) The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. (2) Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. (3) If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition. (4) Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time. (5) Carefully select external components (such as inputs and negative feedback capacitors) and load components (such as speakers), for example, power amp and regulator. If there is a large amount of leakage current such as input or negative feedback condenser, the IC output DC voltage will increase. If this output voltage is connected to a speaker with low input withstand voltage, overcurrent or IC failure can cause smoke or ignition. (The over current can cause smoke or ignition from the IC itself.) In particular, please pay attention when using a Bridge Tied Load (BTL) connection type IC that inputs output DC voltage to a speaker directly. Points to Remember on Handling of ICs (1) Heat Radiation Design In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (Tj) at any time and condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the effect of IC heat radiation with peripheral components. (2) Back-EMF When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s motor power supply and output pins might be exposed to conditions beyond maximum ratings. To avoid this problem, take the effect of back-EMF into consideration in system design. 16 2006-06-13 TB62705CP/CF/CFN RESTRICTIONS ON PRODUCT USE 060116EBA • The information contained herein is subject to change without notice. 021023_D • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc. 021023_A • The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer’s own risk. 021023_B • The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_Q • The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. 021023_C • The products described in this document are subject to the foreign exchange and foreign trade laws. 021023_E 17 2006-06-13