NTE985 Integrated Circuit TV Luminance Processor Description: The NTE985is a monolithic silicon integrated circuit that performs the luminance processing functions of amplification; contrast, brightness and peaking control; blanking; and black−level clamping. Features: D Black−Level Clamping D Linear DC Controls for Brightness, Contrast and Peaking D Horizontal and Vertical Blanking D “Hermetic Chip” Construction D Silicon Nitride Passivated D Platinum Silicide Ohmic Contacts D Operates with Standard or Tapped Delay Line Absolute Maximum Ratings: DC Supply Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57mA Device Dissipation: Up to TA = +55°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750mW Above TA = +55°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . derate linearly 7.9mW/°C Operating Ambient Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40° to +85°C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65° to +150°C Lead Temperature (During Soldering, 1/16” ±1/32” from case, 10sec max), TL . . . . . . . . . . . +265°C Electrical Characteristics: (TA = +25°C unless otherwise specified) Bias Parameter Volts Test Conditions S1 S2 S3 S4 S5 S6 S7 Limits S8 S9 Min Typ Max U n i t S10 S11 Switching Positions for Characteristics Measurements Static Characteristics Voltage At Term. 13 6.5 2 1 1 2 2 4 1 2 2 1 1 11 12.3 13.2 V Quiescent Voltage At Term. 4 6.5 2 1 1 2 2 3 1 2 2 1 1 3.3 4 5.7 V Quiescent Voltage At Term 7 6.5 2 1 1 2 2 2 1 2 2 1 1 7.1 7.7 8.3 V Current into Term. 13 (Term 13 Connected to 11V) 6.5 2 1 1 2 2 3 1 2 2 1 2 10 18 30 mA Wide−Band Gain (Note 1) 7.3 1 1 1 2 1 2 1 1 1 2 1 1 3 5 dB Contrast Gain Reduction (Note 2) 7.3 1 1 1 2 1 2 1 1 2 2 1 27 30 − dB Peaking Gain (Note 1) 7.3 1 1 2 2 1 2 1 1 1 2 1 9 13 17 dB Peaking Gain Reduction (Note 3) 7.3 1 1 2 2 1 2 1 1 1 2 1 16 18 − dB 7.3 1 − 1 1 1 2 − 2 1 2 1 − 20 − % 7.3 1 − 1 1 1 2 − 2 1 2 1 − 40 − % Dynamic Characteristics Max. Intermodulation Distortion 3.8V (Note 4) 5V (Note 5) Note 1 Set 50kHz generator for 200mVrms. Adjust R1 Peaking control for minimum setting, measure wide−band gain at terminal 7. Note 2 Set 50kHz generator for 200mVrms. Adjust R1 for minimum setting, measure contrast gain reduction at terminal 7. Note 3 Set 50kHz generator for 200mVrms. Adjust R1 for minimum setting, measure peaking gain reduction at terminal 7. Note 4 Adjust R1 for minimum setting. With S2 at switch position 1 and S7 at switch position 3, set 50kHz generator for 3.8Vp−p. Then with S2, set 1MHz generator for 200mVrms. Then with S7 at switch position 2, measure downward modulation of the 1MHz signal due to the 50kHz signal. A B Modulated I−MHz Signal A = Amplitude of 50kHz signal at deepest trough B = Peak amplitude of 50kHz signal Downward Modulation = B−A B Note 5 Repeat step 4 except that the 50kHz generartor must be set at 5Vp−p Pin Connection Diagram Video Input 1 16 N.C. Peaking Input 2 15 N.C. Peaking Input 3 14 N.C. Video Output 4 13 Shunt Reg and Bias Substrate 5 12 Clamp Inhibit Input Clamp Input 6 11 Clamp Video Output 7 10 Contrast Control Blanking Input 8 9 Peaking Control Brightness Control 16 9 .260 (6.6) Max 1 8 .785 (19.9) Max .300 (7.62) .200 (5.08) Max .245 (6.22) Min .100 (2.54) .700 (17.7)