ONSEMI NTR4171PT3G

NTR4171P
Power MOSFET
−30 V, −3.5 A, Single P−Channel, SOT−23
Features
•
•
•
•
Low RDS(on) at Low Gate Voltage
Low Threshold Voltage
High Power and Current Handling Capability
This is a Pb−Free Device
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V(BR)DSS
Applications
• Load Switch
• Optimized for Battery and Load Management Applications in
−30 V
Portable Equipment like Cell Phones, PDA’s, Media Players, etc.
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
−30
V
Gate−to−Source Voltage
VGS
±12
V
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Steady
State
TA = 25°C
−2.2
TA = 85°C
−1.5
t≤5s
TA = 25°C
Steady
State
ID
75 mW @ −10 V
−2.2 A
110 mW @ −4.5 V
−1.8 A
150 mW @ −2.5 V
−1.0 A
S
G
A
D
−3.5
0.48
TA = 25°C
PD
t≤5s
Pulsed Drain Current
ID MAX
P−CHANNEL MOSFET
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
RDS(on) MAX
W
1.25
3
IDM
−15.0
TJ,
Tstg
−55 to
150
°C
Source Current (Body Diode)
IS
−1.0
mA
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
tp = 10 ms
Operating Junction and Storage Temperature
A
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
Unit
°C/W
Junction−to−Ambient − Steady State (Note 1)
RqJA
260
Junction−to−Ambient − t ≤ 10 s (Note 1)
RqJA
100
MARKING DIAGRAM/
PIN ASSIGNMENT
1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces)
3
Drain
1
2
SOT−23
CASE 318
STYLE 21
TRFMG
G
1
Gate
2
Source
TRF
= Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NTR4171PT1G
SOT−23
(Pb−Free)
3000/Tape & Reel
NTR4171PT3G
SOT−23
(Pb−Free)
10000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2008
June, 2008 − Rev. 0
1
Publication Order Number:
NTR4171P/D
NTR4171P
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = −250 mA
−30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS
/TJ
ID = −250 mA, Reference to 25°C
Zero Gate Voltage Drain Current
IDSS
VGS = 0 V, VDS = −24 V, TJ = 25°C
VGS = 0 V, VDS = −24 V, TJ = 85°C
−1.0
−5.0
mA
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = "12 V
±0.1
mA
VGS(TH)
VGS = VDS, ID = −250 mA
OFF CHARACTERISTICS
V
24
mV/°C
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
−0.7
VGS(TH)/TJ
Drain−to−Source On−Resistance
−1.4
3.5
RDS(on)
Forward Transconductance
−1.15
gFS
V
mV/°C
VGS = −10 V, ID = −2.2 A
50
75
VGS = −4.5 V, ID = −1.8 A
60
110
VGS = −2.5 V, ID = −1.0 A
90
150
VDS = −5.0 V, ID = −2.2 A
7.0
S
720
pF
mW
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
VGS = 0 V, f = 1.0 MHz,
VDS = −15 V
95
65
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
2.6
Total Gate Charge
QG(TOT)
7.4
Threshold Gate Charge
QG(TH)
0.7
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
2.6
RG
6.1
W
td(on)
8.0
ns
tr
11
Gate Resistance
15.6
VGS = −10 V, VDS = −15 V,
ID = −3.5 A
VGS = −4.5 V, VDS = −15 V,
ID = −3.5 A
nC
0.7
1.6
nC
1.6
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(off)
VGS = −10 V, VDS = −15 V,
ID = −3.5 A, RG = 6 W
32
tf
14
td(on)
9.0
tr
td(off)
VGS = −4.5 V, VDS = −15 V,
ID = −3.5 A, RG = 6 W
tf
ns
16
25
22
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
Reverse Recovery Time
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V, IS = −1.0 A, TJ = 25°C
−0.8
14
VGS = 0 V, IS = −1.0 A,
dISD/dt = 100 A/ms
QRR
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2
V
ns
10
4.0
8.0
2. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces)
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%
4. Switching characteristics are independent of operating junction temperatures
−1.2
nC
NTR4171P
TYPICAL CHARACTERISTICS
10
10
−4.5 V
6.0
5.0
−2.2 V
4.0
3.0
VGS = −2.0 V
2.0
0
0.5
1.0
1.5
2.0
2.5
3.5
3.0
4.0
4.5
5.0
7.0
6.0
5.0
TJ = 25°C
4.0
3.0
2.0
TJ = 125°C
1.0 1.25
1.5
TJ = −55°C
1.75
2.0
2.25
2.75
2.5
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
−VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.30
TJ = 25°C
ID = −2.2 A
0.25
0.20
0.15
0.10
0.05
0
VDS = −5 V
8.0
1.0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (A)
7.0
1.0
0
RDS(on), NORMALIZED DRAIN−TO−SOURCE RESISTANCE (W)
−2.5 V
−10 V
8.0
9.0
1.0 2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
3.0
0.30
−2.0 V
−2.2 V
TJ = 25°C
0.25
0.20
−2.5 V
0.15
0.10
−4.5 V
0.05
0
VGS = −10 V
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
−VGS, GATE VOLTAGE (V)
−ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
10,000
1.6
1.5
1.4
VGS = −4.5 V
ID = −2.2 A
IDSS, LEAKAGE (nA)
−ID, DRAIN CURRENT (A)
9.0
1.3
TJ = 150°C
1000
1.2
1.1
1.0
0.9
TJ = 125°C
100
0.8
0.7
0.6
−50
−25
0
25
50
75
100
125
10
150
0
5.0
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
30
NTR4171P
VGS = 0 V
TJ = 25°C
f = 1 MHz
Ciss
800
700
600
500
400
300
Coss
200
100 C
rss
0
0
t, TIME (ns)
1000
5.0
10
15
20
25
30
−VDS
−VGS
12
8.0
10
8.0
6.0
4.0
VDS = −15 V
TJ = 25°C
ID = −3.5 A
QGD
QGS
6.0
4.0
2.0
0
2.0
0
2.0
4.0
6.0
8.0
10
12
0
16
14
QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
10
VGS = −10 V
VDD = −15 V
ID = −3.5 A
td(off)
tf
tr
10
td(on)
1.0
10
TJ = 125°C
100
TJ = 150°C
1.0
TJ = 25°C
0.1
TJ = −55°C
0.3 0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
RG, GATE RESISTANCE (W)
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1.5
30
1.4
ID = −250 mA
25
1.3
1.2
POWER (W)
−VGS(th) (V)
14
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
100
1.0
16
QT
10
−IS, SOURCE CURRENT (A)
C, CAPACITANCE (pF)
900
12
1.1
1.0
0.9
0.8
20
15
10
5.0
0.7
0.6
−50
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1100
1000
−VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS
−25
0
25
50
75
100
125
0
150
0.001
0.01
0.1
1.0
10
100
TJ, TEMPERATURE (°C)
SINGLE PULSE TIME (s)
Figure 11. Threshold Voltage
Figure 12. Single Pulse Maximum Power
Dissipation
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4
1000
NTR4171P
TYPICAL CHARACTERISTICS
−ID, DRAIN CURRENT (A)
100
10
VGS = −12 V
Single Pulse
TC = 25°C
10 ms
100 ms
1.0
1 ms
10 ms
0.1
0.01
RDS(on) Limit
Thermal Limit
Package Limit
0.1
1.0
dc
10
100
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
R(t), EFFECTIVE TRANSIENT THERMAL
RESPONSE (NORMALIZED)
Figure 13. Maximum Rated Forward Biased
Safe Operating Area
1.0
Duty Cycle = 0.5
0.2
0.1
0.01
0.1
0.05
0.02
0.01
Single Pulse
0.0001
0.001
0.01
0.1
1.0
t, TIME (s)
Figure 14. FET Thermal Response
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5
10
100
1000
NTR4171P
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AN
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. 318−01 THRU −07 AND −09 OBSOLETE, NEW
STANDARD 318−08.
D
SEE VIEW C
3
HE
E
c
1
DIM
A
A1
b
c
D
E
e
L
L1
HE
2
e
b
0.25
q
A
L
A1
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
L1
VIEW C
SOLDERING FOOTPRINT
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
SCALE 10:1
0.8
0.031
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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6
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NTR4171P/D